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1. 发明申请

WO2006135245A1 A DATA STORAGE DEVICE 审中-公开
标题翻译：数据存储设备
公开(公告)号：WO2006135245A1
公开(公告)日：2006-12-21
申请号：PCT/NO2006/000214
申请日：2006-06-08
申请人： THIN FILM ELECTRONICS ASA , LEISTAD, Geirr, I. , BRÖMS, Per , KARLSSON, Christer
发明人： LEISTAD, Geirr, I. , BRÖMS, Per , KARLSSON, Christer
IPC分类号： G06K19/067 , G06K1/12 , G06K7/06 , G06K7/08
CPC分类号： G06K7/0021 , B82Y10/00 , G11B9/02 , G11B9/1454 , G11C11/22 , G11C11/5664 , G11C13/0009 , G11C13/0014 , G11C13/0016
摘要： In a non- volatile electric memory system a card-like memory unit (10) and a read/write unit (11) are provided as physically separate units. The memory unit (10) is based on a memory material (4) that can be set to at least two distinct physical states by applying an electric field across the memory material. The read/write unit (10) comprises contact means (9) provided in a determined geometrical pattern enabling a definition of memory cells in memory unit (10) in an initial write operation, the memory cells being located in a geometrical pattern corresponding to that of the contact means (9). Establishing a physical contact between the memory unit (10) and the read/write unit (11) closes an electrical circuit over an addressed memory cell such that read, write or erase operations can be effected. The memory material (4) of the memory unit (10) can be a ferroelectric or electret material that can be polarized into two discernible polarization states, or it can be a material with a resistive impedance characteristic such that a memory cell of the material can be set to a specific stable resistance value by the application of an electric field.
摘要翻译：在非易失性电存储器系统中，作为物理上分离的单元提供了卡状存储器单元（10）和读/写单元（11）。存储器单元（10）基于可通过在存储器材料上施加电场而被设置为至少两种不同物理状态的存储器材料（4）。读/写单元（10）包括以确定的几何图案提供的接触装置（9），使得能够在初始写入操作中对存储器单元（10）中的存储器单元进行定义，存储器单元位于与其对应的几何图案的接触装置（9）。在存储器单元（10）和读/写单元（11）之间建立物理接触通过寻址的存储单元封闭电路，从而可以实现读，写或擦除操作。存储单元（10）的存储材料（4）可以是铁电或驻极体材料，其可以被极化成两个可识别的极化状态，或者它可以是具有阻抗特性的材料，使得材料的存储单元可以通过施加电场来设定为特定的稳定电阻值。

2. 发明申请

WO2006135247A1 A DATA STORAGE DEVICE 审中-公开
标题翻译：数据存储设备
公开(公告)号：WO2006135247A1
公开(公告)日：2006-12-21
申请号：PCT/NO2006/000216
申请日：2006-06-08
申请人： THIN FILM ELECTRONICS ASA , BRÖMS, Per , KARLSSON, Christer , LEISTAD, Geirr, I.
发明人： BRÖMS, Per , KARLSSON, Christer , LEISTAD, Geirr, I.
IPC分类号： G06K19/067 , G06K1/12 , G06K7/06 , G06K19/06 , G06K7/08
CPC分类号： G06K7/0021 , B82Y10/00 , G11B9/02 , G11B9/1454 , G11C11/22 , G11C11/5664 , G11C13/0009 , G11C13/0014 , G11C13/0016
摘要： In a non-volatile electric memory system a memory unit and a read/write unit are provided as physically separate units. The memory unit is based on a memory material that can be set to at least two distinct physical states by applying an electric field across the memory material. Electrode means and/or contact means are either provided in the memory unit or in the read/write unit and contact means are at least always provided in the read/write unit. Electrodes and contacts are provided in a geometrical arrangement, which defines geometrically one or more memory cells in the memory layer. Contact means in the read/write unit are provided connectable to driving, sensing and control means located in the read/write unit or in an external device connected with the latter. Establishing a physical contact between the memory unit and the read/write unit closes an electrical circuit over the addressed memory cell such that read, write or erase operations can be effected. The memory material of the memory unit can be a ferroelectric or electret material that can be polarized into two discernible polarization states, or it can be a material with a resistive impedance characteristic such that a memory cell of the material can be set to a specific stable resistance value by the application of an electric field.
摘要翻译：在非易失性电存储器系统中，存储单元和读/写单元被提供为物理上分离的单元。存储器单元基于可以通过在存储器材料上施加电场而被设置为至少两种不同物理状态的存储器材料。电极装置和/或接触装置被提供在存储器单元或读/写单元中，并且接触装置至少总是设置在读/写单元中。电极和触点以几何布置提供，其几何地限定存储器层中的一个或多个存储器单元。读/写单元中的接触装置可连接到位于读/写单元中的驱动，感测和控制装置或与其连接的外部设备。在存储器单元和读/写单元之间建立物理接触关闭寻址的存储单元上的电路，从而可以实现读，写或擦除操作。存储单元的存储材料可以是铁电或驻极体材料，其可以被极化成两个可识别的极化状态，或者其可以是具有电阻阻抗特性的材料，使得材料的存储单元可以被设置为特定的稳定通过施加电场的电阻值。

3. 发明申请

WO2004025658A1 A METHOD FOR OPERATING A FERROELECTRIC OR ELECTRET MEMORY DEVICE, AND A DEVICE OF THIS KIND 审中-公开
标题翻译：一种用于操作电磁或电子存储器件的方法，以及该类型的器件
公开(公告)号：WO2004025658A1
公开(公告)日：2004-03-25
申请号：PCT/NO2003/000312
申请日：2003-09-10
申请人： THIN FILM ELECTRONICS ASA , GUDESEN, Hans, Gude , NORDAL, Per-Erik , LEISTAD, Geirr, I. , BRÖMS, Per , SANDSTRÖM, Per , JOHANSSON, Mats
发明人： GUDESEN, Hans, Gude , NORDAL, Per-Erik , LEISTAD, Geirr, I. , BRÖMS, Per , SANDSTRÖM, Per , JOHANSSON, Mats
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： In a method for operating a matrix-addressable ferroelectric or electret memory device a first plurality of voltage differences is applied across first and second sets of electrodes when data are read from the memory cells thereof and a second plurality of voltage differences is applied across the first and, second sets of electrodes in the case where data are refreshed or rewritten to the memory cells. In each case the first and second plurality of voltage differences correspond to sets of potential levels as predefined by a voltage pulse protocol comprising time sequences of voltage pulses. At least one parameter indicative of a change in a memory cell response is determined and used for determining at least one correction factor for the voltage pulses, whereby at least one pulse parameter thereof is adjusted in accordance with the at least one correction factor. The invention also relates to a ferroelectric or electret memory device for implementing the above method.
摘要翻译：在用于操作矩阵寻址铁电或驻极体存储器件的方法中，当从其存储器单元读取数据时，在第一组和第二组电极上施加第一组多个电压差，并且第二组电压差跨越第一以及在将数据刷新或重写到存储单元的情况下的第二组电极。在每种情况下，第一和第二多个电压差对应于由包括电压脉冲的时间序列的电压脉冲协议预定义的电位电平集合。确定表示存储器单元响应的变化的至少一个参数，并用于确定电压脉冲的至少一个校正因子，由此根据至少一个校正因子调整其至少一个脉冲参数。本发明还涉及用于实现上述方法的铁电或驻极体存储器件。

4. 发明申请

WO2006004421A1 OPERATING TEMPERATURE OPTIMIZATION IN A FERROELECTRIC OR ELECTRET MEMORY 审中-公开
标题翻译：在电磁或电气存储器中操作温度优化
公开(公告)号：WO2006004421A1
公开(公告)日：2006-01-12
申请号：PCT/NO2005/000238
申请日：2005-06-29
申请人： THIN FILM ELECTRONICS ASA , NORDAL, Per-Erik , LEISTAD, Geirr, I. , BRÖMS, Per , GUDESEN, Hans, Gude
发明人： NORDAL, Per-Erik , LEISTAD, Geirr, I. , BRÖMS, Per , GUDESEN, Hans, Gude
IPC分类号： H01L23/34
CPC分类号： G11C29/021 , G11C11/22 , G11C29/02 , G11C29/028 , G11C2029/5002
摘要： In a heating and temperature control system for a data storage apparatus comprising at least one matrix-addressable ferroelectric or electret memory device, Joule heating means are provided in the memory device, a temperature determining means is connected with controller circuitry and the controller circuitry is connected with an external power supply, which controlled by the former powers the Joule heating means to achieve a selected operating temperature. In a method for operating the heating and temperature control system an ambient or instant temperature of the memory device is determined and compared with the set nominal optimal temperature, and the difference between these temperatures is used in a predefined algorithm for establishing control parameters for the application of power to the Joule heating means to achieve the selected operating temperature in the memory device during an addressing operation thereto.
摘要翻译：在包括至少一个可矩阵寻址的铁电或驻极体存储装置的数据存储装置的加热和温度控制系统中，在存储装置中提供焦耳加热装置，温度确定装置与控制器电路连接，并且控制器电路被连接具有外部电源，由前者的焦炭控制，焦耳加热意味着实现选定的工作温度。在用于操作加热和温度控制系统的方法中，确定存储器件的环境温度或即时温度并将其与设定的标称最佳温度进行比较，并且在用于建立应用的控制参数的预定义算法中使用这些温度之间的差异的焦耳加热装置的功率，以在其寻址操作期间实现存储装置中的选定的工作温度。

5. 发明申请

WO2013000501A1 SHORT CIRCUIT REDUCTION IN A FERROELECTRIC MEMORY CELL COMPRISING A STACK OF LAYERS ARRANGED ON A FLEXIBLE SUBSTRATE 审中-公开
标题翻译：在包含安装在柔性基板上的层叠的电介质存储单元中的短路电路减少
公开(公告)号：WO2013000501A1
公开(公告)日：2013-01-03
申请号：PCT/EP2011/060740
申请日：2011-06-27
申请人： THIN FILM ELECTRONICS ASA , KARLSSON, Christer , HAGEL, Olle Jonny , NILSSON, Jakob , BRÖMS, Per
发明人： KARLSSON, Christer , HAGEL, Olle Jonny , NILSSON, Jakob , BRÖMS, Per
IPC分类号： G11B9/02 , H01L27/28 , H01L27/115 , G11C13/00 , G11C11/56
CPC分类号： H01L27/11507 , G11B9/02 , G11C11/161 , G11C11/22 , H01L23/562 , H01L27/0248 , H01L27/11502 , H01L27/1203 , H01L28/40 , H01L28/55 , H01L28/75 , H01L43/02 , H01L43/12 , H01L51/0591 , H01L2924/0002 , H01L2924/00
摘要： A ferroelectric memory cell (1) and a memory device (100) comprising one or more such cells (1). The ferroelectric memory cell comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one ferroelectric memory material layer (7) between said electrodes. The stack further comprises a buffer layer (13) arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.
摘要翻译：铁电存储器单元（1）和包括一个或多个这样的单元（1）的存储器件（100）。铁电存储单元包括布置在柔性基板（3）上的层叠层（4）。所述堆叠包括电活性部分（4a）和保护层（11），用于保护电活性部分免受划伤和磨损。所述电活性部分包括底电极层（5）和顶电极层（9）和在所述电极之间的至少一个铁电存储材料层（7）。该堆叠还包括布置在顶部电极层（9）和保护层（11）之间的缓冲层（13）。缓冲层（13）适于至少部分地吸收出现在保护层（11）中的横向尺寸变化（ΔL），从而防止所述尺寸变化（ΔL）转移到电活性部分（4a）从而降低电极之间发生短路的风险。

6. 发明申请

WO2003046923A1 A METHOD FOR READING A PASSIVE MATRIX-ADDRESSABLE DEVICE AND A DEVICE FOR PERFORMING THE METHOD 审中-公开
标题翻译：用于读取被动矩阵寻址装置的方法和用于执行该方法的装置
公开(公告)号：WO2003046923A1
公开(公告)日：2003-06-05
申请号：PCT/NO2002/000389
申请日：2002-10-29
申请人： THIN FILM ELECTRONICS ASA , BRÖMS, Per , KARLSSON, Christer
发明人： BRÖMS, Per , KARLSSON, Christer
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： In a method for reading of a passive matrix-addressable device, particularly a memory device or a sensor device with individually addressable cells of a polarizable material, the cells store data in the form of one of two polarization states +P r ;-P r in each cell, and the polarization states in the cells are written and read by addressing via electrodes which form word and bit lines (WL;BL) in an orthogonal electrode matrix, and wherein the cells are provided in or at the crossings between the word and bit lines (WL;BL) a voltage pulse protocol is used according to which electric potentials on all word and bit lines are controlled coordinated in time. During reading a word line (WL) is activated by applying voltage which relative to the potential on all crossing bit lines (BL) corresponds to the voltage VS and data stored in the cells connected to this active word line (AWL) are determined by detecting the charge values of the cells in a detection means (SA). In a device for performing the method electric potentialson all word and bit lines (WL;BL) are controlled coordinated in time by therewith connected control means which implements the voltage pulse protocol. - Use in passive matrix-addressable memory and sensor devices.
摘要翻译：在用于读取无源矩阵寻址装置，特别是具有可极化材料的单独可寻址单元的存储器件或传感器装置的方法中，电池以每种形式的两种偏振态+ Pr; -Pr之一的形式存储数据并且通过在正交电极矩阵中形成字和位线（WL; BL）的寻址通孔寻址来写入和读取单元中的偏振状态，并且其中单元被提供在字和位之间或之间的交叉处线路（WL; BL）使用电压脉冲协议，根据该电压脉冲协议，所有字线和位线上的电位在时间上被协调控制。在读取期间，通过施加相对于所有交叉位线（BL）上的电位的电压对应于电压VS并且存储在连接到该有源字线（AWL）的单元中的数据）的电压来激活字线（WL）检测装置（SA）中的单元的电荷值。在用于执行该方法的电子装置中，所有字和位线（WL; BL）通过实现电压脉冲协议的连接的控制装置在时间上协调控制。 - 用于无源矩阵寻址存储器和传感器设备。

7. 发明申请

WO2013000825A1 SHORT CIRCUIT REDUCTION IN AN ELECTRONIC COMPONENT COMPRISING A STACK OF LAYERS ARRANGED ON A FLEXIBLE SUBSTRATE 审中-公开
标题翻译：在包含柔性基板上的堆叠层的电子元件中短路电路减少
公开(公告)号：WO2013000825A1
公开(公告)日：2013-01-03
申请号：PCT/EP2012/062025
申请日：2012-06-21
申请人： THIN FILM ELECTRONICS ASA , KARLSSON, Christer , HAGEL, Olle, Jonny , NILSSON, Jakob , BRÖMS, Per
发明人： KARLSSON, Christer , HAGEL, Olle, Jonny , NILSSON, Jakob , BRÖMS, Per
IPC分类号： G11B9/02 , H01L27/28 , H01L27/115 , G11C13/00 , G11C11/56
CPC分类号： G11C11/22 , G11C13/0014 , G11C13/0016 , G11C2213/51 , G11C2213/55 , G11C2213/77 , G11C2213/80 , H01L27/285 , H01L51/0516 , H01L51/0575 , Y10T29/49155
摘要： An electronic component (1) and an electronic device (100) comprising one or more such components (1). The electronic component (1) comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one insulating or semi-insulating layer (7) between said electrodes. The stack further comprises a buffer layer (13), arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.
摘要翻译：电子部件（1）和包括一个或多个这样的部件（1）的电子设备（100）。电子部件（1）包括布置在柔性基板（3）上的层（4）。所述堆叠包括电活性部分（4a）和保护层（11），用于保护电活性部分免受划伤和磨损。所述电活性部分包括底部电极层（5）和顶部电极层（9）以及所述电极之间的至少一个绝缘或半绝缘层（7）。该堆叠还包括布置在顶部电极层（9）和保护层（11）之间的缓冲层（13）。缓冲层（13）适于至少部分地吸收出现在保护层（11）中的横向尺寸变化（ΔL），从而防止所述尺寸变化（ΔL）转移到电活性部分（4a）从而降低电极之间发生短路的风险。

8. 发明授权

EP1323167B1 A METHOD FOR PERFORMING WRITE AND READ OPERATIONS IN A PASSIVE MATRIX MEMORY, AND APPARATUS FOR PERFORMING THE METHOD 有权
标题翻译：程序读取和写入操作的无源矩阵存储器，用于执行实施过程中和装置
公开(公告)号：EP1323167B1
公开(公告)日：2005-03-16
申请号：EP01970356.0
申请日：2001-07-06
申请人： Thin Film Electronics ASA
发明人： NORDAL, Per-Erik , BRÖMS, Per , JOHANSSON, Mats , GUDESEN, Hans, Gude
IPC分类号： G11C11/22
CPC分类号： G11C11/22

9. 发明授权

EP2740122B1 SHORT CIRCUIT REDUCTION IN AN ELECTRONIC COMPONENT COMPRISING A STACK OF LAYERS ARRANGED ON A FLEXIBLE SUBSTRATE 失效
标题翻译：短时间，在电子元件具有灵活的在配置基材层堆栈
公开(公告)号：EP2740122B1
公开(公告)日：2016-08-31
申请号：EP12730477.2
申请日：2012-06-21
申请人： Thin Film Electronics ASA
发明人： KARLSSON, Christer , HAGEL, Olle, Jonny , NILSSON, Jakob , BRÖMS, Per
IPC分类号： G11B9/02 , H01L27/28 , H01L27/115 , G11C13/00 , G11C11/56
CPC分类号： G11C11/22 , G11C13/0014 , G11C13/0016 , G11C2213/51 , G11C2213/55 , G11C2213/77 , G11C2213/80 , H01L27/285 , H01L51/0516 , H01L51/0575 , Y10T29/49155
摘要： An electronic component (1) and an electronic device (100) comprising one or more such components (1). The electronic component (1) comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one insulating or semi-insulating layer (7) between said electrodes. The stack further comprises a buffer layer (13), arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (”L) occurring in the protective layer (11) and thus preventing said dimensional change (”L) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.

10. 发明公开

EP2740122A1 SHORT CIRCUIT REDUCTION IN AN ELECTRONIC COMPONENT COMPRISING A STACK OF LAYERS ARRANGED ON A FLEXIBLE SUBSTRATE 失效
标题翻译：短时间，在电子元件具有灵活的在配置基材层堆栈
公开(公告)号：EP2740122A1
公开(公告)日：2014-06-11
申请号：EP12730477.2
申请日：2012-06-21
申请人： Thin Film Electronics ASA
发明人： KARLSSON, Christer , HAGEL, Olle, Jonny , NILSSON, Jakob , BRÖMS, Per
IPC分类号： G11B9/02 , H01L27/28 , H01L27/115 , G11C13/00 , G11C11/56
CPC分类号： G11C11/22 , G11C13/0014 , G11C13/0016 , G11C2213/51 , G11C2213/55 , G11C2213/77 , G11C2213/80 , H01L27/285 , H01L51/0516 , H01L51/0575 , Y10T29/49155
摘要： An electronic component (1) and an electronic device (100) comprising one or more such components (1). The electronic component (1) comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one insulating or semi-insulating layer (7) between said electrodes. The stack further comprises a buffer layer (13), arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (”L) occurring in the protective layer (11) and thus preventing said dimensional change (”L) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.

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