专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07558947B1 Method and apparatus for computing vector absolute differences 有权
标题翻译：用于计算矢量绝对差的方法和装置
公开(公告)号：US07558947B1
公开(公告)日：2009-07-07
申请号：US10038431
申请日：2001-12-31
申请人： Sushma Shrikant Trivedi , Joseph P. Bratt , Vaughn Todd Arnold , William C. Athas , Jason Chen
发明人： Sushma Shrikant Trivedi , Joseph P. Bratt , Vaughn Todd Arnold , William C. Athas , Jason Chen
IPC分类号： G06F7/38
CPC分类号： G06F7/544 , G06F2207/5442
摘要： Methods and apparatuses for computing an absolute difference of two vectors of numbers. In one aspect of the invention, a method for execution by a microprocessor in response to receiving a single instruction includes: receiving a first plurality of numbers and a second plurality of numbers; and generating simultaneously a third plurality of numbers, each of which is an absolute difference between a number in the first plurality of numbers and a number in the second plurality of numbers. The above operations are performed in response to the microprocessor receiving the single instruction.
摘要翻译：用于计算两个数字向量的绝对差的方法和装置。在本发明的一个方面中，微处理器响应于接收单个指令而执行的方法包括：接收第一多个数字和第二多个数字; 并且同时产生第三多个数字，每个数字是第一多个数字中的数字和第二个多个数字中的数字之间的绝对差。响应于微处理器接收到单个指令执行上述操作。

2. 发明授权

US07681013B1 Method for variable length decoding using multiple configurable look-up tables 有权
标题翻译：使用多个可配置查找表进行可变长度解码的方法
公开(公告)号：US07681013B1
公开(公告)日：2010-03-16
申请号：US10038473
申请日：2001-12-31
申请人： Sushma Shrikant Trivedi , Jack Benkual , Joseph P. Bratt , William C. Athas
发明人： Sushma Shrikant Trivedi , Jack Benkual , Joseph P. Bratt , William C. Athas
IPC分类号： G06F9/30
CPC分类号： G06F9/30032 , G06F9/30014 , G06F9/30047 , G06F9/30101 , G06F9/30109 , G06F9/3013 , G06F9/30141 , G06F9/3802 , G06F9/3836 , G06F9/3853 , G06F9/3877 , G06F9/3879 , G06F9/3885 , G06F9/3895
摘要： Methods and apparatuses for variable length decoding using multiple look-up tables simultaneously. In one aspect of the invention, a method for execution by a microprocessor in response to receiving a single instruction includes: receiving a string of bits; generating a plurality of indices using a plurality of segments of bits in the string of bits; looking up simultaneously a plurality of entries from a plurality of look-up tables using the plurality of indices; and combining the plurality of entries into a first result. The above operations are performed in response to the microprocessor receiving the single instruction.
摘要翻译：同时使用多个查找表进行可变长度解码的方法和装置。在本发明的一个方面，微处理器响应于接收单个指令而执行的方法包括：接收一串比特; 使用所述比特串中的多个比特段来生成多个索引; 使用多个索引从多个查找表中同时查找多个条目; 以及将所述多个条目组合成第一结果。响应于微处理器接收到单个指令执行上述操作。

3. 发明授权

US06848032B2 Pipelining cache-coherence operations in a shared-memory multiprocessing system 有权
标题翻译：在共享内存多处理系统中管理高速缓存一致性操作
公开(公告)号：US06848032B2
公开(公告)日：2005-01-25
申请号：US10256610
申请日：2002-09-27
申请人： Jack Benkual , William C. Athas , Joseph P. Bratt , Ron Ray Hochsprung
发明人： Jack Benkual , William C. Athas , Joseph P. Bratt , Ron Ray Hochsprung
IPC分类号： G06F12/08 , G06F13/00 , G06F13/16 , G06F15/167
CPC分类号： G06F13/1615 , G06F12/0831
摘要： One embodiment of the present invention provides a system that facilitates pipelining cache coherence operations in a shared memory multiprocessor system. During operation, the system receives a command to perform a memory operation from a processor in the shared memory multiprocessor system. This command is received at a bridge that is coupled to the local caches of the processors in the shared memory multiprocessor system. If the command is directed to a cache line that is subject to an in-progress pipelined cache coherency operation, the system delays the command until the in-progress pipelined cache coherency operation completes. Otherwise, the system reflects the command to local caches of other processors in the shared memory multiprocessor system. The system then accumulates snoop responses from the local caches of the other processor and sends the accumulated snoop response to the local caches of other processors in the shared memory multiprocessor system.
摘要翻译：本发明的一个实施例提供一种便于在共享存储器多处理器系统中流水线高速缓存一致性操作的系统。在操作期间，系统从共享存储器多处理器系统中的处理器接收到执行存储器操作的命令。该命令在耦合到共享存储器多处理器系统中的处理器的本地高速缓存的网桥处被接收。如果命令被引导到正在进行中的流水线高速缓存一致性操作的高速缓存行，则系统延迟该命令直到进行中的流水线高速缓存一致性操作完成。否则，系统将命令反映到共享内存多处理器系统中其他处理器的本地缓存。然后，系统从另一个处理器的本地高速缓存中累加窥探响应，并将累积的窥探响应发送到共享存储器多处理器系统中的其他处理器的本地高速缓存。

4. 发明授权

US10697830B1 Multicomb light source and spectrometer 有权
公开(公告)号：US10697830B1
公开(公告)日：2020-06-30
申请号：US15690145
申请日：2017-08-29
申请人： Miikka M. Kangas , Jeffrey G. Koller , William C. Athas
发明人： Miikka M. Kangas , Jeffrey G. Koller , William C. Athas
IPC分类号： G01J3/10 , G01J3/51 , G01J3/02 , G01J3/42
摘要： A comb light source and spectrometer is disclosed. The comb light source and spectrometer can include a plurality of light emitters, where each light emitter can be configured to emit light included in a plurality of wavelength bands. Each wavelength band can be separated from an adjacent wavelength band by a noise band. Due to the separated wavelength bands for a light emitter, any signal received outside of the one or more wavelength bands can originate from noise (e.g., drift, ambient light, electrical noise), thereby enhancing signal analysis and noise rejection. In some examples, the comb light emitters can be activated sequentially such that a plurality of wavelengths across a spectrum can be measured. In some examples, the resolution and the number of spectral lines in the comb light source can be tuned by changing the properties of the quantum dots and/or increasing the number of comb light emitters.

5. 发明授权

US08624560B2 Controlling battery charging based on current, voltage and temperature 有权
标题翻译：根据电流，电压和温度控制电池充电
公开(公告)号：US08624560B2
公开(公告)日：2014-01-07
申请号：US12480581
申请日：2009-06-08
申请人： P. Jeffrey Ungar , Thomas C. Greening , William C. Athas , J. Douglas Field , Richard M. Mank
发明人： P. Jeffrey Ungar , Thomas C. Greening , William C. Athas , J. Douglas Field , Richard M. Mank
IPC分类号： H02J7/04 , H02J7/00
CPC分类号： H02J7/0091 , H01M4/505 , H01M4/525 , H01M4/5815 , H01M4/582 , H01M4/5825 , H01M4/587 , H01M10/0525 , H01M10/0568 , H01M10/44 , H01M10/443 , H01M10/48 , H01M10/486
摘要： Some embodiments of the present invention provide a system that charges a lithium-ion battery. During operation, the system monitors: a current through the battery, a voltage of the battery, and a temperature of the battery. Next, the system uses the monitored current, voltage and temperature to control a charging process for the battery. In some embodiments, controlling the charging process involves: inferring electrode lithium surface concentrations for the battery from the monitored current, voltage and temperature; and applying the charging current and/or the charging voltage in a manner that maintains the inferred electrode lithium surface concentrations for the battery within set limits.
摘要翻译：本发明的一些实施例提供了对锂离子电池充电的系统。在运行过程中，系统监视：通过电池的电流，电池的电压以及电池的温度。接下来，系统使用监控的电流，电压和温度来控制电池的充电过程。在一些实施例中，控制充电过程包括：从监测的电流，电压和温度推断电池的电极锂表面浓度; 以及将电池的推定电极锂表面浓度维持在设定限度内的方式施加充电电流和/或充电电压。

6. 发明申请

US20130293210A1 COUPLED VOLTAGE CONVERTERS 审中-公开
标题翻译：耦合电压转换器
公开(公告)号：US20130293210A1
公开(公告)日：2013-11-07
申请号：US13472068
申请日：2012-05-15
申请人： Eric G. Smith , Louis Luh , William C. Athas
发明人： Eric G. Smith , Louis Luh , William C. Athas
IPC分类号： G05F1/10
CPC分类号： H02M3/1584 , H02M2001/0032 , H02M2003/1586 , Y02B70/16
摘要： Embodiments of a power supply are disclosed that include a first voltage converter having a first feedback controller and a first regulated output, and second voltage converter having a second feedback controller and a second regulated output electrically coupled to the first regulated output. The power limit of the first voltage converter is lower than the power limit of the second voltage converter, and a reference voltage for the first feedback controller is higher than the reference voltage for the second feedback controller.
摘要翻译：公开了一种电源的实施例，其包括具有第一反馈控制器和第一调节输出的第一电压转换器，以及具有电耦合到第一调节输出的第二反馈控制器和第二调节输出的第二电压转换器。第一电压转换器的功率限制低于第二电压转换器的功率极限，第一反馈控制器的参考电压高于第二反馈控制器的参考电压。

7. 发明申请

US20130257382A1 Managing Cycle and Runtime in Batteries for Portable Electronic Devices 审中-公开
标题翻译：管理便携式电子设备电池的周期和运行时间
公开(公告)号：US20130257382A1
公开(公告)日：2013-10-03
申请号：US13467687
申请日：2012-05-09
申请人： J. Douglas Field , William C. Athas
发明人： J. Douglas Field , William C. Athas
IPC分类号： H02J7/00
CPC分类号： H02J7/0073 , H01M10/44 , H01M10/48 , H01M10/486 , H01M2220/30 , H02J7/0075 , H02J7/0086
摘要： The disclosed embodiments provide a system that manages use of a battery in a portable electronic device. The system includes a monitoring mechanism that monitors one or more battery-usage parameters of the battery during use of the battery with the portable electronic device. The battery-usage parameters may include a battery age, a resting time, a swell rate, a temperature, a cell balance, a voltage, a current, usage data about how the battery has been cycled, and/or user input. The system also includes a management apparatus that adjusts a charge-termination voltage or a discharge-termination voltage of the battery based on the battery-usage parameters to manage a cycle life of the battery, the swell rate, and/or a runtime of the battery.
摘要翻译：所公开的实施例提供一种管理便携式电子设备中的电池的使用的系统。该系统包括监测机构，该监视机构在使用便携式电子设备的电池期间监视电池的一个或多个电池使用参数。电池使用参数可以包括电池寿命，休息时间，膨胀率，温度，电池平衡，电压，电流，关于电池如何循环的使用数据和/或用户输入。该系统还包括管理装置，其基于电池使用参数调节电池的充电终止电压或放电终止电压，以管理电池的循环寿命，膨胀率和/或运行时间电池。

8. 发明授权

US08541999B2 Controlling power loss in a switched-capacitor power converter 有权
标题翻译：控制开关电容电源转换器的功率损耗
公开(公告)号：US08541999B2
公开(公告)日：2013-09-24
申请号：US12783728
申请日：2010-05-20
申请人： William C. Athas , Thomas C. Greening
发明人： William C. Athas , Thomas C. Greening
IPC分类号： G05F1/00 , H02M3/18
CPC分类号： H02M3/07 , H02M2001/0048 , Y02B70/1491
摘要： The disclosed embodiments relate to a system that implements a switched-capacitor power converter which is configured to actively control power loss while converting an input voltage to an output voltage. This system includes one or more switched-capacitor blocks (SCBs), wherein each SCB includes a first capacitor and a set of switching devices configured to couple a constant-potential terminal and a time-varying-potential terminal of the first capacitor between the input voltage, the output voltage and a reference voltage. The system also includes a clocking circuit which produces gate drive signals for switching transistors in the one or more SCBs. The system additionally includes a controller configured to actively control the gate drive signals from the clocking circuit to substantially minimize the power loss for the switched-capacitor power converter.
摘要翻译：所公开的实施例涉及实现开关电容器功率转换器的系统，其被配置为在将输入电压转换为输出电压的同时主动地控制功率损耗。该系统包括一个或多个开关电容器块（SCB），其中每个SCB包括第一电容器和一组开关器件，其被配置为将第一电容器的恒定电位端子和时变电位端子耦合在输入端电压，输出电压和参考电压。该系统还包括产生用于在一个或多个SCB中的开关晶体管的栅极驱动信号的时钟电路。该系统还包括控制器，其被配置为主动地控制来自时钟电路的栅极驱动信号，以基本上最小化开关电容器功率转换器的功率损耗。

9. 发明授权

US08085103B2 Resonant oscillator circuit with reduced startup transients 有权
标题翻译：谐振振荡电路具有降低的启动瞬变
公开(公告)号：US08085103B2
公开(公告)日：2011-12-27
申请号：US12629370
申请日：2009-12-02
申请人： William C. Athas
发明人： William C. Athas
IPC分类号： H03K3/282
CPC分类号： H02M3/07 , H03B5/06 , H03B5/1212 , H03B5/1228 , H03B2200/0094 , H03B2200/0096
摘要： Some embodiments of the present invention provide a system that implements a resonant oscillator circuit. This resonant oscillator circuit includes: a first inductor, a second inductor, a first capacitance, and a second capacitance, wherein the first and second inductors are configured to operate with the first and second capacitances to produce resonant oscillations which appear at a first phase output and a second phase output. The system also includes a startup circuit which is configured to start the resonant oscillator circuit in a state where: the first phase output is at a peak voltage; the second phase output is at a base voltage; and currents through the first and second inductors are substantially zero. By starting the resonant oscillator circuit in this state, the oscillations commence without a significant startup transient.
摘要翻译：本发明的一些实施例提供一种实现谐振振荡器电路的系统。该谐振振荡器电路包括：第一电感器，第二电感器，第一电容器和第二电容器，其中第一和第二电感器被配置为与第一和第二电容器一起工作，以产生出现在第一相位输出和第二相输出。该系统还包括启动电路，其被配置为在第一相输出处于峰值电压的状态下启动谐振振荡器电路; 第二相输出为基极电压; 并且通过第一和第二电感器的电流基本上为零。通过在该状态下启动谐振振荡器电路，振荡开始而没有明显的启动瞬变。

10. 发明授权

US07982548B2 Resonant oscillator with oscillation-startup circuitry 有权
标题翻译：具有振荡启动电路的谐振振荡器
公开(公告)号：US07982548B2
公开(公告)日：2011-07-19
申请号：US12540578
申请日：2009-08-13
申请人： William C. Athas
发明人： William C. Athas
IPC分类号： H03B5/12
CPC分类号： H02M3/07 , H03B5/06 , H03B5/1212 , H03B5/1228 , H03B2200/0094 , H03B2200/0096
摘要： Some embodiments of the present invention provide a system that implements a resonant oscillator circuit. This system includes a first inductor with a constant potential terminal coupled to an input voltage, and a time-varying potential terminal coupled to a first phase output. The system also includes a second inductor with a constant potential terminal coupled to the input voltage, and a time-varying potential terminal coupled to a second phase output. The system additionally includes a first n-type transistor with a source terminal coupled to a base voltage, a drain terminal coupled to the first phase output, and a gate terminal coupled to the second phase output. The system also includes a second n-type transistor with a source terminal coupled to the base voltage, a drain terminal coupled to the second phase output, and a gate terminal coupled to the first phase output. Finally, the system includes a startup circuit configured to commence oscillations in the resonant oscillator circuit by energizing the first inductor before energizing the second inductor.
摘要翻译：本发明的一些实施例提供一种实现谐振振荡器电路的系统。该系统包括具有耦合到输入电压的恒定电位端的第一电感器和耦合到第一相输出的时变电位端子。该系统还包括具有耦合到输入电压的恒定电位端子的第二电感器和耦合到第二相输出端的时变电位端子。该系统还包括具有耦合到基极电压的源极端子的第一n型晶体管，耦合到第一相位输出的漏极端子和耦合到第二相位输出的栅极端子。该系统还包括具有耦合到基极电压的源极端子的第二n型晶体管，耦合到第二相位输出的漏极端子和耦合到第一相位输出的栅极端子。最后，该系统包括启动电路，该启动电路经配置以在激励第二电感器之前激励第一电感器来开始谐振振荡器电路中的振荡。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式