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1. 发明授权

US09419272B2 Negative active material for rechargeable lithium battery, method of preparing same, and rechargeable lithium battery including same 有权
标题翻译：用于可再充电锂电池的负极活性材料，其制备方法和包括其的可再充电锂电池
公开(公告)号：US09419272B2
公开(公告)日：2016-08-16
申请号：US13369495
申请日：2012-02-09
申请人： Sung Soo Park , Yong-Sun Won , Jae-Hak Lee
发明人： Sung Soo Park , Yong-Sun Won , Jae-Hak Lee
IPC分类号： H01M4/88 , H01M4/134 , H01M4/58
CPC分类号： H01M4/134 , H01M4/58 , Y02E60/122 , Y02P70/54
摘要： Disclosed are a negative active material for a rechargeable lithium battery including lithium silicide having a I41-a crystalline phase structure, a method of manufacturing the same, and a rechargeable lithium battery including the same.
摘要翻译：公开了一种用于可再充电锂电池的负极活性材料，其包括具有I41-a结晶相结构的硅化锂，其制造方法和包含该锂二次电池的可再充电锂电池。

2. 发明申请

US20120231339A1 NEGATIVE ACTIVE MATERIAL FOR RECHARGEABLE LITHIUM BATTERY, METHOD OF PREPARING SAME, AND RECHARGEABLE LITHIUM BATTERY INCLUDING SAME 有权
标题翻译：用于可充电锂电池的负极活性材料，其制备方法和包括其的可充电锂电池
公开(公告)号：US20120231339A1
公开(公告)日：2012-09-13
申请号：US13369495
申请日：2012-02-09
申请人： Sung Soo Park , Yong-Sun Won , Jae-Hak Lee
发明人： Sung Soo Park , Yong-Sun Won , Jae-Hak Lee
IPC分类号： H01M4/40 , H01M4/38
CPC分类号： H01M4/134 , H01M4/58 , Y02E60/122 , Y02P70/54
摘要： Disclosed are a negative active material for a rechargeable lithium battery including lithium silicide having a I41-a crystalline phase structure, a method of manufacturing the same, and a rechargeable lithium battery including the same.
摘要翻译：公开了一种用于可再充电锂电池的负极活性材料，其包括具有I41-a结晶相结构的硅化锂，其制造方法和包括该锂二次电池的可再充电锂电池。

3. 发明申请

US20140011961A1 PRECURSOR COMPOUND CONNECTED TO SOLID SUPPORT FOR MANUFACTURING 18F RADIOPHARMACEUTICAL, METHOD FOR MANUFACTURING SAME, AND APPLICATION THEREOF 有权
标题翻译：连接到用于制造18F放射线制造的固体支持的前体化合物，其制造方法及其应用
公开(公告)号：US20140011961A1
公开(公告)日：2014-01-09
申请号：US13994339
申请日：2011-12-13
申请人： Dae-Yoon Chi , Byoung-Se Lee , Jae-Hak Lee , So-Young Chu , Woon-Jung Jung , Hye-Rim Kwon
发明人： Dae-Yoon Chi , Byoung-Se Lee , Jae-Hak Lee , So-Young Chu , Woon-Jung Jung , Hye-Rim Kwon
IPC分类号： C07D249/04 , C07C229/60 , C07D487/04 , C07D417/14 , C07D403/12 , C07H19/06
CPC分类号： C07D249/04 , A61K51/04 , A61K51/0406 , A61K51/0453 , A61K51/0455 , A61K51/0465 , A61K51/047 , A61K51/0491 , C07B59/00 , C07C229/60 , C07D403/12 , C07D417/14 , C07D487/04 , C07H19/06 , C08F8/02 , C08F8/30 , C08F8/34 , C08F8/44 , C08F12/26 , C08F12/30 , C08F212/08 , C08F212/14 , C08F212/32 , C08F12/18 , C08F12/22 , C08F212/36
摘要： The present invention relates to a solid precursor in the form of an organic salt, the solid precursor having a solid support, a method for manufacturing same, and an application thereof. The solid precursor of the present invention enables omission of the [18F]fluoride refining process using additional cartridge, and the use of excessive phase-transfer catalyst, and can easily remove remaining substance after reaction through the solid support inside the precursor. The solid precursor of the present invention is very appropriate for an automated synthesis device as an all-in-one system that can carry out overall process of [18F]fluorosis reaction, when used by charging in a cartridge.
摘要翻译：本发明涉及有机盐形式的固体前体，固体前体具有固体支持物，其制备方法及其应用。本发明的固体前体使用附加的滤芯省略了[18 F]氟化物精炼过程，并且使用过量的相转移催化剂，并且可以通过前体中的固体支持物容易地除去反应后的剩余物质。本发明的固体前体非常适合作为一体化系统的自动化合成装置，其可以在通过在筒中充电使用时进行[18 F]氟中毒反应的总体过程。

4. 发明申请

US20130256911A1 SEMICONDUCTOR CHIP STACK PACKAGE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体芯片堆栈及其制造方法
公开(公告)号：US20130256911A1
公开(公告)日：2013-10-03
申请号：US13391063
申请日：2010-02-22
申请人： Jae-Hak Lee , Chang-Woo Lee , Joon-Yub Song , Tae-Ho Ha
发明人： Jae-Hak Lee , Chang-Woo Lee , Joon-Yub Song , Tae-Ho Ha
IPC分类号： H01L23/488 , H01L21/50
CPC分类号： H01L23/488 , H01L21/50 , H01L24/26 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/92 , H01L25/0657 , H01L25/50 , H01L2224/04042 , H01L2224/26145 , H01L2224/27013 , H01L2224/29139 , H01L2224/2919 , H01L2224/29191 , H01L2224/32145 , H01L2224/48091 , H01L2224/73215 , H01L2224/73265 , H01L2224/82143 , H01L2224/83002 , H01L2224/83051 , H01L2224/83143 , H01L2224/83192 , H01L2224/9205 , H01L2224/92147 , H01L2225/0651 , H01L2225/06562 , H01L2225/06593 , H01L2924/00014 , H01L2924/10253 , H01L2924/30107 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates to a semiconductor chip stack package and a manufacturing method thereof, and more particularly, to a semiconductor chip stack package and a manufacturing method thereof in which a plurality of chips can be rapidly arranged and bonded without a precise device or operation so as to improve productivity
摘要翻译：半导体芯片堆叠封装及其制造方法技术领域本发明涉及一种半导体芯片堆叠封装及其制造方法，更具体地，涉及一种半导体芯片堆叠封装及其制造方法，其中可以在没有精确的装置或操作的情况下快速地布置和粘合多个芯片以提高生产率

5. 发明申请

US20130037813A1 CRYSTALLIZATION METHOD OF THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD FOR THIN FILM TRANSISTOR ARRAY PANEL 有权
标题翻译：薄膜晶体管，薄膜晶体管阵列的结晶方法和薄膜晶体管阵列的制造方法
公开(公告)号：US20130037813A1
公开(公告)日：2013-02-14
申请号：US13535007
申请日：2012-06-27
申请人： Joo-Han Kim , Hwa-Dong Jung , Wan-Soon Lim , Jee-Hun Lim , Joo Seok Yeom , Tae-Kyung Yim , Jae-Hak Lee , Hyuk Soon Kwon , Hyoung Cheol Lee , Jeong-Ju Park , Se-Myung Kwon , So-Young Koo
发明人： Joo-Han Kim , Hwa-Dong Jung , Wan-Soon Lim , Jee-Hun Lim , Joo Seok Yeom , Tae-Kyung Yim , Jae-Hak Lee , Hyuk Soon Kwon , Hyoung Cheol Lee , Jeong-Ju Park , Se-Myung Kwon , So-Young Koo
IPC分类号： H01L33/08
CPC分类号： H01L29/78663 , H01L27/1222 , H01L27/1285
摘要： Exemplary embodiments of the invention disclose a method of manufacturing a thin film transistor array panel having reduced overall processing time and providing a uniform crystallization. Exemplary embodiments of the invention also disclose a crystallization method of a thin film transistor, including forming on a substrate a semiconductor layer including a first pixel area, a second pixel area, and a third pixel area. The crystallization method includes crystallizing a portion of the semiconductor layer corresponding to a channel region of a thin film transistor using a micro lens array.
摘要翻译：本发明的示例性实施例公开了一种制造薄膜晶体管阵列面板的方法，其具有缩短的总体处理时间并提供均匀的结晶。本发明的示例性实施例还公开了一种薄膜晶体管的结晶方法，包括在基板上形成包括第一像素区域，第二像素区域和第三像素区域的半导体层。结晶方法包括使用微透镜阵列结晶对应于薄膜晶体管的沟道区的半导体层的一部分。

6. 发明授权

US08722513B2 Semiconductor chip stack package and manufacturing method thereof 有权
标题翻译：半导体芯片堆叠封装及其制造方法
公开(公告)号：US08722513B2
公开(公告)日：2014-05-13
申请号：US13391063
申请日：2011-02-22
申请人： Jae-Hak Lee , Chang-Woo Lee , Joon-Yub Song , Tae-Ho Ha
发明人： Jae-Hak Lee , Chang-Woo Lee , Joon-Yub Song , Tae-Ho Ha
IPC分类号： H01L21/30 , H01L21/31
CPC分类号： H01L23/488 , H01L21/50 , H01L24/26 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/92 , H01L25/0657 , H01L25/50 , H01L2224/04042 , H01L2224/26145 , H01L2224/27013 , H01L2224/29139 , H01L2224/2919 , H01L2224/29191 , H01L2224/32145 , H01L2224/48091 , H01L2224/73215 , H01L2224/73265 , H01L2224/82143 , H01L2224/83002 , H01L2224/83051 , H01L2224/83143 , H01L2224/83192 , H01L2224/9205 , H01L2224/92147 , H01L2225/0651 , H01L2225/06562 , H01L2225/06593 , H01L2924/00014 , H01L2924/10253 , H01L2924/30107 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates to a semiconductor chip stack package and a manufacturing method thereof, and more particularly, to a semiconductor chip stack package and a manufacturing method thereof in which a plurality of chips can be rapidly arranged and bonded without a precise device or operation so as to improve productivity.
摘要翻译：半导体芯片堆叠封装及其制造方法技术领域本发明涉及一种半导体芯片堆叠封装及其制造方法，更具体地，涉及一种半导体芯片堆叠封装及其制造方法，其中可以在没有精确的装置或操作的情况下快速地布置和粘合多个芯片以提高生产率。

7. 发明授权

US08513061B2 Method of fabricating a TSV for 3D packaging of semiconductor device 有权
标题翻译：制造半导体器件3D封装的TSV的方法
公开(公告)号：US08513061B2
公开(公告)日：2013-08-20
申请号：US13031861
申请日：2011-02-22
申请人： Jae-Hak Lee , Chang-Woo Lee , Joon-Yub Song , Tae-Ho Ha
发明人： Jae-Hak Lee , Chang-Woo Lee , Joon-Yub Song , Tae-Ho Ha
IPC分类号： H01L21/00 , H01L23/48
CPC分类号： H01L21/76898 , H01L24/03 , H01L24/05 , H01L24/24 , H01L24/27 , H01L24/29 , H01L24/82 , H01L24/83 , H01L24/92 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05548 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05669 , H01L2224/13009 , H01L2224/24011 , H01L2224/24146 , H01L2224/24226 , H01L2224/245 , H01L2224/27416 , H01L2224/27452 , H01L2224/2761 , H01L2224/27616 , H01L2224/29187 , H01L2224/821 , H01L2224/82101 , H01L2224/82143 , H01L2224/83001 , H01L2224/83013 , H01L2224/83143 , H01L2224/83192 , H01L2224/92 , H01L2224/9202 , H01L2224/92244 , H01L2225/06513 , H01L2225/06541 , H01L2924/01029 , H01L2924/00014 , H01L2224/03 , H01L2224/27 , H01L2224/83 , H01L2924/01074 , H01L2924/01013
摘要： The present invention relates to a through silicon via (TSV) for 3D packaging to integrate a semiconductor device and a method for manufacturing the same, and more particularly, to a through silicon via (TSV) for 3D packaging of a semiconductor device that is capable of improving production efficiency, having very high electric conductivity, and minimizing electrical signal delay, without using a carrier wafer by self-aligning substrates in a low temperature state and sequentially bonding a plurality of semiconductor dies (or semiconductor chips), and a method of manufacturing the same.
摘要翻译：本发明涉及一种用于3D封装的硅通孔（TSV），用于集成半导体器件及其制造方法，更具体地，涉及一种用于半导体器件的3D封装的贯穿硅通孔（TSV），其具有能够提高生产效率，具有非常高的导电性和最小化电信号延迟，而不用通过在低温状态下自对准衬底并顺序地接合多个半导体管芯（或半导体芯片）而使用载体晶片，以及制造相同。

8. 发明申请

US20050000397A1 Sewing machine 失效
标题翻译：缝纫机
公开(公告)号：US20050000397A1
公开(公告)日：2005-01-06
申请号：US10813983
申请日：2004-03-31
申请人： Jae-Hak Lee , Kyong-Min Ryu
发明人： Jae-Hak Lee , Kyong-Min Ryu
IPC分类号： D05B21/00 , D05B69/00 , D05B73/00 , D05B75/00
CPC分类号： D05B21/00 , D05B75/00
摘要： A sewing machine comprises: a head portion having a sewing needle driven to vertically reciprocate; a lower shaft having a shuttle connected thereto which is driven to rotate synchronized with the vertical movement of the sewing needle cooperating to form stitches; a table positioned above the lower shaft; a retainer positioned above the table to retain a material for forming stitches thereon; a holding frame placed parallel to the table, the head portion being mounted at a position on the holding frame; and supporting posts adapted to support opposite ends of the holding frame for positioning the holding frame above the table. The sewing machine allows a material to be sewn, which is retained retainer, to be easily mounted or removed.
摘要翻译：缝纫机包括：头部，其具有被驱动以垂直往复运动的缝纫针; 具有连接到其上的梭子的下轴被驱动以与缝合针的垂直运动同步地旋转以形成针迹; 位于下轴上方的工作台; 位于桌子上方的保持器，用于保持用于在其上形成针迹的材料; 平行于所述工作台放置的保持框架，所述头部安装在所述保持框架上的位置; 以及适于支撑保持框架的相对端的支撑柱，用于将保持框架定位在桌子上方。缝纫机允许缝合的材料（其是保持的保持器）容易地安装或移除。

9. 发明授权

US09751844B2 Precursor compound connected to solid support for manufacturing 18F radiopharmaceutical, method for manufacturing same, and application thereof 有权
公开(公告)号：US09751844B2
公开(公告)日：2017-09-05
申请号：US13994339
申请日：2011-12-13
申请人： Dae-Yoon Chi , Byoung-Se Lee , Jae-Hak Lee , So-Young Chu , Woon-Jung Jung , Hye-Rim Kwon
发明人： Dae-Yoon Chi , Byoung-Se Lee , Jae-Hak Lee , So-Young Chu , Woon-Jung Jung , Hye-Rim Kwon
IPC分类号： A61K9/00 , C07D249/04 , A61K51/04 , C07B59/00 , C07C229/60 , C07D403/12 , C07D417/14 , C07D487/04 , C07H19/06 , C08F212/08 , C08F212/14 , C08F8/02 , C08F8/30 , C08F8/34 , C08F8/44 , C08F12/26 , C08F12/30 , C08F212/32
CPC分类号： C07D249/04 , A61K51/04 , A61K51/0406 , A61K51/0453 , A61K51/0455 , A61K51/0465 , A61K51/047 , A61K51/0491 , C07B59/00 , C07C229/60 , C07D403/12 , C07D417/14 , C07D487/04 , C07H19/06 , C08F8/02 , C08F8/30 , C08F8/34 , C08F8/44 , C08F12/26 , C08F12/30 , C08F212/08 , C08F212/14 , C08F212/32 , C08F12/18 , C08F12/22 , C08F212/36
摘要： The present invention relates to a solid precursor in the form of an organic salt, the solid precursor having a solid support, a method for manufacturing same, and an application thereof. The solid precursor of the present invention enables omission of the [18F]fluoride refining process using additional cartridge, and the use of excessive phase-transfer catalyst, and can easily remove remaining substance after reaction through the solid support inside the precursor. The solid precursor of the present invention is very appropriate for an automated synthesis device as an all-in-one system that can carry out overall process of [18F]fluorosis reaction, when used by charging in a cartridge.

10. 发明授权

US08741672B2 Crystallization method of thin film transistor, thin film transistor array panel and manufacturing method for thin film transistor array panel 有权
标题翻译：薄膜晶体管，薄膜晶体管阵列面板的结晶方法及薄膜晶体管阵列面板的制造方法
公开(公告)号：US08741672B2
公开(公告)日：2014-06-03
申请号：US13535007
申请日：2012-06-27
申请人： Joo-Han Kim , Hwa-Dong Jung , Wan-Soon Lim , Jee-Hun Lim , Joo Seok Yeom , Tae-Kyung Yim , Jae-Hak Lee , Hyuk Soon Kwon , Hyoung Cheol Lee , Jeong-Ju Park , Se-Myung Kwon , So-Young Koo
发明人： Joo-Han Kim , Hwa-Dong Jung , Wan-Soon Lim , Jee-Hun Lim , Joo Seok Yeom , Tae-Kyung Yim , Jae-Hak Lee , Hyuk Soon Kwon , Hyoung Cheol Lee , Jeong-Ju Park , Se-Myung Kwon , So-Young Koo
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L29/78663 , H01L27/1222 , H01L27/1285
摘要： Exemplary embodiments of the invention disclose a method of manufacturing a thin film transistor array panel having reduced overall processing time and providing a uniform crystallization. Exemplary embodiments of the invention also disclose a crystallization method of a thin film transistor, including forming on a substrate a semiconductor layer including a first pixel area, a second pixel area, and a third pixel area. The crystallization method includes crystallizing a portion of the semiconductor layer corresponding to a channel region of a thin film transistor using a micro lens array.
摘要翻译：本发明的示例性实施例公开了一种制造薄膜晶体管阵列面板的方法，其具有缩短的总体处理时间并提供均匀的结晶。本发明的示例性实施例还公开了一种薄膜晶体管的结晶方法，包括在基板上形成包括第一像素区域，第二像素区域和第三像素区域的半导体层。结晶方法包括使用微透镜阵列结晶对应于薄膜晶体管的沟道区的半导体层的一部分。

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