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    • 8. 发明授权
    • Nonvolatile memory devices having improved read reliability
    • 具有改善的读取可靠性的非易失性存储器件
    • US08743604B2
    • 2014-06-03
    • US13009979
    • 2011-01-20
    • Donghyuk Chae
    • Donghyuk Chae
    • G11C11/34
    • G11C16/10G11C11/5628G11C11/5642G11C11/5678G11C13/0004G11C13/004G11C13/0064G11C13/0069G11C16/0483G11C16/3454G11C2211/5646
    • Memory systems include at least one nonvolatile memory array having a plurality of rows of nonvolatile multi-bit (e.g., N-bit, where N>2) memory cells therein. A control circuit is also provided, which is electrically coupled to the nonvolatile memory array. The control circuit is configured to program at least two pages of data into a first row of nonvolatile multi-bit memory cells in the nonvolatile memory array using a first sequence of read voltages to verify accuracy of the data stored within the first row. The control circuit is also configured to read the at least two pages of data from the first row using a second sequence of read voltages that is different from the first sequence of read voltages. Each of the read voltages in the first sequence of read voltages may be equivalent in magnitude to a corresponding read voltage in the second sequence of read voltages.
    • 存储器系统包括至少一个非易失性存储器阵列,其中具有多行非易失性多位(例如N位,其中N≥2)个存储单元。 还提供了一种控制电路,其电耦合到非易失性存储器阵列。 控制电路被配置为使用第一读取电压序列将至少两页数据编程到非易失性存储器阵列中的第一行非易失性多位存储器单元中,以验证存储在第一行内的数据的精度。 控制电路还被配置为使用与第一读取电压序列不同的第二读取电压序列从第一行中读取至少两页的数据。 第一读取电压序列中的每个读取电压的幅度可以在第二读取电压序列中与相应的读取电压相等。