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1. 发明授权

US5937312A Single-etch stop process for the manufacture of silicon-on-insulator wafers 失效
标题翻译：用于制造绝缘体上硅晶片的单蚀刻停止工艺
公开(公告)号：US5937312A
公开(公告)日：1999-08-10
申请号：US584058
申请日：1996-01-11
申请人： Subramanian S. Iyer , Emil Baran , Mark L. Mastroianni , Robert A. Craven
发明人： Subramanian S. Iyer , Emil Baran , Mark L. Mastroianni , Robert A. Craven
IPC分类号： H01L21/306 , H01L21/02 , H01L21/304 , H01L21/322 , H01L21/762 , H01L27/12 , H01L21/479
CPC分类号： H01L21/76251 , H01L21/3226 , Y10S148/012 , Y10S438/977
摘要： A single-etch stop process for the manufacture of silicon-on-insulator wafers. The process includes forming a silicon-on-insulator bonded wafers comprising a substrate layer, an oxide layer, a device layer, and a device wafer. The device layer is situated between the device wafer and the oxide layer and the oxide layer is between the device layer and the substrate layer. The device wafer has a p.sup.+ or n.sup.+ conductivity type and a resistivity ranging from about 0.005 ohm-cm to about 0.1 ohm-cm. A portion of the device wafer is removed from the silicon-on-insulator bonded wafers and the remaining portion of the device wafer has a defect-free surface after such removal. The remaining portion of the device wafer is then etched to expose the device layer.
摘要翻译：用于制造绝缘体上硅晶片的单蚀刻停止工艺。该方法包括形成包括衬底层，氧化物层，器件层和器件晶片的绝缘体上硅键合晶片。器件层位于器件晶片和氧化物层之间，氧化物层位于器件层和衬底层之间。器件晶片具有p +或n +导电类型，电阻率范围为约0.005欧姆 - 厘米至约0.1欧姆 - 厘米。器件晶片的一部分从绝缘体上硅键合的晶片上去除，器件晶片的剩余部分在去除之后具有无缺陷的表面。然后蚀刻器件晶片的剩余部分以暴露器件层。

2. 发明授权

US5494849A Single-etch stop process for the manufacture of silicon-on-insulator substrates 失效
标题翻译：用于制造绝缘体上硅衬底的单蚀刻停止工艺
公开(公告)号：US5494849A
公开(公告)日：1996-02-27
申请号：US409208
申请日：1995-03-23
申请人： Subramanian S. Iyer , Emil Baran , Mark L. Mastroianni , Robert A. Craven
发明人： Subramanian S. Iyer , Emil Baran , Mark L. Mastroianni , Robert A. Craven
IPC分类号： H01L21/322 , H01L21/762 , H01L21/76
CPC分类号： H01L21/3226 , H01L21/76251 , Y10S148/012 , Y10S148/135
摘要： A single-etch stop process for the manufacture of silicon-on-insulator substrates. The process includes forming a silicon-on-insulator bonded substrate comprising a handle wafer, a device wafer, a device layer having a thickness of between about 0.5 and 50 micrometers, and an oxide layer with the device layer being between the device wafer and the oxide layer and the oxide layer being between the device layer and the handle wafer, the device wafer having a boron concentration of at least about 1.times.10.sup.18 boron atoms/cm.sup.3 and a resistivity of about 0.01 to about 0.02 ohm-cm. A portion of the device wafer is mechanically removed from the silicon-on-insulator bonded substrate wherein the device wafer has a total thickness variation across the surface of the wafer of less than about 2 micrometers and a defect-free surface after the mechanical removal step. The defect-free surface of the device wafer is thereafter etched away to expose the device layer, and the exposed device layer is polished to produce a silicon-on-insulator substrate having a device layer the total thickness variation of which does not exceed 10% of the maximum thickness of the device layer.
摘要翻译：用于制造绝缘体上硅衬底的单蚀刻停止工艺。该方法包括形成绝缘体上硅键合衬底，其包括处理晶片，器件晶片，厚度在约0.5微米至50微米之间的器件层，以及具有器件层位于器件晶片和晶体管之间的氧化物层氧化物层和位于器件层和处理晶片之间的氧化物层，器件晶片的硼浓度为至少约1×1018硼原子/ cm3，电阻率为约0.01至约0.02欧姆 - 厘米。将器件晶片的一部分从绝缘体上硅键合衬底机械地移除，其中器件晶片具有小于约2微米的整个晶片表面的总厚度变化，以及机械去除步骤之后的无缺陷表面。此后，将器件晶片的无缺陷表面蚀刻掉以暴露器件层，并且对裸露的器件层进行抛光以产生绝缘体上硅衬底，其具有总厚度变化不超过10％的器件层的器件层的最大厚度。

3. 发明授权

US5834812A Edge stripped BESOI wafer 失效
标题翻译：边缘剥离BESOI晶圆
公开(公告)号：US5834812A
公开(公告)日：1998-11-10
申请号：US820593
申请日：1997-03-19
申请人： David I. Golland , Robert A. Craven , Ronald D. Bartram
发明人： David I. Golland , Robert A. Craven , Ronald D. Bartram
IPC分类号： H01L21/304 , H01L21/02 , H01L21/762 , H01L27/12 , H01L21/20
CPC分类号： H01L21/76251 , Y10S148/012 , Y10S148/135 , Y10S148/161 , Y10S438/977
摘要： A process for stripping the outer edge of a bonded BESOI wafer. The bonded BESOI wafer comprises a handle wafer, an oxide layer on one surface of the handle wafer, a device layer bonded to the oxide layer, and a p.sup.+ etch-stop layer on the device layer having an exposed face. The process comprises masking the exposed face of the p.sup.+ etch-stop layer, and abrading the periphery of the BESOI wafer to remove edge margins of the p.sup.+ etch-stop layer and device layer.
摘要翻译：剥离粘结的BESOI晶片的外边缘的方法。结合的BESOI晶片包括处理晶片，在处理晶片的一个表面上的氧化物层，结合到氧化物层的器件层，以及在具有暴露面的器件层上的p +蚀刻停止层。该方法包括掩蔽p +蚀刻停止层的暴露面，以及研磨BESOI晶片的周边以去除p +蚀刻停止层和器件层的边缘。

4. 发明授权

US06632028B1 Apparatus and method for aligning an optical fiber with an optical device 失效
标题翻译：用于使光纤与光学装置对准的装置和方法
公开(公告)号：US06632028B1
公开(公告)日：2003-10-14
申请号：US09938389
申请日：2001-08-24
申请人： Renyi Yang , Thomas Reynolds , Robert A. Craven , Aaron Hawkins
发明人： Renyi Yang , Thomas Reynolds , Robert A. Craven , Aaron Hawkins
IPC分类号： G02B636
CPC分类号： C12N9/0022 , A61K38/00
摘要： An apparatus and method for aligning an optical fiber with an optical device having bond pads attached thereto. The apparatus includes a fiber mount assembly having a body portion with an opening provided therein to receive the optical fiber, and two leg portions integrally connecting to and extending from the body portion. Bond pads are also attached to the two leg portions. The apparatus further includes an optical device mount assembly having bond pads attached thereto, and a plurality of eutectic solder bumps provided on the bond pads. The eutectic solder bumps connect the bond pads of the optical device and the two leg portions of the fiber mount assembly to the bond pads of the optical device mount assembly. The concentration of a component of the eutectic material in the solder bumps is increased, via a reaction between the bond pads and the solder bumps, until the eutectic material hardens and rigidly connects the bond pads of the optical device and the two leg portions of the fiber mount assembly to the bond pads of the optical device mount assembly, aligning the optical fiber with the optical device.
摘要翻译：一种用于使光纤与具有连接到其上的接合垫的光学装置对准的装置和方法。该装置包括具有主体部分的光纤安装组件，该主体部分设置有用于容纳光纤的开口，以及与主体部分整体连接并从身体部分延伸的两个腿部。接合垫也附接到两个腿部。该装置还包括具有连接到其上的接合焊盘的光学装置安装组件和设置在接合焊盘上的多个共晶焊料凸块。共晶焊料凸块将光学器件的接合焊盘和光纤安装组件的两个腿部连接到光学器件安装组件的接合焊盘。通过接合焊盘和焊料凸块之间的反应，焊料凸块中的共晶材料的成分浓度增加，直到共晶材料硬化并刚性地连接光学器件的接合焊盘和光纤安装组件到光学装置安装组件的接合焊盘，使光纤与光学装置对准

5. 发明授权

US5668045A Process for stripping outer edge of BESOI wafers 失效
标题翻译：剥离BESOI晶圆外边缘的工艺
公开(公告)号：US5668045A
公开(公告)日：1997-09-16
申请号：US346695
申请日：1994-11-30
申请人： David I. Golland , Robert A. Craven , Ronald D. Bartram
发明人： David I. Golland , Robert A. Craven , Ronald D. Bartram
IPC分类号： H01L21/304 , H01L21/02 , H01L21/762 , H01L27/12 , H01L21/20 , H01L21/461
CPC分类号： H01L21/76251 , Y10S148/012 , Y10S148/135 , Y10S148/161 , Y10S438/977
摘要： A process for stripping the outer edge of a bonded BESOI wafer. The bonded BESOI wafer comprises a handle wafer, an oxide layer on one surface of the handle wafer, a device layer bonded to the oxide layer, and a p.sup.+ etch-stop layer on the device layer having an exposed face. The process comprises masking the exposed face of the p.sup.+ etch-stop layer, and abrading the periphery of the BESOI wafer to remove edge margins of the p.sup.+ etch-stop layer and device layer.
摘要翻译：剥离粘结的BESOI晶片的外边缘的方法。结合的BESOI晶片包括处理晶片，在处理晶片的一个表面上的氧化物层，结合到氧化物层的器件层，以及在具有暴露面的器件层上的p +蚀刻停止层。该方法包括掩蔽p +蚀刻停止层的暴露面，以及研磨BESOI晶片的周边以去除p +蚀刻停止层和器件层的边缘。

6. 发明授权

US5418172A Method for detecting sources of contamination in silicon using a contamination monitor wafer 失效
标题翻译：使用污染监测器晶片检测硅污染源的方法
公开(公告)号：US5418172A
公开(公告)日：1995-05-23
申请号：US84405
申请日：1993-06-29
申请人： Robert Falster , Gabriella Borionetti , Robert A. Craven
发明人： Robert Falster , Gabriella Borionetti , Robert A. Craven
IPC分类号： H01L23/544 , H01L21/66
CPC分类号： H01L22/34
摘要： A method for detecting transition metal contamination in or on equipment and fluids used or being evaluated for use in the manufacture, handling, or shipping of silicon wafers and electronic devices manufactured on silicon wafers. A contamination monitor wafer having an average minority carrier lifetime greater than about 250 microseconds is processed using one or more pieces of equipment or fluids. As part of, or subsequent to the processing step, the contamination monitor wafer is exposed to a temperature of at least 600.degree. C. and the minority carrier lifetime values of the contamination monitor wafer is thereafter determined. To insure that the recombination process is dot dominated by the effects of oxygen precipitates, the contamination monitor wafer should have an oxygen precipitate density of less than 10.sup.8 oxygen precipitates per cubic centimeter before and after being exposed to said temperature of at least 600.degree. C.
摘要翻译：用于检测在硅晶片和硅晶片上制造的硅晶片和电子器件的制造，处理或运输中使用或被评估的设备和流体中的过渡金属污染的方法。使用一件或多件设备或流体处理具有大于约250微秒的平均少数载流子寿命的污染监测器晶片。作为处理步骤的一部分或之后，污染监测晶片暴露于至少600℃的温度，此后确定污染监测晶片的少数载流子寿命值。为了确保重组过程被氧沉淀物的影响所主导，污染监测晶片在暴露于至少600℃的温度之前和之后，应具有每立方厘米少于108个氧沉淀物的氧沉淀物密度。

7. 发明授权

US4787980A Ultra pure water system monitoring 失效
标题翻译：超纯水系统监控
公开(公告)号：US4787980A
公开(公告)日：1988-11-29
申请号：US914093
申请日：1986-10-01
申请人： Arthur J. Ackermann , Robert A. Craven
发明人： Arthur J. Ackermann , Robert A. Craven
IPC分类号： B01D61/12 , C02F1/44 , C02F9/00 , G01N33/18 , B01D13/00
CPC分类号： G01N33/18 , B01D61/12 , C02F1/441 , C02F9/00
摘要： This invention is directed to a hydraulic multiplex unit for receiving continuously one or more samples of liquid from a liquid purification system of distribution system and redirecting such sample or samples randomly or in sequence to one or more analytical instruments. The sample collecting system and multiplex unit is periodically backflushed with ozone to maintain the collection and analysis system clean of impurities, particles and the like which adversely affect the composition of the fluid samples.
摘要翻译：本发明涉及一种用于从分配系统的液体净化系统连续接收一个或多个液体样品并将这些样品或样品随机或顺序地重定向到一个或多个分析仪器的液压多路复用单元。样品收集系统和多路复用单元周期性地用臭氧冲洗，以使收集和分析系统清洁对流体样品的组成有不利影响的杂质，颗粒等。

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