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1. 发明授权

US6084537A Return-to-zero transmitter 失效
标题翻译：归零发送器
公开(公告)号：US6084537A
公开(公告)日：2000-07-04
申请号：US20102
申请日：1998-02-06
申请人： Steven P. Hardy , James T. Doyle
发明人： Steven P. Hardy , James T. Doyle
IPC分类号： H03M5/04
CPC分类号： H03M5/04 , H03M5/06 , H03M5/10
摘要： A return-to-zero transmitter includes a one shot circuit, an output circuitry and a timing generator. The one shot circuit is constructed to receive a signal that is indicative of a digital bit and generate an output signal that is indicative of positive and negative edges of the bit. The timing generator receives the output signal of the one shot circuit and causes the output circuitry to generate return-to-zero pulses in response to this signal.
摘要翻译：一个归零发射器包括单触发电路，输出电路和定时发生器。单触发电路被构造为接收指示数字位的信号，并产生指示该位的正和负沿的输出信号。定时发生器接收单触发电路的输出信号，并使输出电路响应于该信号产生归零脉冲。

2. 发明授权

US5942995A Return-to-zero receiver 失效
标题翻译：归零接收器
公开(公告)号：US5942995A
公开(公告)日：1999-08-24
申请号：US598
申请日：1997-12-30
申请人： Steven P. Hardy , James T. Doyle
发明人： Steven P. Hardy , James T. Doyle
IPC分类号： H03M5/12 , H04L25/02 , H03M5/04
CPC分类号： H04L25/0292 , H03M5/12
摘要： A return-to-zero (RZ) receiver is constructed to receive at least two pulses which are distinguishable. The receiver includes two single stage amplifiers. Each different single state amplifier receives a different one of the two pulses and generate signals in response. A summer of the receiver generates an output signal by summing the signals that are generated by the single stage amplifiers.
摘要翻译：构造了一个归零（RZ）接收器来接收至少两个可区分的脉冲。接收机包括两个单级放大器。每个不同的单态放大器接收两个脉冲中的不同的一个并产生响应的信号。接收器的加法器通过对由单级放大器产生的信号求和来产生输出信号。

3. 发明授权

US07750695B2 Phase-locked loop circuitry using charge pumps with current mirror circuitry 失效
标题翻译：使用带电流镜电路的电荷泵的锁相环电路
公开(公告)号：US07750695B2
公开(公告)日：2010-07-06
申请号：US11264283
申请日：2005-10-31
申请人： Randy J. Caplan , Steven P. Hardy , Andrew Cole
发明人： Randy J. Caplan , Steven P. Hardy , Andrew Cole
IPC分类号： H03L7/06
CPC分类号： H03L7/0895 , H03L7/0898 , H03L7/18
摘要： A system and method for performing phase-locked loop is disclosed. The system includes phase frequency detector circuitry, charge pump circuitry having first current mirror circuitry and second current mirror circuitry, loop filter circuitry, and voltage controlled oscillator circuitry. The phase frequency detector circuitry generates an up signal and a down signal based on the phase difference of an input signal and a feedback signal. The charge pump circuitry includes the first current mirror circuitry and the second mirror circuitry and generates a charge pump output signal based on the up and down signals. The loop filter circuitry generates a filtered control signal based on the charge pump output signal. The voltage controlled oscillator circuitry generates the feedback signal with a repeating waveform based on the filtered control signal.
摘要翻译：公开了一种用于执行锁相环的系统和方法。该系统包括相位频率检测器电路，电荷泵电路具有第一电流镜电路和第二电流镜电路，环路滤波器电路和压控振荡器电路。相位频率检测器电路基于输入信号和反馈信号的相位差产生上行信号和下降信号。电荷泵电路包括第一电流镜电路和第二镜电路，并且基于上下信号产生电荷泵输出信号。环路滤波器电路基于电荷泵输出信号产生滤波的控制信号。压控振荡器电路基于滤波的控制信号产生具有重复波形的反馈信号。

4. 发明授权

US07868808B2 Phase-locked loop circuitry using charge pumps with current mirror circuitry 有权
标题翻译：使用带电流镜电路的电荷泵的锁相环电路
公开(公告)号：US07868808B2
公开(公告)日：2011-01-11
申请号：US12700370
申请日：2010-02-04
申请人： Randy J. Caplan , Steven P. Hardy , Andrew Cole
发明人： Randy J. Caplan , Steven P. Hardy , Andrew Cole
IPC分类号： H03M1/66
CPC分类号： H03L7/0895 , H03L7/0898 , H03L7/18
摘要： A system and method for performing phase-locked loop is disclosed. The system includes phase frequency detector circuitry, charge pump circuitry having first current mirror circuitry and second current mirror circuitry, loop filter circuitry, and voltage controlled oscillator circuitry. The phase frequency detector circuitry generates an up signal and a down signal based on the phase difference of an input signal and a feedback signal. The charge pump circuitry includes the first current mirror circuitry and the second mirror circuitry and generates a charge pump output signal based on the up and down signals. The loop filter circuitry generates a filtered control signal based on the charge pump output signal. The voltage controlled oscillator circuitry generates the feedback signal with a repeating waveform based on the filtered control signal.
摘要翻译：公开了一种用于执行锁相环的系统和方法。该系统包括相位频率检测器电路，电荷泵电路具有第一电流镜电路和第二电流镜电路，环路滤波器电路和压控振荡器电路。相位频率检测器电路基于输入信号和反馈信号的相位差产生上行信号和下降信号。电荷泵电路包括第一电流镜电路和第二镜电路，并且基于上下信号产生电荷泵输出信号。环路滤波器电路基于电荷泵输出信号产生滤波的控制信号。压控振荡器电路基于滤波的控制信号产生具有重复波形的反馈信号。

5. 发明申请

US20100141491A1 PHASE-LOCKED LOOP CIRCUITRY USING CHARGE PUMPS WITH CURRENT MIRROR CIRCUITRY 有权
标题翻译：使用带电流镜电路的充电脉冲相锁定环路电路
公开(公告)号：US20100141491A1
公开(公告)日：2010-06-10
申请号：US12700370
申请日：2010-02-04
申请人： Randy J. Caplan , Steven P. Hardy , Andrew Cole
发明人： Randy J. Caplan , Steven P. Hardy , Andrew Cole
IPC分类号： H03M1/06
CPC分类号： H03L7/0895 , H03L7/0898 , H03L7/18
摘要： A system and method for performing phase-locked loop is disclosed. The system includes phase frequency detector circuitry, charge pump circuitry having first current mirror circuitry and second current mirror circuitry, loop filter circuitry, and voltage controlled oscillator circuitry. The phase frequency detector circuitry generates an up signal and a down signal based on the phase difference of an input signal and a feedback signal. The charge pump circuitry includes the first current mirror circuitry and the second mirror circuitry and generates a charge pump output signal based on the up and down signals. The loop filter circuitry generates a filtered control signal based on the charge pump output signal. The voltage controlled oscillator circuitry generates the feedback signal with a repeating waveform based on the filtered control signal.
摘要翻译：公开了一种用于执行锁相环的系统和方法。该系统包括相位频率检测器电路，电荷泵电路具有第一电流镜电路和第二电流镜电路，环路滤波器电路和压控振荡器电路。相位频率检测器电路基于输入信号和反馈信号的相位差产生上行信号和下降信号。电荷泵电路包括第一电流镜电路和第二镜电路，并且基于上下信号产生电荷泵输出信号。环路滤波器电路基于电荷泵输出信号产生滤波的控制信号。压控振荡器电路基于滤波的控制信号产生具有重复波形的反馈信号。

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