专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08863230B1 Methods of authenticating a programmable integrated circuit in combination with a non-volatile memory device 有权
标题翻译：将可编程集成电路与非易失性存储器件组合认证的方法
公开(公告)号：US08863230B1
公开(公告)日：2014-10-14
申请号：US11450755
申请日：2006-06-09
申请人： Steven K. Knapp , James A. Walstrum, Jr. , Shalin Umesh Sheth
发明人： Steven K. Knapp , James A. Walstrum, Jr. , Shalin Umesh Sheth
IPC分类号： G06F21/00
CPC分类号： G06F21/73 , G06F21/44 , G06F21/71
摘要： Methods of authenticating a combination of a programmable IC and a non-volatile memory device, where the non-volatile memory device stores a configuration data stream implementing a user design in the programmable IC. A first identifier unique to the programmable IC is stored in non-volatile memory in the programmable IC. A second identifier unique to the non-volatile memory device is stored in the non-volatile memory device. As part of the process in which the configuration data stream is used to program the programmable IC with the user design, a function is performed on the two identifiers, producing a key specific to the programmable IC/non-volatile memory device combination. The key is then compared to an expected value. When the key matches the expected value, the user design is enabled. When the key does not match the expected value, at least a portion of the user design is disabled.
摘要翻译：认证可编程IC和非易失性存储器件的组合的方法，其中非易失性存储器件存储在可编程IC中实现用户设计的配置数据流。可编程IC特有的第一标识符被存储在可编程IC中的非易失性存储器中。非易失性存储器件唯一的第二标识符被存储在非易失性存储器件中。作为使用配置数据流以用户设计对可编程IC进行编程的过程的一部分，对两个标识符执行功能，产生专用于可编程IC /非易失性存储器件组合的密钥。然后将关键字与预期值进行比较。当密钥与期望值匹配时，用户设计被启用。当该键与期望值不匹配时，用户设计的至少一部分被禁用。

2. 发明授权

US07987358B1 Methods of authenticating a user design in a programmable integrated circuit 有权
标题翻译：在可编程集成电路中认证用户设计的方法
公开(公告)号：US07987358B1
公开(公告)日：2011-07-26
申请号：US11450756
申请日：2006-06-09
申请人： James A. Walstrum, Jr. , Steven K. Knapp , Shalin Umesh Sheth
发明人： James A. Walstrum, Jr. , Steven K. Knapp , Shalin Umesh Sheth
IPC分类号： H04L29/06
CPC分类号： G06F21/123
摘要： Methods of authenticating a user design in a programmable integrated circuit. The methods utilize an identifier unique to the programmable IC and a data word taken from the user design. The data word can be unique to the design and can include a string of data taken from the configuration data for the design, or the values of circuit nodes read from selected points throughout the design. A function is performed on the identifier and the data word, producing a key specific to the user design as implemented in that programmable IC. The key is compared to an expected value. When the key matches the expected value, the user design is enabled. When the key does not match the expected value, at least a portion of the user design is disabled. Circuitry for performing the steps of the method can be implemented in the programmable resources of the programmable IC.
摘要翻译：在可编程集成电路中认证用户设计的方法。该方法利用可编程IC特有的标识符和从用户设计中获取的数据字。数据字可以是设计唯一的，并且可以包括从设计的配置数据中获取的一串数据，或者在整个设计中从选定点读取的电路节点的值。对标识符和数据字执行功能，产生专用于该可编程IC中实现的用户设计的密钥。将关键字与预期值进行比较。当密钥与期望值匹配时，用户设计被启用。当该键与期望值不匹配时，用户设计的至少一部分被禁用。用于执行该方法的步骤的电路可以在可编程IC的可编程资源中实现。

3. 发明授权

US07358762B1 Parallel interface for configuring programmable devices 有权
标题翻译：用于配置可编程器件的并行接口
公开(公告)号：US07358762B1
公开(公告)日：2008-04-15
申请号：US11131764
申请日：2005-05-18
申请人： James A. Walstrum, Jr. , Steven K. Knapp , Wayne E. Wennekamp
发明人： James A. Walstrum, Jr. , Steven K. Knapp , Wayne E. Wennekamp
IPC分类号： H03K19/173
CPC分类号： H03K19/17776 , H03K19/17744 , H03K19/17748
摘要： An interface between a programmable device and an external device coupled to the programmable device is described. The interface includes configurable control pins for providing control signals to the external device. The programmable device may be a field programmable gate array and the external device may be a nonvolatile memory. In some cases, the interface may be used to provide a byte-wide, or other parallel, interface. After configuration, the pins of the interface may be reclaimed and used for other purposes, such as accessing one or more external memories or other devices connected to a bus.
摘要翻译：描述了可编程设备和耦合到可编程设备的外部设备之间的接口。该接口包括用于向外部设备提供控制信号的可配置控制引脚。可编程器件可以是现场可编程门阵列，并且外部器件可以是非易失性存储器。在某些情况下，该接口可用于提供字节范围或其他并行接口。在配置之后，接口的引脚可以被回收并用于其他目的，例如访问一个或多个外部存储器或连接到总线的其他设备。

4. 发明授权

US07243227B1 Method and apparatus to copy protect software programs 有权
标题翻译：复制保护软件程序的方法和装置
公开(公告)号：US07243227B1
公开(公告)日：2007-07-10
申请号：US09949234
申请日：2001-09-07
申请人： Steven K. Knapp
发明人： Steven K. Knapp
IPC分类号： H04L9/00
CPC分类号： G06F21/121 , G06F21/572 , G06F21/73 , H04L9/3226 , H04L2209/605
摘要： A system and method are described for securing a configurable system on a chip (CSoC) or other programmable chip design to prevent unauthorized copying. A processor reads instructions from a memory device. The processor reads an identification code from an identification code provider. If no identification code has been previously imprinted on the memory, the processor imprints the provider identification code into the memory. If an identification code is already present, the memory identification code is compared with the provider identification code. If the memory identification code matches with the provider identification code, the processor is allowed to perform the program present on the memory. If the memory identification code does not match with the provider identification code, appropriate security countermeasures are taken. The program and identification code can be further encrypted on the memory for greater security, using the provider identification code as the encryption key.
摘要翻译：描述了一种系统和方法，用于将可配置系统固定在芯片（CSoC）或其他可编程芯片设计上，以防止未经授权的复制。处理器从存储器件读取指令。处理器从识别代码提供者读取识别码。如果以前没有将识别码印在存储器上，则处理器将提供者识别码印记到存储器中。如果已经存在识别码，则将存储器识别码与提供者识别码进行比较。如果存储器识别码与提供者识别码匹配，则允许处理器执行存储在存储器上的程序。如果存储器识别码与提供者识别码不匹配，则采取适当的安全对策。可以使用提供者识别码作为加密密钥，在存储器上进一步加密程序和识别码以更高的安全性。

5. 发明授权

US07454556B1 Method to program non-JTAG attached devices or memories using a PLD and its associated JTAG interface 有权
标题翻译：使用PLD及其相关JTAG接口对非JTAG连接设备或存储器进行编程的方法
公开(公告)号：US07454556B1
公开(公告)日：2008-11-18
申请号：US11049178
申请日：2005-02-02
申请人： Steven K. Knapp
发明人： Steven K. Knapp
IPC分类号： H03K19/173
CPC分类号： H03K19/17748 , H03K19/17744
摘要： A method is provided to program a memory device through a JTAG interface of an attached component with programmable logic, wherein the memory device does not have a JTAG interface. Initially, programming hardware to provide for programming of the attached memory is downloaded into the component via the component's JTAG interface. The programmed component then becomes a serial data link between the JTAG port attached to a host programmer and a non-JTAG port attached to the memory device. The circuitry downloaded or programmed into the component controls the timing and the protocol to program the external memory.
摘要翻译：提供了一种通过具有可编程逻辑的附加组件的JTAG接口对存储器件进行编程的方法，其中存储器件不具有JTAG接口。最初，通过组件的JTAG接口将编程硬件提供给附加存储器的编程。然后，编程的组件将成为连接到主机编程器的JTAG端口和连接到存储器设备的非JTAG端口之间的串行数据链路。下载或编程到组件中的电路控制定时和协议来编程外部存储器。

6. 发明授权

US07281082B1 Flexible scheme for configuring programmable semiconductor devices using or loading programs from SPI-based serial flash memories that support multiple SPI flash vendors and device families 有权
标题翻译：配置可编程半导体器件的灵活方案，使用或加载支持多个SPI闪存供应商和器件系列的SPI基于串行闪存的程序
公开(公告)号：US07281082B1
公开(公告)日：2007-10-09
申请号：US10810032
申请日：2004-03-26
申请人： Steven K. Knapp
发明人： Steven K. Knapp
IPC分类号： G06F12/00
CPC分类号： H03K19/17772 , G11C16/20 , G11C2216/30 , H03K19/17744 , H03K19/17748 , H03K19/1776
摘要： A method and structure for configuring a programmable logic device (PLD) from a serial peripheral interface (SPI) based serial memory. The type of the SPI memory is initially identified by the PLD. The PLD then selects the appropriate read command in response to the SPI memory type. The PLD then issues the read command to the SPI memory. In response, the SPI memory continuously provides a set of configuration data to the PLD. The PLD is configured in response to the configuration data. The PLD can identify the SPI memory type in response to control signals on pins of the PLD. Alternately, the PLD can identify the SPI memory type by performing a search. The search can include issuing a plurality of known read commands to the SPI memory, and then determining which read command causes the SPI memory to respond.
摘要翻译：一种用于从串行外设接口（SPI）串行存储器配置可编程逻辑器件（PLD）的方法和结构。 SPI存储器的类型最初由PLD识别。然后，PLD响应于SPI存储器类型选择适当的读取命令。然后，PLD向SPI存储器发出读命令。作为响应，SPI存储器连续向PLD提供一组配置数据。 PLD是根据配置数据配置的。 PLD可以根据PLD引脚上的控制信号识别SPI存储器类型。或者，PLD可以通过执行搜索来识别SPI存储器类型。搜索可以包括向SPI存储器发出多个已知读取命令，然后确定哪个读取命令使SPI存储器响应。

7. 发明授权

US06691266B1 Bus mastering debugging system for integrated circuits 有权
标题翻译：集成电路总线母盘调试系统
公开(公告)号：US06691266B1
公开(公告)日：2004-02-10
申请号：US09418948
申请日：1999-10-15
申请人： Steven P. Winegarden , Arye Ziklik , Steven K. Knapp
发明人： Steven P. Winegarden , Arye Ziklik , Steven K. Knapp
IPC分类号： G01R3128
CPC分类号： G01R31/31705 , G01R31/317
摘要： An integrated circuit includes a debugging unit which uses a multi-master general purpose bus within the IC to perform debugging functions. The storage elements of the IC are mapped into the address space of the general purpose bus. The debugging unit can operate as a bus master and read from or write to the storage elements of the integrated circuit directly with the general purpose bus. Thus, the integrated circuit can be rapidly configured for testing and debugging. Furthermore, the debugging unit can work with a breakpoint unit on the IC to detect and analyze specific situations on the IC.
摘要翻译：集成电路包括调试单元，其使用IC内的多主通用总线来执行调试功能。 IC的存储元件映射到通用总线的地址空间。调试单元可以作为总线主机工作，并直接用通用总线读取或写入集成电路的存储元件。因此，集成电路可以快速配置用于测试和调试。此外，调试单元可以使用IC上的断点单元来检测和分析IC上的特定情况。

8. 发明授权

US5737234A Method of optimizing resource allocation starting from a high level block diagram 失效
标题翻译：从高级框图开始优化资源分配的方法
公开(公告)号：US5737234A
公开(公告)日：1998-04-07
申请号：US672182
申请日：1996-06-27
申请人： Jorge P. Seidel , Steven K. Knapp
发明人： Jorge P. Seidel , Steven K. Knapp
IPC分类号： G06F17/50
CPC分类号： G06F17/5054
摘要： The more highly integrated programmable circuits include several kinds of resources for implementing the user's logic diagram. The resources provided in the chip hardware are intended to implement functions commonly specified by a user, in order for a complex chip to efficiently implement a complex design, the features called for in the design must be matched with the resources offered in the chip hardware. The present invention evaluates a user's logic diagram in comparison to resources available on a particular chip and matches a plurality of features in the design to resources in the chip which can efficiently implement those features.
摘要翻译：更高集成度的可编程电路包括用于实现用户逻辑图的几种资源。芯片硬件中提供的资源旨在实现用户通常指定的功能，为了使复杂的芯片有效地实现复杂的设计，设计中要求的功能必须与芯片硬件中提供的资源相匹配。本发明与特定芯片上可用的资源相比较，评估用户的逻辑图，并将设计中的多个特征与芯片中的资源匹配，这些资源可以有效地实现这些特征。

9. 发明授权

US07768293B1 Authentication for information provided to an integrated circuit 有权
标题翻译：验证信息提供给集成电路
公开(公告)号：US07768293B1
公开(公告)日：2010-08-03
申请号：US12421837
申请日：2009-04-10
申请人： Steven K. Knapp
发明人： Steven K. Knapp
IPC分类号： H03K19/00
CPC分类号： G06F21/572 , G06F21/73 , G06F2221/2117 , G06F2221/2129 , G06F2221/2143
摘要： A system for authentication of information provided to an integrated circuit, a method for rights management of an integrated circuit, and a method for configuring a programmable logic device are described. A memory is coupled to a programmable logic device. The memory includes an array of memory cells and storage devices. The storage devices provide a first storage space and a second storage space. The first storage space is for storing a first identifier. The second storage space is for storing a second identifier, which is a transformation of the first identifier. The array of memory cells is for storing configuration information to configure programmable logic of the programmable logic device. The configuration information includes authentication logic information.
摘要翻译：描述了提供给集成电路的信息的认证系统，集成电路的权限管理方法以及用于配置可编程逻辑器件的方法。存储器耦合到可编程逻辑器件。存储器包括存储器单元和存储设备的阵列。存储装置提供第一存储空间和第二存储空间。第一存储空间用于存储第一标识符。第二存储空间用于存储作为第一标识符的变换的第二标识符。存储单元阵列用于存储配置信息以配置可编程逻辑器件的可编程逻辑。配置信息包括认证逻辑信息。

10. 发明授权

US07535249B1 Authentication for information provided to an integrated circuit 有权
标题翻译：验证信息提供给集成电路
公开(公告)号：US07535249B1
公开(公告)日：2009-05-19
申请号：US11223388
申请日：2005-09-09
申请人： Steven K. Knapp
发明人： Steven K. Knapp
IPC分类号： G06F13/00
CPC分类号： G06F21/572 , G06F21/73 , G06F2221/2117 , G06F2221/2129 , G06F2221/2143
摘要： A system for authentication of information provided to an integrated circuit, a method for rights management of an integrated circuit, and a method for configuring a programmable logic device are described. A memory is coupled to a programmable logic device. The memory includes an array of memory cells and storage devices. The storage devices provide a first storage space and a second storage space. The first storage space is for storing a first identifier. The second storage space is for storing a second identifier, which is a transformation of the first identifier. The array of memory cells is for storing configuration information to configure programmable logic of the programmable logic device. The configuration information includes authentication logic information.
摘要翻译：描述了提供给集成电路的信息的认证系统，集成电路的权限管理方法以及用于配置可编程逻辑器件的方法。存储器耦合到可编程逻辑器件。存储器包括存储器单元和存储设备的阵列。存储装置提供第一存储空间和第二存储空间。第一存储空间用于存储第一标识符。第二存储空间用于存储作为第一标识符的变换的第二标识符。存储单元阵列用于存储配置信息以配置可编程逻辑器件的可编程逻辑。配置信息包括认证逻辑信息。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式