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1. 发明申请

US20050003626A1 Control of buried oxide in SIMOX 有权
标题翻译：在SIMOX中控制埋氧化物
公开(公告)号：US20050003626A1
公开(公告)日：2005-01-06
申请号：US10896812
申请日：2004-07-22
申请人： Stephen Fox , Neena Garg , Kenneth Giewont , Junedong Lee , Siegfried Maurer , Dan Moy , Maurice Norcott , Devendra Sadana
发明人： Stephen Fox , Neena Garg , Kenneth Giewont , Junedong Lee , Siegfried Maurer , Dan Moy , Maurice Norcott , Devendra Sadana
IPC分类号： H01L21/762 , H01L21/76 , H01L21/425
CPC分类号： H01L21/76243
摘要： A method for forming a semiconductor-on-insulator (SOI) substrate is described incorporating the steps of heating a substrate, implanting oxygen into a heated substrate, cooling the substrate, implanting into a cooled substrate and annealing. The steps of implanting may be at several energies to provide a plurality of depths and corresponding buried damaged regions. Prior to implanting, the step of cleaning the substrate surface and/or forming a patterned mask thereon may be performed. The invention overcomes the problem of raising the quality of buried oxide and its properties such as surface roughness, uniform thickness and breakdown voltage Vbd.
摘要翻译：描述了一种用于形成绝缘体上半导体（SOI）衬底的方法，其包括加热衬底，将氧注入加热衬底，冷却衬底，注入冷却衬底和退火的步骤。植入的步骤可以是几种能量以提供多个深度和相应的埋入损伤区域。在植入之前，可以执行清洁衬底表面和/或在其上形成图案化掩模的步骤。本发明克服了提高掩埋氧化物质量及其性能如表面粗糙度，均匀厚度和击穿电压Vbd的问题。

2. 发明申请

US20050170570A1 High electrical quality buried oxide in simox 审中-公开
标题翻译：高电气质量埋藏氧化物
公开(公告)号：US20050170570A1
公开(公告)日：2005-08-04
申请号：US10768341
申请日：2004-01-30
申请人： Joel DeSouza , Keith Fogel , Harold Hovel , Junedong Lee , Siegfried Maurer , Devendra Sadana , Dominic Schepis
发明人： Joel DeSouza , Keith Fogel , Harold Hovel , Junedong Lee , Siegfried Maurer , Devendra Sadana , Dominic Schepis
IPC分类号： H01L21/00 , H01L21/762 , H01L21/84
CPC分类号： H01L21/76243 , H01L21/84
摘要： A SIMOX (separation by implanted oxygen) process is provided that forms a silicon-on-insulator (SOI) substrate having a buried oxide with improved electrical properties. The process implements at least one of the following processing steps into SIMOX: (I) lowering of the oxygen ion dose in the base oxygen ion implant step; (II) off-setting the implant energy of the room temperature (RT) implant step to a value that is about 5 to about 20% lower than the base ion implant step; and (III) creating a soak cycle, i.e., pre-annealing step, prior to the internal oxidation anneal which allows dissolution of Si and SiOx precipitates in the oxygen implanted region. The temperature and time of the soak cycle as well as the base implant dose are critical in determining the final BOX quality.
摘要翻译：提供SIMOX（通过注入氧的分离）工艺，其形成具有改善的电性能的具有掩埋氧化物的绝缘体上硅（SOI）衬底。该方法将至少一个以下处理步骤实施到SIMOX中：（I）降低基氧离子注入步骤中的氧离子剂量; （II）将室温（RT）注入步骤的植入能量设置为比基础离子注入步骤低约5至约20％的值; 和（III）在内部氧化退火之前产生浸泡循环，即预退火步骤，其允许在氧注入区域中溶解Si和SiO x X沉淀。浸泡循环的温度和时间以及基础植入剂量对于确定最终BOX质量至关重要。

3. 发明申请

US20050067055A1 Thin buried oxides by low-dose oxygen implantation into modified silicon 失效
标题翻译：通过低剂量氧注入到改性硅中的薄埋氧化物
公开(公告)号：US20050067055A1
公开(公告)日：2005-03-31
申请号：US10674647
申请日：2003-09-30
申请人： Kwang Choe , Keith Fogel , Siegfried Maurer , Ryan Mitchell , Devendra Sadana
发明人： Kwang Choe , Keith Fogel , Siegfried Maurer , Ryan Mitchell , Devendra Sadana
IPC分类号： H01L21/265 , H01L21/3063 , H01L21/316 , H01L21/762 , C23C8/36
CPC分类号： H01L21/76243 , H01L21/26533 , H01L21/3063 , H01L21/31662
摘要： A method of fabricating silicon-on-insulators (SOIs) having a thin, but uniform buried oxide region beneath a Si-containing over-layer is provided. The SOI structures are fabricated by first modifying a surface of a Si-containing substrate to contain a large concentration of vacancies or voids. Next, a Si-containing layer is typically, but not always, formed atop the substrate and then oxygen ions are implanted into the structure utilizing a low-oxygen dose. The structure is then annealed to convert the implanted oxygen ions into a thin, but uniform thermal buried oxide region.
摘要翻译：提供了一种制造在含Si的上层下方具有薄但均匀的掩埋氧化物区域的硅绝缘体（SOI）的方法。通过首先修饰含Si衬底的表面以包含大量的空位或空隙的浓度来制造SOI结构。接下来，含硅层通常但不总是形成在衬底顶上，然后使用低氧剂量将氧离子注入到结构中。然后将结构退火以将注入的氧离子转化成薄但均匀的热掩埋氧化物区域。

4. 发明授权

US08476152B2 N-type carrier enhancement in semiconductors 失效
标题翻译：半导体中的N型载流子增强
公开(公告)号：US08476152B2
公开(公告)日：2013-07-02
申请号：US13436850
申请日：2012-03-31
申请人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
发明人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
IPC分类号： H01L21/265
CPC分类号： H01L21/26513 , H01L29/165 , H01L29/167 , H01L29/66636 , Y10S438/919
摘要： A method includes epitaxially growing a germanium (Ge) layer onto a Ge substrate and incorporating a compensating species with a compensating atomic radius into the Ge layer. The method includes implanting an n-type dopant species with a dopant atomic radius into the Ge layer. The method includes selecting the n-type dopant species and the compensating species in such manner that the size of the Ge atomic radius is inbetween the n-type dopant atomic radius and the compensating atomic radius.
摘要翻译：一种方法包括将锗（Ge）层外延生长到Ge衬底上并将具有补偿原子半径的补偿物质结合到Ge层中。该方法包括将具有掺杂剂原子半径的n型掺杂物种类植入到Ge层中。该方法包括选择n型掺杂剂物质和补偿物质，使得Ge原子半径的大小在n型掺杂剂原子半径和补偿原子半径之间。

5. 发明申请

US20120190161A1 N-type carrier enhancement in semiconductors 失效
标题翻译：半导体中的N型载流子增强
公开(公告)号：US20120190161A1
公开(公告)日：2012-07-26
申请号：US13437036
申请日：2012-04-02
申请人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
发明人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
IPC分类号： H01L21/336
CPC分类号： H01L21/26513 , H01L29/165 , H01L29/167 , H01L29/66636 , Y10S438/919
摘要： A field effect transistor (FET) has a channel hosted in Ge. The FET has silicon-germanium (SiGe) source and drain formed by selective epitaxy. The SiGe source and drain exert a tensile stress onto the Ge channel. During forming of the SiGe source and drain, an n-type dopant species and a compensating species are being incorporated into the SiGe source and drain. The n-type dopant species and the compensating species are so selected that the size of the SiGe atomic radius is inbetween the dopant atomic radius and the compensating species atomic radius.
摘要翻译：场效应晶体管（FET）具有在Ge中托管的通道。 FET通过选择性外延形成硅 - 锗（SiGe）源极和漏极。 SiGe源极和漏极在Ge沟道上施加拉伸应力。在形成SiGe源极和漏极期间，n型掺杂物质和补偿物质被并入到SiGe源极和漏极中。选择n型掺杂物种类和补偿种类，使得SiGe原子半径的尺寸在掺杂剂原子半径和补偿物质原子半径之间。

6. 发明授权

US08343863B2 N-type carrier enhancement in semiconductors 有权
标题翻译：半导体中的N型载流子增强
公开(公告)号：US08343863B2
公开(公告)日：2013-01-01
申请号：US13357656
申请日：2012-01-25
申请人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
发明人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
IPC分类号： H01L21/265 , H01L21/336
CPC分类号： H01L21/26513 , H01L29/165 , H01L29/167 , H01L29/66636 , Y10S438/919
摘要： A method for generating n-type carriers in a semiconductor is disclosed. The method includes supplying a semiconductor having an atomic radius. Implanting an n-type dopant species into the semiconductor, which n-type dopant species has a dopant atomic radius. Implanting a compensating species into the semiconductor, which compensating species has a compensating atomic radius. Selecting the n-type dopant species and the compensating species in such manner that the size of the semiconductor atomic radius is inbetween the dopant atomic radius and the compensating atomic radius. A further method is disclosed for generating n-type carriers in germanium (Ge). The method includes setting a target concentration for the carriers, implanting a dose of an n-type dopant species into the Ge, and selecting the dose to correspond to a fraction of the target carrier concentration. Thermal annealing the Ge in such manner as to activate the n-type dopant species and to repair a least a portion of the implantation damage. Repeating the implantation and the thermal annealing until the target n-type carrier concentration has been reached.
摘要翻译：公开了一种在半导体中产生n型载流子的方法。该方法包括提供具有原子半径的半导体。将n型掺杂物种植入半导体，其中n型掺杂剂物质具有掺杂剂原子半径。将补偿物种植入到半导体中，补偿物质具有补偿原子半径。以使得半导体原子半径的尺寸在掺杂剂原子半径和补偿原子半径之间的方式选择n型掺杂物种类和补偿种类。公开了用于在锗（Ge）中生成n型载流子的另一种方法。该方法包括设定载体的目标浓度，将一定剂量的n型掺杂剂物质注入到Ge中，并选择与目标载体浓度分数相对应的剂量。对Ge进行热退火，以激活n型掺杂物种类并修复至少一部分注入损伤。重复注入和热退火直到目标n型载流子浓度达到。

7. 发明申请

US20100261319A1 N-type carrier enhancement in semiconductors 有权
标题翻译：半导体中的N型载流子增强
公开(公告)号：US20100261319A1
公开(公告)日：2010-10-14
申请号：US12420258
申请日：2009-04-08
申请人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
发明人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
IPC分类号： H01L21/265 , H01L21/20 , H01L21/335
CPC分类号： H01L21/26513 , H01L29/165 , H01L29/167 , H01L29/66636 , Y10S438/919
摘要： A method for generating n-type carriers in a semiconductor is disclosed. The method includes supplying a semiconductor having an atomic radius. Implanting an n-type dopant species into the semiconductor, which n-type dopant species has a dopant atomic radius. Implanting a compensating species into the semiconductor, which compensating species has a compensating atomic radius. Selecting the n-type dopant species and the compensating species in such manner that the size of the semiconductor atomic radius is inbetween the dopant atomic radius and the compensating atomic radius. A further method is disclosed for generating n-type carriers in germanium (Ge). The method includes setting a target concentration for the carriers, implanting a dose of an n-type dopant species into the Ge, and selecting the dose to correspond to a fraction of the target carrier concentration. Thermal annealing the Ge in such manner as to activate the n-type dopant species and to repair a least a portion of the implantation damage. Repeating the implantation and the thermal annealing until the target n-type carrier concentration has been reached.
摘要翻译：公开了一种在半导体中产生n型载流子的方法。该方法包括提供具有原子半径的半导体。将n型掺杂物种植入半导体，其中n型掺杂剂物质具有掺杂剂原子半径。将补偿物种植入到半导体中，补偿物质具有补偿原子半径。以使得半导体原子半径的尺寸在掺杂剂原子半径和补偿原子半径之间的方式选择n型掺杂物种类和补偿种类。公开了用于在锗（Ge）中生成n型载流子的另一种方法。该方法包括设定载体的目标浓度，将一定剂量的n型掺杂剂物质注入到Ge中，并选择与目标载体浓度分数相对应的剂量。对Ge进行热退火，以激活n型掺杂物种类并修复至少一部分注入损伤。重复注入和热退火直到目标n型载流子浓度达到。

8. 发明授权

US08642431B2 N-type carrier enhancement in semiconductors 失效
标题翻译：半导体中的N型载流子增强
公开(公告)号：US08642431B2
公开(公告)日：2014-02-04
申请号：US13437036
申请日：2012-04-02
申请人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
发明人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
IPC分类号： H01L21/336
CPC分类号： H01L21/26513 , H01L29/165 , H01L29/167 , H01L29/66636 , Y10S438/919
摘要： A field effect transistor (FET) has a channel hosted in Ge. The FET has silicon-germanium (SiGe) source and drain formed by selective epitaxy. The SiGe source and drain exert a tensile stress onto the Ge channel. During forming of the SiGe source and drain, an n-type dopant species and a compensating species are being incorporated into the SiGe source and drain. The n-type dopant species and the compensating species are so selected that the size of the SiGe atomic radius is inbetween the dopant atomic radius and the compensating species atomic radius.
摘要翻译：场效应晶体管（FET）具有在Ge中托管的通道。 FET通过选择性外延形成硅 - 锗（SiGe）源极和漏极。 SiGe源极和漏极在Ge沟道上施加拉伸应力。在形成SiGe源极和漏极期间，n型掺杂物质和补偿物质被并入到SiGe源极和漏极中。选择n型掺杂物种类和补偿种类，使得SiGe原子半径的尺寸在掺杂剂原子半径和补偿物质原子半径之间。

9. 发明授权

US08178430B2 N-type carrier enhancement in semiconductors 有权
公开(公告)号：US08178430B2
公开(公告)日：2012-05-15
申请号：US12420258
申请日：2009-04-08
申请人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
发明人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
IPC分类号： H01L21/265 , H01L21/425
CPC分类号： H01L21/26513 , H01L29/165 , H01L29/167 , H01L29/66636 , Y10S438/919
摘要： A method for generating n-type carriers in a semiconductor is disclosed. The method includes supplying a semiconductor having an atomic radius. Implanting an n-type dopant species into the semiconductor, which n-type dopant species has a dopant atomic radius. Implanting a compensating species into the semiconductor, which compensating species has a compensating atomic radius. Selecting the n-type dopant species and the compensating species in such manner that the size of the semiconductor atomic radius is inbetween the dopant atomic radius and the compensating atomic radius. A further method is disclosed for generating n-type carriers in germanium (Ge). The method includes setting a target concentration for the carriers, implanting a dose of an n-type dopant species into the Ge, and selecting the dose to correspond to a fraction of the target carrier concentration. Thermal annealing the Ge in such manner as to activate the n-type dopant species and to repair a least a portion of the implantation damage. Repeating the implantation and the thermal annealing until the target n-type carrier concentration has been reached.

10. 发明申请

US20120190177A1 N-type carrier enhancement in semiconductors 失效
标题翻译：半导体中的N型载流子增强
公开(公告)号：US20120190177A1
公开(公告)日：2012-07-26
申请号：US13436850
申请日：2012-03-31
申请人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
发明人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
IPC分类号： H01L21/265 , H01L21/20
CPC分类号： H01L21/26513 , H01L29/165 , H01L29/167 , H01L29/66636 , Y10S438/919
摘要： A method includes epitaxially growing a germanium (Ge) layer onto a Ge substrate and incorporating a compensating species with a compensating atomic radius into the Ge layer. The method includes implanting an n-type dopant species with a dopant atomic radius into the Ge layer. The method includes selecting the n-type dopant species and the compensating species in such manner that the size of the Ge atomic radius is inbetween the n-type dopant atomic radius and the compensating atomic radius.
摘要翻译：一种方法包括将锗（Ge）层外延生长到Ge衬底上并将具有补偿原子半径的补偿物质结合到Ge层中。该方法包括将具有掺杂剂原子半径的n型掺杂物种类植入到Ge层中。该方法包括选择n型掺杂剂物质和补偿物质，使得Ge原子半径的大小在n型掺杂剂原子半径和补偿原子半径之间。

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