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1. 发明申请

US20070183415A1 Method and system for internal data loop back in a high data rate switch 审中-公开
标题翻译：内部数据的方法和系统循环回到高数据速率开关
公开(公告)号：US20070183415A1
公开(公告)日：2007-08-09
申请号：US11346671
申请日：2006-02-03
申请人： Stephen Fischer , Lampros Kalampoukas , Anand Kanagala
发明人： Stephen Fischer , Lampros Kalampoukas , Anand Kanagala
IPC分类号： H04L12/56 , H04J3/16
CPC分类号： H04L49/3009 , H04L49/602
摘要： A method and system for internal data loop back in a packet switch is provided. In some instances, the switch may be required to process multiple layers of a header within the data packet, such as when data is transferred over the network encapsulated with a TCP header at the Transport Layer to form a TCP packet, then encapsulated with an IP header at the Network Layer to form an IP packet, then encapsulated with one or more MPLS headers to form a MPLS packet, and then encapsulated with an Ethernet header at the Link Layer to form an Ethernet packet. In such an instance, the data packet can be iteratively processed by the packet switch using an internal loop back technique. An internal loop back may be accomplished by using a header providing internal routing instructions resulting in the data packet being routed directly from an egress queue back to an ingress queue whereupon the lower levels of the header can be processed.
摘要翻译：提供了一种在数据包交换机中循环回内部数据的方法和系统。在一些情况下，可能需要交换机来处理数据分组内的报头的多层，例如当数据通过传输层上用TCP报头封装的网络传输以形成TCP分组时，然后用IP封装在网络层的头部形成一个IP包，然后用一个或多个MPLS头封装形成一个MPLS包，然后用链路层的以太网头封装形成一个以太网包。在这种情况下，数据分组可以使用内部循环技术由分组交换机进行迭代处理。可以通过使用提供内部路由指令的报头来实现内部循环，该报头导致数据分组从出口队列直接路由到入口队列，从而可以处理报头的较低级别。

2. 发明申请

US20080175241A1 SYSTEM AND METHOD FOR OBTAINING PACKET FORWARDING INFORMATION 审中-公开
标题翻译：用于获取分组信息的系统和方法
公开(公告)号：US20080175241A1
公开(公告)日：2008-07-24
申请号：US11624444
申请日：2007-01-18
申请人： Lampros Kalampoukas , Stephen Fischer
发明人： Lampros Kalampoukas , Stephen Fischer
IPC分类号： H04L12/56
CPC分类号： H04L45/00 , H04L45/586 , H04L45/60 , H04L45/7453
摘要： Obtaining packet forwarding data for routing packets. The steps may include (1) receiving packet identification information including a virtual router identifier (VRID) and route data; (2) determining if the VRID of the received packet identification information belongs to a pre-defined set of VRIDs. Additionally, if the VRID of the received packet identification information belongs to the pre-defined set of VRIDs, then the method preferably performs the steps of: (1) converting the VRID into a shortened VRID; and (2) obtaining packet forwarding data by performing a ternary content addressable memory (TCAM) lookup using a short key. But if the VRID of the received packet identification information does not belong to the pre-defined set of VRIDs, then the method performs the step of obtaining packet forwarding data by performing a ternary content addressable memory (TCAM) lookup using a long key.
摘要翻译：获取路由数据包的数据包转发数据。步骤可以包括（1）接收包括虚拟路由器标识符（VRID）和路由数据的分组标识信息; （2）确定所接收的分组标识信息的VRID是否属于预定义的VRID集合。此外，如果接收到的分组识别信息的VRID属于预定义的VRID集合，则该方法优选地执行以下步骤：（1）将VRID转换为缩短的VRID; 和（2）通过使用短键执行三进制内容可寻址存储器（TCAM）查找来获得分组转发数据。但是，如果接收到的分组识别信息的VRID不属于预定义的VRID集合，则该方法通过使用长密钥执行三进制内容可寻址存储器（TCAM）查找来执行获取分组转发数据的步骤。

3. 发明授权

US06438101B1 Method and apparatus for managing congestion within an internetwork using window adaptation 失效
标题翻译：使用窗口适应来管理互联网内的拥塞的方法和装置
公开(公告)号：US06438101B1
公开(公告)日：2002-08-20
申请号：US09085954
申请日：1998-05-27
申请人： Lampros Kalampoukas , Kadangode K. Ramakrishnan , Anujan Varma
发明人： Lampros Kalampoukas , Kadangode K. Ramakrishnan , Anujan Varma
IPC分类号： G01R3108
CPC分类号： H04L47/27 , H04L47/10 , H04L47/193 , H04L47/30 , H04L49/30
摘要： Congestion is controlled in an internetwork having at least two segments coupled by a router where at least one connection between communication devices passes through the router. Each connection is assumed to use a window-based flow control protocol between its source and destination. On receiving an acknowledgment from a connection in the router, where the acknowledgment contains a window size set by the destination, the router adaptively determines a second window size for the connection based on the router's average buffer occupancy and its instantaneous buffer occupancy. If the window size in the acknowledgment exceeds this second window size, the window size in the acknowledgment is overwritten to select the second window size. The router then forwards the acknowledgment to the source, thereby controlling the window size available to the source as a function of the congestion in the router.
摘要翻译：拥塞在具有至少两个段的互联网络中被控制，路由器耦合至少两个段，其中通信设备之间的至少一个连接通过路由器。假设每个连接在其源和目的地之间使用基于窗口的流控制协议。在从路由器中的连接接收到确认的确认包含由目的地设置的窗口大小的情况下，路由器基于路由器的平均缓冲器占用率及其瞬时缓冲器占用率自适应地确定连接的第二窗口大小。如果确认中的窗口大小超过第二个窗口大小，则覆盖确认中的窗口大小将被覆盖以选择第二个窗口大小。路由器然后将确认转发给源，从而根据路由器的拥塞控制源可用的窗口大小。

4. 发明授权

US07155473B2 High-speed parallel-prefix modulo 2n-1 adders 有权
标题翻译：高速并行前缀模2n-1加法器
公开(公告)号：US07155473B2
公开(公告)日：2006-12-26
申请号：US10333394
申请日：2001-07-16
申请人： Lampros Kalampoukas , Costas Efstathiou , Dimitris Nikoloo , Haridimos T. Vergos , John Kalamatianos
发明人： Lampros Kalampoukas , Costas Efstathiou , Dimitris Nikoloo , Haridimos T. Vergos , John Kalamatianos
IPC分类号： G06F7/50 , G06F7/38
CPC分类号： G06F7/727 , G06F7/508 , G06F2207/5063
摘要： A parallel-prefix modulo 2n−1 adder that is as fast as the fastest parallel prefix 2n integer adders, does not require an extra level of logic to generate the carry values, and has a very regular structure to which pipeline registers can easily be added. All nodes of the adder have a fanout ≦2. In the prefix structure of the adder, each carry value term output by the parallel prefix structure is determined by the all of the bits in the operands input to the adder. In one embodiment, there are log2 n stages in the prefix structure. Each stage has n logical operators, and all of the logical operators in the prefix structure are of the same kind. Pipeline registers may be inserted before and/or after a stage in the prefix structure.
摘要翻译：与最快的并行前缀2 整数加法器一样快的并行前缀模2加法器不需要额外的逻辑电平来产生进位值，并且具有可以容易地添加流水线寄存器的非常规则的结构。加法器的所有节点具有扇出<= 2。在加法器的前缀结构中，由并行前缀结构输出的每个进位值项由输入到加法器的操作数中的所有位确定。在一个实施例中，在前缀结构中存在日志“2”级。每个阶段都有n个逻辑运算符，前缀结构中的所有逻辑运算符都是相同的。可以在前缀结构中的阶段之前和/或之后插入管道寄存器。

5. 发明申请

US20090003364A1 Open platform architecture for integrating multiple heterogeneous network functions 有权
标题翻译：用于集成多个异构网络功能的开放式平台架构
公开(公告)号：US20090003364A1
公开(公告)日：2009-01-01
申请号：US11824482
申请日：2007-06-29
申请人： Kerry Fendick , Lampros Kalampoukas , Thomas Woo
发明人： Kerry Fendick , Lampros Kalampoukas , Thomas Woo
IPC分类号： H04L12/28
CPC分类号： H04L45/00 , H04L45/60 , H04L49/355 , H04L49/602
摘要： A platform for seamlessly hosts a plurality of disparate types of packet processing applications. One or more applications are loaded onto a service card on the platform. A programmable path structure is included that maps a logical path for processing of the packets through one or more of the plurality of service cards according to characteristics of the packets. Multiple path structures may be programmed into the platform to offer different service paths for different types of packets.
摘要翻译：用于无缝地托管多个不同类型的分组处理应用的平台。一个或多个应用程序被加载到平台上的服务卡上。包括可编程路径结构，其根据分组的特性，通过一个或多个服务卡映射用于处理分组的逻辑路径。可以将多路径结构编程到平台中，以为不同类型的分组提供不同的服务路径。

6. 发明授权

US5675576A Concestion control system and method for packet switched networks providing max-min fairness 失效
标题翻译：拥塞控制系统和分组交换网络的方法，提供最大的公平性
公开(公告)号：US5675576A
公开(公告)日：1997-10-07
申请号：US460965
申请日：1995-06-05
申请人： Lampros Kalampoukas , Anujan Varma , Kadangode K. Ramakrishnan
发明人： Lampros Kalampoukas , Anujan Varma , Kadangode K. Ramakrishnan
IPC分类号： H04Q3/00 , H04L12/56 , H04Q11/04 , H04L12/24
CPC分类号： H04L49/3081 , H04L49/503 , H04L49/506 , H04Q11/0478 , H04L2012/5619 , H04L2012/5636 , H04L49/103 , H04L49/201 , H04L49/205 , H04L49/3018 , H04L49/3027
摘要： A method is disclosed for rate allocation within the individual switches of a communications network implementing a rate-based congestion control approach for best-effort traffic. The methodology of the invention centers on a new rate allocation algorithm which performs its allocation functions independently of the number of connections sharing a network link and therefore performs an allocation in .THETA.(1) complexity. With that implementation simplicity, the algorithm is particularly advantageous for implementation in ATM switches carrying a large number of virtual channels. The algorithm operates on bandwidth information supplied from the source of a connection in special cells or packet headers, such as ATM Resource Management cells. By storing parameter values for other connections sharing a network link, the algorithm requires a constant number of simple computations for each request from a connection for a bandwidth allocation. The algorithm is asynchronous and distributed in nature and converges to the max-min fairness allocation.
摘要翻译：公开了一种用于通信网络的各个交换机内的速率分配的方法，其实现用于尽力而为业务的基于速率的拥塞控制方法。本发明的方法集中于一种新的速率分配算法，其独立于共享网络链路的连接的数量执行其分配功能，并因此执行THETA（1）复杂度的分配。利用这种实现简单性，该算法对于携带大量虚拟信道的ATM交换机中的实现特别有利。该算法对从特殊小区或分组报头（例如ATM资源管理单元）中的连接源提供的带宽信息进行操作。通过存储共享网络链路的其他连接的参数值，该算法需要针对带宽分配的连接的每个请求的恒定数量的简单计算。该算法是异步的，在本质上是分布式的，并且收敛于最大公平分配。

7. 发明授权

US08654668B2 Open platform architecture for integrating multiple heterogeneous network functions 有权
标题翻译：用于集成多个异构网络功能的开放式平台架构
公开(公告)号：US08654668B2
公开(公告)日：2014-02-18
申请号：US13209928
申请日：2011-08-15
申请人： Kerry Fendick , Lampros Kalampoukas , Thomas Woo
发明人： Kerry Fendick , Lampros Kalampoukas , Thomas Woo
IPC分类号： H04J1/16 , H04J3/14 , H04L1/00 , H04L12/56
CPC分类号： H04L45/00 , H04L45/60 , H04L49/355 , H04L49/602
摘要： A platform for seamlessly hosts a plurality of disparate types of packet processing applications. One or more applications are loaded onto a service card on the platform. A programmable path structure is included that maps a logical path for processing of the packets through one or more of the plurality of service cards according to characteristics of the packets. Multiple path structures may be programmed into the platform to offer different service paths for different types of packets.
摘要翻译：用于无缝地托管多个不同类型的分组处理应用的平台。一个或多个应用程序被加载到平台上的服务卡上。包括可编程路径结构，其根据分组的特性，通过一个或多个服务卡映射用于处理分组的逻辑路径。可以将多路径结构编程到平台中，以为不同类型的分组提供不同的服务路径。

8. 发明申请

US20090168673A1 METHOD AND APPARATUS FOR DETECTING AND SUPPRESSING ECHO IN PACKET NETWORKS 审中-公开
标题翻译：用于检测和抑制包装网络中的ECHO的方法和装置
公开(公告)号：US20090168673A1
公开(公告)日：2009-07-02
申请号：US11967338
申请日：2007-12-31
申请人： Lampros Kalampoukas , Semyon Sosin
发明人： Lampros Kalampoukas , Semyon Sosin
IPC分类号： H04B3/20
CPC分类号： H04L65/601 , G10L2021/02082 , H04L65/80 , H04M9/082
摘要： The invention includes a method and apparatus for detecting and suppressing echo in a packet network. A method according to one embodiment includes extracting voice coding parameters from packets of a reference packet stream, extracting voice coding parameters from packets of a target packet stream, determining whether voice content of the target packet stream is similar to voice content of the reference packet stream by processing the voice coding parameters of the reference packet stream and the voice coding parameters of the target packet stream, and determining whether the target packet stream includes an echo of the reference packet stream based on the determination as to whether the voice content of the target packet stream is similar to voice content of the reference packet stream.
摘要翻译：本发明包括一种用于检测和抑制分组网络中的回波的方法和装置。根据一个实施例的方法包括从参考分组流的分组中提取语音编码参数，从目标分组流的分组中提取语音编码参数，确定目标分组流的语音内容是否类似于参考分组流的语音内容通过处理参考分组流的语音编码参数和目标分组流的语音编码参数，并且基于关于目标的语音内容的确定来确定目标分组流是否包括参考分组流的回声分组流类似于参考分组流的语音内容。

9. 发明授权

US08000329B2 Open platform architecture for integrating multiple heterogeneous network functions 有权
标题翻译：用于集成多个异构网络功能的开放式平台架构
公开(公告)号：US08000329B2
公开(公告)日：2011-08-16
申请号：US11824482
申请日：2007-06-29
申请人： Kerry Fendick , Lampros Kalampoukas , Thomas Woo
发明人： Kerry Fendick , Lampros Kalampoukas , Thomas Woo
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L45/00 , H04L45/60 , H04L49/355 , H04L49/602
摘要： A platform for seamlessly hosts a plurality of disparate types of packet processing applications. One or more applications are loaded onto a service card on the platform. A programmable path structure is included that maps a logical path for processing of the packets through one or more of the plurality of service cards according to characteristics of the packets. Multiple path structures may be programmed into the platform to offer different service paths for different types of packets.
摘要翻译：用于无缝地托管多个不同类型的分组处理应用的平台。一个或多个应用程序被加载到平台上的服务卡上。包括可编程路径结构，其根据分组的特性，通过一个或多个服务卡映射用于处理分组的逻辑路径。可以将多路径结构编程到平台中，以为不同类型的分组提供不同的服务路径。

10. 发明授权

US06359863B1 Rate allocation system and method for ATM switched networks 有权
标题翻译： ATM交换网络的速率分配系统和方法
公开(公告)号：US06359863B1
公开(公告)日：2002-03-19
申请号：US09220539
申请日：1998-12-24
申请人： Anujan Varma , Lampros Kalampoukas
发明人： Anujan Varma , Lampros Kalampoukas
IPC分类号： G01R3108
CPC分类号： H04L43/00 , H04L12/5601 , H04L43/0864 , H04L43/0894 , H04L49/557 , H04L2012/5632
摘要： A method for rate allocation within the individual switches of a communication network implementing a rate-based congestion control approach for best-effort traffic. The method enables a guaranteed minimum bandwidth to be allocated to each communication session or connection, in addition to fairly dividing the available bandwidth among the competing connections. The method also estimates the transmission rate of each connection, instead of relying on explicit indications provided by the connection, and uses this information in the computation of its fair share of bandwidth. The method also calculates the available bandwidth on the link where the bandwidth is allocated, by measuring the utilization of the link periodically. Finally, the method incorporates a mechanism to detect connections that remain idle and withdraw allocations from them so as to avoid under-utilization of the link bandwidth.
摘要翻译：一种在通信网络的各个交换机内进行速率分配的方法，其实现用于尽力而为业务的基于速率的拥塞控制方法。除了公平地划分竞争连接之间的可用带宽之外，该方法使得能够将保证的最小带宽分配给每个通信会话或连接。该方法还估计每个连接的传输速率，而不是依赖连接提供的显式指示，并且在计算其公平的带宽份额时使用该信息。该方法还通过定期测量链路的利用率来计算分配带宽的链路上的可用带宽。最后，该方法结合了一种机制来检测保持空闲的连接并从中撤出分配，以避免链路带宽的不足利用。

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