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1. 发明申请

US20060206686A1 Three-tiered translation lookaside buffer hierarchy in a multithreading microprocessor 有权
公开(公告)号：US20060206686A1
公开(公告)日：2006-09-14
申请号：US11075041
申请日：2005-03-08
申请人： Soumya Banerjee , Michael Jensen , Ryan Kinter
发明人： Soumya Banerjee , Michael Jensen , Ryan Kinter
IPC分类号： G06F12/10
CPC分类号： G06F12/1027 , G06F2212/681
摘要： A three-tiered TLB architecture in a multithreading processor that concurrently executes multiple instruction threads is provided. A macro-TLB caches address translation information for memory pages for all the threads. A micro-TLB caches the translation information for a subset of the memory pages cached in the macro-TLB. A respective nano-TLB for each of the threads caches translation information only for the respective thread. The nano-TLBs also include replacement information to indicate which entries in the nano-TLB/micro-TLB hold recently used translation information for the respective thread. Based on the replacement information, recently used information is copied to the nano-TLB if evicted from the micro-TLB.

2. 发明申请

US20060179276A1 Fetch director employing barrel-incrementer-based round-robin apparatus for use in multithreading microprocessor 有权
标题翻译： Fetch Director采用基于桶式增量器的循环设备，用于多线程微处理器
公开(公告)号：US20060179276A1
公开(公告)日：2006-08-10
申请号：US11087063
申请日：2005-03-22
申请人： Soumya Banerjee , Michael Jensen
发明人： Soumya Banerjee , Michael Jensen
IPC分类号： G06F9/40
CPC分类号： G06F9/3851 , G06F9/3802 , G06F9/3814
摘要： A fetch director in a multithreaded microprocessor that concurrently executes instructions of N threads is disclosed. The N threads request to fetch instructions from an instruction cache. In a given selection cycle, some of the threads may not be requesting to fetch instructions. The fetch director includes a circuit for selecting one of threads in a round-robin fashion to provide its fetch address to the instruction cache. The circuit 1-bit left rotatively increments a first addend by a second addend to generate a sum that is ANDed with the inverse of the first addend to generate a 1-hot vector indicating which of the threads is selected next. The first addend is an N-bit vector where each bit is false if the corresponding thread is requesting to fetch instructions from the instruction cache. The second addend is a 1-hot vector indicating the last selected thread. In one embodiment threads with an empty instruction buffer are selected at highest priority; a last dispatched but not fetched thread at middle priority; all other threads at lowest priority. The threads are selected round-robin within the highest and lowest priorities.
摘要翻译：公开了并行执行N线程指令的多线程微处理器中的提取指导者。 N线程请求从指令高速缓存获取指令。在给定的选择周期中，某些线程可能没有请求获取指令。提取指导器包括用于以循环方式选择线程之一以将其提取地址提供给指令高速缓存的电路。 1位左电路通过第二加数旋转地增加第一加数，以产生与第一加数的反相并联的和，以产生指示下一个选择的线程的1-hot向量。第一个加数是一个N位向量，如果相应的线程请求从指令高速缓存中获取指令，则每个位都为假。第二个加法是指示最后选择的线程的1-hot向量。在一个实施例中，以最高优先级选择具有空指令缓冲器的线程; 中间优先级的最后发送但未获取的线程; 所有其他线程的优先级最低。线程在最高和最低优先级内选择循环。

3. 发明申请

US20060179281A1 Multithreading instruction scheduler employing thread group priorities 有权
标题翻译：多线程指令调度器采用线程组优先级
公开(公告)号：US20060179281A1
公开(公告)日：2006-08-10
申请号：US11191258
申请日：2005-07-27
申请人： Michael Jensen , Ryan Kinter
发明人： Michael Jensen , Ryan Kinter
IPC分类号： G06F9/30
CPC分类号： G06F9/3851 , G06F9/3836 , G06F9/3857 , G06F9/3859 , G06F9/3885 , G06F9/4881
摘要： A multithreading processor with an efficient and fair thread scheduler is disclosed. The scheduler enables threads to be grouped and a priority assigned to each group of threads. Round-robin order is maintained for each group. Consequently, the group priorities may be changed relatively frequently in order to obtain the benefits of not starving threads that require relatively low bandwidth and of interleaving instruction dispatch of multiple independent threads to enjoy pipeline efficiencies, and as long as the group populations are changed relatively infrequently, round-robin order fairness is provided within the groups in case multiple threads in a group have issuable instructions.
摘要翻译：公开了一种具有高效且公平的线程调度器的多线程处理器。调度程序使线程可以分组，并将优先级分配给每组线程。为每个组维护循环次序。因此，可以相对频繁地改变组优先级，以便获得不需要相对低带宽的线程的好处，以及交织多个独立线程的指令分派以享受管道效率，并且只要组群相对不频繁地改变如果组中的多个线程具有可发布的指令，则组内提供循环顺序公平性。

4. 发明申请

US20060179280A1 Multithreading processor including thread scheduler based on instruction stall likelihood prediction 有权
标题翻译：多线程处理器，包括基于指令失速似然预测的线程调度器
公开(公告)号：US20060179280A1
公开(公告)日：2006-08-10
申请号：US11051998
申请日：2005-02-04
申请人： Michael Jensen , Darren Jones , Ryan Kinter , Sanjay Vishin
发明人： Michael Jensen , Darren Jones , Ryan Kinter , Sanjay Vishin
IPC分类号： G06F9/30
CPC分类号： G06F9/3851 , G06F9/30087 , G06F9/3009 , G06F9/382 , G06F9/3838 , G06F9/3861
摘要： An apparatus for scheduling dispatch of instructions among a plurality of threads being concurrently executed in a multithreading processor is provided. The apparatus includes an instruction decoder that generate register usage information for an instruction from each of the threads, a priority generator that generates a priority for each instruction based on the register usage information and state information of instructions currently executing in an execution pipeline, and selection logic that dispatches at least one instruction from at least one thread based on the priority of the instructions. The priority indicates the likelihood the instruction will execute in the execution pipeline without stalling. For example, an instruction may have a high priority if it has little or no register dependencies or its data is known to be available; or may have a low priority if it has strong register dependencies or is an uncacheable or synchronized storage space load instruction.
摘要翻译：提供了一种用于在多线程处理器中同时执行的多个线程之间调度指令调度的装置。该装置包括：指令解码器，用于生成来自每个线程的指令的寄存器使用信息;基于寄存器使用信息和当前在执行流水线中执行的指令的状态信息生成每个指令的优先级的优先级生成器，以及选择基于指令的优先级从至少一个线程分派至少一条指令的逻辑。优先级表示指令在执行流水线中执行的可能性，而不会停顿。例如，如果指令很少或没有寄存器依赖性或其数据已知可用，则指令可能具有高优先级; 或者如果具有强的寄存器依赖性或者不可缓存或同步的存储空间加载指令，则可以具有低优先级。

5. 发明申请

US20060179284A1 Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency 有权
标题翻译：具有优化线程调度器的多线程微处理器，可提高管道利用效率
公开(公告)号：US20060179284A1
公开(公告)日：2006-08-10
申请号：US11051979
申请日：2005-02-04
申请人： Michael Jensen , Darren Jones , Ryan Kinter , Sanjay Vishin
发明人： Michael Jensen , Darren Jones , Ryan Kinter , Sanjay Vishin
IPC分类号： G06F9/30
CPC分类号： G06F9/3851 , G06F9/30079 , G06F9/30087 , G06F9/3009 , G06F9/3867
摘要： A multithreading processor for concurrently executing multiple threads is provided. The processor includes an execution pipeline and a thread scheduler that dispatches instructions of the threads to the execution pipeline. The execution pipeline detects a stalling event caused by a dispatched instruction, and flushes the execution pipeline to enable instructions of other threads to continue executing. The execution pipeline communicates to the scheduler which thread caused the stalling event, and the scheduler stops dispatching instructions for the thread until the stalling condition terminates. In one embodiment, the execution pipeline only flushes the thread including the instruction that caused the event. In one embodiment, the execution pipeline stalls rather than flushing if the thread is the only runnable thread. In one embodiment, the processor includes skid buffers to which the flushed instructions are rolled back so the instruction fetch pipeline need not be flushed, only the execution pipeline.
摘要翻译：提供了用于同时执行多个线程的多线程处理器。该处理器包括一个执行流水线和一个线程调度器，它将线程的指令分派到执行流水线。执行流水线检测由分派指令引起的停顿事件，并刷新执行流水线以使其他线程的指令能够继续执行。执行流水线与调度程序进行通信，该线程引起停止事件，并且调度器停止线程的调度指令，直到停止条件终止。在一个实施例中，执行流水线仅刷新包括引起事件的指令的线程。在一个实施例中，如果线程是唯一的可运行线程，则执行流水线停止而不是刷新。在一个实施例中，处理器包括滑动缓冲器，刷新的指令被回滚到所述缓冲器缓冲器，使得指令提取流水线不需要被刷新，仅仅是执行流水线。

6. 发明申请

US20070113053A1 MULTITHREADING INSTRUCTION SCHEDULER EMPLOYING THREAD GROUP PRIORITIES 有权
标题翻译：采用螺纹组合优先的多用途指令调度器
公开(公告)号：US20070113053A1
公开(公告)日：2007-05-17
申请号：US11620362
申请日：2007-01-05
申请人： Michael Jensen , Ryan Kinter
发明人： Michael Jensen , Ryan Kinter
IPC分类号： G06F9/30
CPC分类号： G06F9/3851 , G06F9/3836 , G06F9/3857 , G06F9/3859 , G06F9/3885 , G06F9/4881
摘要： A concurrent instruction dispatch apparatus includes a group indicator for each of a plurality of threads that indicates which one of a plurality of groups of the threads the thread belongs to. A group priority indicator for each group indicates an instruction dispatch priority relative to the other groups. Selection logic selects a thread for dispatching an instruction thereof based on the group and group priority indicators. A bifurcated scheduler includes first scheduler logic that issues instructions of the threads to an execution unit, second scheduler logic that enforces a thread scheduling policy, and an interface. A group indicator indicates which group each thread belongs to, a priority for each group, and execution information for each thread. The first scheduler logic issues the instructions based on the group priorities and group indicators, and the second scheduler logic updates the group indicators based on the instruction execution information.
摘要翻译：并行指令调度装置包括指示线程所属的多个线程组中的哪一组的多个线程中的每一个的组指示符。每个组的组优先级指示符指示相对于其他组的指令调度优先级。选择逻辑基于组和组优先级指示器选择用于调度其指令的线程。分叉调度器包括将线程的指令发布到执行单元的第一调度器逻辑，强制执行线程调度策略的第二调度器逻辑和接口。组指示符指示每个线程所属的组，每个组的优先级以及每个线程的执行信息。第一调度器逻辑基于组优先级和组指示器发出指令，并且第二调度器逻辑基于指令执行信息更新组指示符。

7. 发明授权

US09127507B2 Rotatable wireline tool of enhanced hydraulic drive consistency 有权
标题翻译：可旋转电缆工具，增强液压驱动一致性
公开(公告)号：US09127507B2
公开(公告)日：2015-09-08
申请号：US13316239
申请日：2011-12-09
申请人： Michael Jensen , Ruben Martinez
发明人： Michael Jensen , Ruben Martinez
IPC分类号： E21B4/02 , E21B4/00 , E21B4/18 , E21B23/14 , E21B29/00
CPC分类号： E21B4/02 , E21B3/00 , E21B4/00 , E21B4/006 , E21B4/18 , E21B23/14 , E21B29/00 , E21B29/002
摘要： A rotatable downhole cutting tool configured for enhanced drive consistency in low power circumstances. The tool is equipped with a hydraulic axial drive actuator suitable for use in wireline deployment. The actuator itself includes a reciprocating piston with a ball screw that threadably interfaces a ball nut for dampening the axial drive imparted by the piston. As such, even though hydraulically driven at generally well under about 10 horsepower, bounce in the axial drive is substantially eliminated.
摘要翻译：一种可旋转的井下切割工具，其配置为在低功率环境下提高驱动一致性。该工具配备有适用于有线部署的液压轴向驱动执行器。致动器本身包括具有滚珠丝杠的往复式活塞，该滚珠丝杠与滚珠螺母螺纹接合，以阻尼由活塞施加的轴向驱动。因此，即使液压驱动通常在大约10马力以下，基本上消除了轴向驱动中的反弹。

8. 发明申请

US20120210914A1 KEYBOARD AND MOUSE SUPPORT 有权
标题翻译：键盘和鼠标支持
公开(公告)号：US20120210914A1
公开(公告)日：2012-08-23
申请号：US13029727
申请日：2011-02-17
申请人： Larry HAMILTON , Taiwon Choi , Michael Jensen , ChunSheng Li , Douglas Carpiaux , Adam Shileny , Heidi Anna Dondlinger , Martin Behling, II
发明人： Larry HAMILTON , Taiwon Choi , Michael Jensen , ChunSheng Li , Douglas Carpiaux , Adam Shileny , Heidi Anna Dondlinger , Martin Behling, II
IPC分类号： A47B37/00 , A47B96/07
CPC分类号： A47B21/0314 , A47B2200/0085
摘要： A support device including a keyboard platform and a bracket for mounting the keyboard platform a work surface to elevate the keyboard platform above the work surface. The keyboard platform is mounted on the bracket for sliding movement relative to an edge of the work surface along a horizontal fore-aft axis. The keyboard platform is mounted on the bracket for tilting movement about a tilting axis perpendicular to the fore-aft axis. The support device includes a lock movable between a locked position wherein sliding/tilting movement of the keyboard platform is prevented and an unlocked position wherein sliding/tilting movement of the keyboard platform is permitted. One aspect includes a clamp provided on the bracket and engageable with the work surface to elevate the keyboard platform above the work surface. One aspect provides a mouse platform pivotally attached to the keyboard platform and configured to support the mouse at a tilted position.
摘要翻译：包括键盘平台和支架的支撑装置，用于将键盘平台安装在工作表面上，以将键盘平台提升到工作表面上方。键盘平台安装在支架上，用于沿着水平的前后轴线相对于工作表面的边缘滑动运动。键盘平台安装在支架上，用于围绕垂直于前后轴线的倾斜轴线倾斜运动。支撑装置包括可在锁定位置之间移动的锁，其中防止键盘平台的滑动/倾斜运动和允许键盘平台的滑动/倾斜运动的解锁位置。一个方面包括设置在支架上并可与工作表面接合以提升键盘平台在工作表面上方的夹具。一个方面提供了一种可枢转地附接到键盘平台并被配置为在倾斜位置支撑鼠标的鼠标平台。

9. 发明申请

US20120061082A1 SEALING OF THIEF ZONES 有权
标题翻译：密封区域
公开(公告)号：US20120061082A1
公开(公告)日：2012-03-15
申请号：US13129950
申请日：2009-11-18
申请人： Michael Jensen
发明人： Michael Jensen
IPC分类号： E21B43/16 , C09K8/58
CPC分类号： C04B28/14 , C04B28/16 , C09K8/46 , C09K8/5045
摘要： The present invention provides a method for selectively sealing a thief zone in a hydrocarbon reservoir located in a calcium-rich formation and penetrated by a borehole comprising injecting into the thief zone a sealing fluid comprising a mixture of and hydronium ions (H+) and a source of sulfate ions (SO42−) which mixture can provide precipitation of a designated calcium sulfate compound.
摘要翻译：本发明提供了一种用于选择性地密封位于富钙地层中并被钻孔穿透的烃储层中的小偷区的方法，包括将包含水合氢离子（H +）和源的混合物的密封流体的硫酸根离子（SO42-），该混合物可以提供指定的硫酸钙化合物的沉淀。

10. 发明申请

US20110097449A1 SEASONING AND METHOD FOR SEASONING A FOOD PRODUCT WHILE REDUCING DIETARY SODIUM INTAKE 审中-公开
标题翻译：在减少食物摄入钠时食用食物的季节和方法
公开(公告)号：US20110097449A1
公开(公告)日：2011-04-28
申请号：US12909586
申请日：2010-10-21
申请人： Michael Jensen , Gordon Smith , Shawn Fear , Lance Schilmoeller , Clint Johnson
发明人： Michael Jensen , Gordon Smith , Shawn Fear , Lance Schilmoeller , Clint Johnson
IPC分类号： A23L1/237 , A23L1/18
CPC分类号： A23L7/191 , A23L13/428 , A23L19/03 , A23L27/40 , A23L27/86 , A23V2002/00 , A23V2200/254 , A23V2250/1614
摘要： A seasoning for food that provides taste enhancement and flavor potentiation is disclosed. The seasoning can be used for reducing dietary sodium intake. The portion of seasoning has a mean particle size of less than or equal to 20 microns. In one embodiment, the invention is a seasoning comprising a first seasoning component including a salt and a second seasoning component selected for at least one of complementing and reducing the amount of the first seasoning component required for flavoring a food product.
摘要翻译：公开了提供味道增强和风味增强的食物调味料。调味料可用于减少膳食钠摄入。调料的部分平均粒度小于或等于20微米。在一个实施方案中，本发明是一种调味料，其包括第一调味成分，其包含盐和第二调味成分，所述第二调味成分选自补充和减少调味食品所需的第一调味成分的量中的至少一种。

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