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1. 发明授权

US08895842B2 High quality TCO-silicon interface contact structure for high efficiency thin film silicon solar cells 有权
标题翻译：高效率薄膜硅太阳能电池的高品质TCO硅接口接触结构
公开(公告)号：US08895842B2
公开(公告)日：2014-11-25
申请号：US12481175
申请日：2009-06-09
申请人： Shuran Sheng , Yong Kee Chae , Stefan Klein , Amir Al-Bayati , Bhaskar Kumar
发明人： Shuran Sheng , Yong Kee Chae , Stefan Klein , Amir Al-Bayati , Bhaskar Kumar
IPC分类号： H01L31/00 , H01L21/00 , H01L31/20 , H01L31/076 , H01L31/0224 , C23C16/24 , H01L31/18
CPC分类号： H01L31/076 , C23C16/24 , H01L31/022466 , H01L31/022483 , H01L31/1824 , H01L31/202 , Y02E10/545 , Y02E10/548 , Y02P70/521
摘要： A method and apparatus for forming solar cells is provided. In one embodiment, a photovoltaic device includes a first TCO layer disposed on a substrate, a second TCO layer disposed on the first TCO layer, and a p-type silicon containing layer formed on the second TCO layer. In another embodiment, a method of forming a photovoltaic device includes forming a first TCO layer on a substrate, forming a second TCO layer on the first TCO layer, and forming a first p-i-n junction on the second TCO layer.
摘要翻译：提供一种用于形成太阳能电池的方法和装置。在一个实施例中，光伏器件包括设置在衬底上的第一TCO层，设置在第一TCO层上的第二TCO层和形成在第二TCO层上的p型含硅层。在另一个实施例中，形成光伏器件的方法包括在衬底上形成第一TCO层，在第一TCO层上形成第二TCO层，以及在第二TCO层上形成第一p-i-n结。

2. 发明申请

US20100051098A1 HIGH QUALITY TCO-SILICON INTERFACE CONTACT STRUCTURE FOR HIGH EFFICIENCY THIN FILM SILICON SOLAR CELLS 有权
标题翻译：高性能TCO硅界面接触结构，用于高效薄膜硅太阳能电池
公开(公告)号：US20100051098A1
公开(公告)日：2010-03-04
申请号：US12481175
申请日：2009-06-09
申请人： Shuran Sheng , Yong Kee Chae , Stefan Klein , Amir Al-Bayati , Bhaskar Kumar
发明人： Shuran Sheng , Yong Kee Chae , Stefan Klein , Amir Al-Bayati , Bhaskar Kumar
IPC分类号： H01L31/00 , H01L31/18
CPC分类号： H01L31/076 , C23C16/24 , H01L31/022466 , H01L31/022483 , H01L31/1824 , H01L31/202 , Y02E10/545 , Y02E10/548 , Y02P70/521
摘要： A method and apparatus for forming solar cells is provided. In one embodiment, a photovoltaic device includes a first TCO layer disposed on a substrate, a second TCO layer disposed on the first TCO layer, and a p-type silicon containing layer formed on the second TCO layer. In another embodiment, a method of forming a photovoltaic device includes forming a first TCO layer on a substrate, forming a second TCO layer on the first TCO layer, and forming a first p-i-n junction on the second TCO layer.
摘要翻译：提供一种用于形成太阳能电池的方法和装置。在一个实施例中，光伏器件包括设置在衬底上的第一TCO层，设置在第一TCO层上的第二TCO层和形成在第二TCO层上的p型含硅层。在另一个实施例中，形成光伏器件的方法包括在衬底上形成第一TCO层，在第一TCO层上形成第二TCO层，以及在第二TCO层上形成第一p-i-n结。

3. 发明申请

US20110263074A1 APPARATUS AND METHODS FOR REDUCING LIGHT INDUCED DAMAGE IN THIN FILM SOLAR CELLS 审中-公开
标题翻译：用于减少薄膜太阳能电池中的光诱导损伤的装置和方法
公开(公告)号：US20110263074A1
公开(公告)日：2011-10-27
申请号：US12765458
申请日：2010-04-22
申请人： Amir Al-Bayati , Yong K. Chae , Shuran Sheng , Bhaskar Kumar , Eran Valfer
发明人： Amir Al-Bayati , Yong K. Chae , Shuran Sheng , Bhaskar Kumar , Eran Valfer
IPC分类号： H01L31/18
CPC分类号： H01L31/202 , C23C16/24 , C23C16/505 , H01L21/02532 , H01L21/0262 , H01L31/03767 , Y02E10/50 , Y02P70/521
摘要： Apparatus and methods for forming a silicon-containing i-layer on a substrate for a thin film photovoltaic cell are disclosed. The apparatus includes a chamber body defining a processing region containing the substrate, a hydrogen source and a silane source coupled to a plasma generation region, an RF power source that applies power at a power level in the plasma generation region to generate a plasma and deposit the silicon-containing i-layer at a selected deposition rate to a selected thickness and a controller. The controller controls the power level and the deposition rate of the i-layer on the substrate such that the thin film solar cell exhibits light induced damage that conforms to a linear fit of the product of the RF power, the deposition rate and the selected thickness of the i-layer. In accordance with further aspects of the present invention, the controller controls the RF power and the deposition rate so that a product (x) of the RF power in watts, the deposition rate of the i-layer in nm per min and the thickness of the i-layer in nm is less than a predetermined number y and satisfies the equation y=5E11*x+3.3749 plus or minus a margin.
摘要翻译：公开了一种在用于薄膜光伏电池的衬底上形成含硅i层的设备和方法。该装置包括限定包含衬底的处理区域，氢源和耦合到等离子体产生区域的硅烷源的室主体，在等离子体产生区域中以功率电平施加功率以产生等离子体和沉积物的RF电源将所选择的沉积速率的含硅i层以选定的厚度和控制器进行。控制器控制i层在基板上的功率水平和沉积速率，使得薄膜太阳能电池呈现符合RF功率，沉积速率和所选厚度的产品的线性拟合的光诱导损伤的i层。根据本发明的另外的方面，控制器控制RF功率和沉积速率，使得RF功率的乘积（x）以瓦为单位，i层的沉积速率（nm / min）和 i层的nm小于预定数量y，并且满足等式y = 5E11 * x + 3.3749加或减边缘。

4. 发明授权

US08796769B2 Thermal flux annealing influence of buried species 有权
标题翻译：埋藏物种的热通量退火影响
公开(公告)号：US08796769B2
公开(公告)日：2014-08-05
申请号：US13619898
申请日：2012-09-14
申请人： Dean C. Jennings , Amir Al-Bayati
发明人： Dean C. Jennings , Amir Al-Bayati
IPC分类号： H01L21/336
CPC分类号： H01L21/268 , B23K26/0738 , H01L21/26533 , H01L21/324
摘要： A method including introducing a species into a substrate including semiconductor material; and translating linearly focused electromagnetic radiation across a surface of the substrate, the electromagnetic radiation being sufficient to thermally influence the species. An apparatus including an electromagnetic radiation source; a stage having dimensions suitable for accommodating a semiconductor substrate within a chamber; an optical element disposed between the electromagnetic radiation source and the stage to focus radiation from the electromagnetic radiation source into a line having a length determined by the diameter of a substrate to be placed on the stage; and a controller coupled to the electromagnetic radiation source including machine readable program instructions that allow the controller to control the depth into which a substrate is exposed to the radiation.
摘要翻译：一种方法，包括将物质引入到包括半导体材料的基板中; 并且将线性聚焦的电磁辐射平移在衬底的表面上，电磁辐射足以热影响物质。一种包括电磁辐射源的设备; 具有适于容纳室内的半导体衬底的尺寸的平台; 设置在所述电磁辐射源和所述台之间的光学元件，用于将来自所述电磁辐射源的辐射聚焦成具有由放置在所述台上的基板的直径确定的长度的线; 以及耦合到电磁辐射源的控制器，包括允许控制器控制衬底暴露于辐射的深度的机器可读程序指令。

5. 发明授权

US08445075B2 Method to minimize wet etch undercuts and provide pore sealing of extreme low k (k<2.5) dielectrics 有权
标题翻译：最小化湿法蚀刻底切的方法，并提供极低k（k <2.5）电介质的孔密封
公开(公告)号：US08445075B2
公开(公告)日：2013-05-21
申请号：US12975833
申请日：2010-12-22
申请人： Huiwen Xu , Mei-Yee Shek , Li-Qun Xia , Amir Al-Bayati , Derek Witty , Hichem M'Saad
发明人： Huiwen Xu , Mei-Yee Shek , Li-Qun Xia , Amir Al-Bayati , Derek Witty , Hichem M'Saad
IPC分类号： B05D3/10
CPC分类号： C23C16/308 , C23C16/401 , H01L21/02126 , H01L21/02164 , H01L21/0217 , H01L21/02274 , H01L21/0228 , H01L21/3122 , H01L21/31612 , H01L21/31633 , H01L21/76829 , H01L21/76831 , H01L21/76834
摘要： Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed from the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film.
摘要翻译：提供了在基板上处理膜的方法。在一个方面，所述方法包括在通过在膜上沉积包含硅，碳和任选的氧和/或氮的薄层来从膜去除光致抗蚀剂之后处理图案化的低介电常数膜。薄层为图案化的低介电常数膜提供了富含碳的疏水性表面。薄层还保护低介电常数膜免于随后的湿法清洗工艺和前体渗透，随后沉积在低介电常数膜上。

6. 发明申请

US20120199071A1 PLASMA IMMERSION CHAMBER 审中-公开
标题翻译：等离子体浸泡室
公开(公告)号：US20120199071A1
公开(公告)日：2012-08-09
申请号：US13446732
申请日：2012-04-13
申请人： KENNETH S. COLLINS , Andrew N. Nguyen , Kartik Ramaswamy , Hiroji Hanawa , Douglas A. Buchberger, JR. , Daniel J. Hoffman , Amir Al-Bayati
发明人： KENNETH S. COLLINS , Andrew N. Nguyen , Kartik Ramaswamy , Hiroji Hanawa , Douglas A. Buchberger, JR. , Daniel J. Hoffman , Amir Al-Bayati
IPC分类号： C23C16/455 , C23C16/50
CPC分类号： H01J37/32458 , H01J37/32412 , H01J37/32477
摘要： Embodiments described herein relate to a plasma chamber and processing system utilizing robust components. In one embodiment, a chamber is provided. The chamber includes a body having an interior volume, a gas distribution assembly disposed in the interior volume opposing a substrate support, the gas distribution assembly having a coolant channel disposed thereon, and a first hollow conduit and a second hollow conduit coupled to the body and in fluid communication with the interior volume.
摘要翻译：本文所述的实施例涉及使用鲁棒部件的等离子体室和处理系统。在一个实施例中，提供了一个室。所述腔室包括具有内部体积的本体，设置在所述内部体积中与衬底支撑件相对的气体分配组件，所述气体分配组件具有设置在其上的冷却剂通道，以及联接到所述主体的第一中空导管和第二中空导管，与内部容积流体连通。

7. 发明授权

US08197636B2 Systems for plasma enhanced chemical vapor deposition and bevel edge etching 有权
标题翻译：等离子体增强化学气相沉积和斜边蚀刻系统
公开(公告)号：US08197636B2
公开(公告)日：2012-06-12
申请号：US12106881
申请日：2008-04-21
申请人： Ashish Shah , Dale R. DuBois , Ganesh Balasubramanian , Mark A. Fodor , Eui Kyoon Kim , Chiu Chan , Karthik Janakiraman , Thomas Nowak , Joseph C. Werner , Visweswaren Sivaramakrishnan , Mohamad Ayoub , Amir Al-Bayati , Jianhua Zhou
发明人： Ashish Shah , Dale R. DuBois , Ganesh Balasubramanian , Mark A. Fodor , Eui Kyoon Kim , Chiu Chan , Karthik Janakiraman , Thomas Nowak , Joseph C. Werner , Visweswaren Sivaramakrishnan , Mohamad Ayoub , Amir Al-Bayati , Jianhua Zhou
IPC分类号： C23F1/00 , C23C16/00 , H01L21/306
CPC分类号： H01L21/6719 , H01J37/32366 , H01J2237/3321 , H01L21/67201 , H01L21/67207
摘要： Embodiments described herein relate to a substrate processing system that integrates substrate edge processing capabilities. Illustrated examples of the processing system include, without limitations, a factory interface, a loadlock chamber, a transfer chamber, and one or more twin process chambers having two or more processing regions that are isolatable from each other and share a common gas supply and a common exhaust pump. The processing regions in each twin process chamber include separate gas distribution assemblies and RF power sources to provide plasma at selective regions on a substrate surface in each processing region. Each twin process chamber is thereby configured to allow multiple, isolated processes to be performed concurrently on at least two substrates in the processing regions.
摘要翻译：本文所述的实施例涉及集成衬底边缘处理能力的衬底处理系统。处理系统的说明性示例包括但不限于工厂接口，负载锁定室，传送室和具有两个或更多个处理区域的一个或多个双处理室，其可彼此隔离并且共享公共气体供应和普通排气泵。每个双处理室中的处理区域包括单独的气体分配组件和RF功率源，以在每个处理区域的衬底表面上的选择性区域提供等离子体。因此，每个双处理室被配置为允许在处理区域中的至少两个基板上同时执行多个隔离过程。

8. 发明授权

US07767561B2 Plasma immersion ion implantation reactor having an ion shower grid 失效
标题翻译：具有离子喷淋格栅的等离子体浸没离子注入反应器
公开(公告)号：US07767561B2
公开(公告)日：2010-08-03
申请号：US10896113
申请日：2004-07-20
申请人： Hiroji Hanawa , Tsutomu Tanaka , Kenneth S. Collins , Amir Al-Bayati , Kartik Ramaswamy , Andrew Nguyen
发明人： Hiroji Hanawa , Tsutomu Tanaka , Kenneth S. Collins , Amir Al-Bayati , Kartik Ramaswamy , Andrew Nguyen
IPC分类号： H01L21/425
CPC分类号： H01J37/32412 , C23C14/48 , H01J37/32357 , H01L21/2236 , H01L21/31612
摘要： A plasma immersion ion implantation process for implanting a selected species at a desired ion implantation depth profile in a workpiece is carried out in a reactor chamber with an ion shower grid that divides the chamber into an upper ion generation region and a lower process region, the ion shower grid having plural elongate orifices oriented in a non-parallel direction relative to a surface plane of the ion shower grid.
摘要翻译：用于在工件中以期望的离子注入深度分布植入选定物种的等离子体浸没离子注入工艺在反应室中进行，其中离子喷淋网格将室分成上部离子产生区域和下部工艺区域，具有相对于离子喷淋栅格的表面平行方向定向的多个细长孔的离子喷淋格栅。

9. 发明授权

US07642180B2 Semiconductor on insulator vertical transistor fabrication and doping process 有权
标题翻译：半导体绝缘体垂直晶体管的制造和掺杂过程
公开(公告)号：US07642180B2
公开(公告)日：2010-01-05
申请号：US11901969
申请日：2007-09-18
申请人： Amir Al-Bayati , Kenneth S. Collins , Hiroji Hanawa , Kartik Ramaswamy , Biagio Gallo , Andrew Nguyen
发明人： Amir Al-Bayati , Kenneth S. Collins , Hiroji Hanawa , Kartik Ramaswamy , Biagio Gallo , Andrew Nguyen
IPC分类号： H01L21/44
CPC分类号： H01J37/321 , H01L29/66795 , H01L29/66803 , H01L29/7843 , H01L29/785 , H01L29/78618
摘要： A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conformal deposition of a dopant-containing film which can then be heated to drive the dopants into the transistor. Some embodiments employ both conformal ion implantation and conformal deposition of dopant containing films, and in those embodiments in which the dopant containing film is a pure dopant, the ion implantation and film deposition can be performed simultaneously.
摘要翻译：通过绝缘体上半导体结构中的三维垂直晶体管的垂直和水平表面进行保形掺杂的工艺采用RF振荡环形等离子体电流来执行保形离子注入或含掺杂剂膜的共形沉积然后可以加热以将掺杂剂驱动到晶体管中。一些实施例采用包含掺杂剂的膜的共形离子注入和共形沉积，并且在其中含掺杂剂的膜是纯掺杂剂的那些实施例中，可以同时执行离子注入和膜沉积。

10. 发明申请

US20080044960A1 Semiconductor on insulator vertical transistor fabrication and doping process 有权
标题翻译：半导体绝缘体垂直晶体管的制造和掺杂过程
公开(公告)号：US20080044960A1
公开(公告)日：2008-02-21
申请号：US11901969
申请日：2007-09-18
申请人： Amir Al-Bayati , Kenneth Collins , Hiroji Hanawa , Kartik Ramaswamy , Biagio Gallo , Andrew Nguyen
发明人： Amir Al-Bayati , Kenneth Collins , Hiroji Hanawa , Kartik Ramaswamy , Biagio Gallo , Andrew Nguyen
IPC分类号： H01L21/84
CPC分类号： H01J37/321 , H01L29/66795 , H01L29/66803 , H01L29/7843 , H01L29/785 , H01L29/78618
摘要： A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conformal deposition of a dopant-containing film which can then be heated to drive the dopants into the transistor. Some embodiments employ both conformal ion implantation and conformal deposition of dopant containing films, and in those embodiments in which the dopant containing film is a pure dopant, the ion implantation and film deposition can be performed simultaneously.
摘要翻译：通过绝缘体上半导体结构中的三维垂直晶体管的垂直和水平表面进行保形掺杂的工艺采用RF振荡环形等离子体电流来执行保形离子注入或含掺杂剂膜的共形沉积然后可以加热以将掺杂剂驱动到晶体管中。一些实施例采用包含掺杂剂的膜的共形离子注入和共形沉积，并且在其中含掺杂剂的膜是纯掺杂剂的那些实施例中，可以同时执行离子注入和膜沉积。

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