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1. 发明申请

US20050183056A1 Simulator of lithography tool, simulation method, and computer program product for simulator 失效
标题翻译：光刻工具的模拟器，模拟方法，以及模拟器的计算机程序产品
公开(公告)号：US20050183056A1
公开(公告)日：2005-08-18
申请号：US11045296
申请日：2005-01-31
申请人： Shoji Mimotogi , Daisuke Kawamura , Akiko Yamada
发明人： Shoji Mimotogi , Daisuke Kawamura , Akiko Yamada
IPC分类号： G03F7/20 , G03C5/00 , G03F9/00 , G06F17/50 , H01L21/027
CPC分类号： G06F17/5009 , G03F7/70625
摘要： A simulator of a lithography tool includes a correcting parameter memory storing a correcting scaling value to correct a focus error of a projection optical system in the lithography tool and a correcting bias to correct a critical dimension error gene rated in the lithography tool. A model simulation engine simulates an image formation under a corrected focus calculated by multiplying a defocus of the projection optical system by the correcting scaling value to model a calculated critical dimension of an image. A bias corrector adds the correcting bias to the calculated critical dimension to correct the image.
摘要翻译：光刻工具的模拟器包括校正参数存储器，其存储校正缩放值以校正光刻工具中的投影光学系统的聚焦误差，以及校正偏差以校正光刻工具中评估的关键尺寸误差基因。模型仿真引擎模拟在通过将投影光学系统的散焦乘以校正缩放值计算的校正焦点下的图像形成，以对图像的计算临界尺寸进行建模。偏置校正器将校正偏差添加到计算的临界尺寸以校正图像。

2. 发明授权

US07336341B2 Simulator of lithography tool for correcting focus error and critical dimension, simulation method for correcting focus error and critical dimension, and computer medium for storing computer program for simulator 失效
标题翻译：用于校正焦点误差和关键尺寸的光刻工具的模拟器，用于校正聚焦误差和关键尺寸的模拟方法，以及用于存储用于模拟器的计算机程序的计算机介质
公开(公告)号：US07336341B2
公开(公告)日：2008-02-26
申请号：US11045296
申请日：2005-01-31
申请人： Shoji Mimotogi , Daisuke Kawamura , Akiko Yamada
发明人： Shoji Mimotogi , Daisuke Kawamura , Akiko Yamada
IPC分类号： G03B27/68
CPC分类号： G06F17/5009 , G03F7/70625
摘要： A simulator of a lithography tool includes a correcting parameter memory storing a correcting scaling value to correct a focus error of a projection optical system in the lithography tool and a correcting bias to correct a critical dimension error generated in the lithography tool. A model simulation engine simulates an image formation under a corrected focus calculated by multiplying a defocus of the projection optical system by the correcting scaling value to model a calculated critical dimension of an image. A bias corrector adds the correcting bias to the calculated critical dimension to correct the image.
摘要翻译：光刻工具的模拟器包括存储校正缩放值以校正光刻工具中的投影光学系统的聚焦误差的校正参数存储器以及用于校正光刻工具中产生的临界尺寸误差的校正偏置。模型仿真引擎模拟在通过将投影光学系统的散焦乘以校正缩放值计算的校正焦点下的图像形成，以对图像的计算临界尺寸进行建模。偏置校正器将校正偏差添加到计算的临界尺寸以校正图像。

3. 发明授权

US06418553B1 Circuit designing method for semiconductor device and computer-readable medium 失效
标题翻译：半导体器件和计算机可读介质的电路设计方法
公开(公告)号：US06418553B1
公开(公告)日：2002-07-09
申请号：US09522951
申请日：2000-03-10
申请人： Akiko Yamada , Koji Hashimoto , Shoji Mimotogi
发明人： Akiko Yamada , Koji Hashimoto , Shoji Mimotogi
IPC分类号： G06F760
CPC分类号： G06F17/5068 , G03F1/32
摘要： There are provided a circuit designing method using a half-tone phase shift mask for forming a circuit pattern on a semiconductor substrate, and a computer-readable medium having recorded a program for causing a computer to execute the circuit designing method. The circuit designing method comprises the steps of: calculating a first lithography process tolerance, which is an index satisfying a range of a dimensional fluctuation allowed when a basic pattern representative of the circuit pattern is formed on the semiconductor substrate, and calculating a second lithography process tolerance, which is an index capable of avoiding the formation of a side lobe capable of being produced on the semiconductor substrate when the basic pattern is formed on the semiconductor substrate using the half-tone phase shift mask, respectively, using an optical simulation; calculating a common lithography process tolerance comprising an overlapping region of the first lithography process tolerance and the second lithography process tolerance; preparing an inhibiting rule for excluding a circuit pattern including the basic pattern, which is below a reference value previously set on the basis of the common lithography process tolerance, from an object to be designed; and designing a circuit using the inhibiting rule.
摘要翻译：提供了一种使用半色调相移掩模在半导体衬底上形成电路图案的电路设计方法，以及记录有使计算机执行电路设计方法的程序的计算机可读介质。电路设计方法包括以下步骤：计算第一光刻处理容差，其是当在半导体衬底上形成表示电路图案的基本图案时允许的尺寸波动的范围的索引，以及计算第二光刻处理公差，其是当使用光学模拟分别使用半色调相移掩模在半导体衬底上形成基本图案时能够避免形成能够在半导体衬底上产生的旁瓣的指标; 计算公共光刻工艺公差，其包括第一光刻工艺公差和第二光刻工艺公差的重叠区域; 准备将包含基本图案的电路图案排除在低于基于普通光刻加工公差的预先设定的基准值的电路图案的禁止规则; 并使用禁止规则设计电路。

4. 发明授权

US08977873B2 Information processing apparatus and control method for selecting operation mode based on a processing load and significance level of received data to operate a transmitter with a proper performance margin 有权
标题翻译：信息处理装置和控制方法，用于基于处理负荷和接收数据的显着性级别选择操作模式，以操作具有适当性能裕量的发射机
公开(公告)号：US08977873B2
公开(公告)日：2015-03-10
申请号：US13366943
申请日：2012-02-06
申请人： Hiroki Ichiki , Akiko Yamada , Satoshi Imai
发明人： Hiroki Ichiki , Akiko Yamada , Satoshi Imai
IPC分类号： G06F1/26 , G06F1/32 , H04L12/54 , H04L12/46
CPC分类号： G06F1/3209 , G06F1/26 , H04L12/4641 , H04L12/56
摘要： In an information processing apparatus, a transmitter forwards received data. A significance determination unit determines significance of the received data. Based on the significance of the received data, an operation mode selection unit selects which operation mode to apply. Power management information stored in a memory describes what power management is to be performed in each different operation mode. A control unit performs power management of the transmitter, with reference to the stored power management information corresponding to the selected operation mode.
摘要翻译：在信息处理装置中，发送器转发所接收的数据。重要性确定单元确定接收到的数据的重要性。基于接收到的数据的重要性，操作模式选择单元选择应用哪种操作模式。存储在存储器中的电源管理信息描述了在每种不同的操作模式下要执行的功率管理。控制单元参照与所选择的操作模式对应的所存储的电力管理信息来执行发送器的电力管理。

5. 发明授权

US08705555B2 Route control method and route control system 有权
标题翻译：路线控制方法和路线控制系统
公开(公告)号：US08705555B2
公开(公告)日：2014-04-22
申请号：US12890776
申请日：2010-09-27
申请人： Satoshi Imai , Akiko Yamada , Takanori Matsunaga
发明人： Satoshi Imai , Akiko Yamada , Takanori Matsunaga
IPC分类号： H04Q11/02
CPC分类号： H04L43/0876 , H04L41/0803 , H04L41/12 , H04L43/0817 , H04L45/127
摘要： A route control system includes a status measuring unit, a cost management unit, a route determining unit, and a route setting unit. The status measuring unit checks a status of each node included in a network. The status is a wake state or a sleep state. The cost management unit updates a link cost for a link connected to a node in the wake state to a value smaller than any link cost for a link connected to a node in the sleep state. The route determining unit determines an optimum route connecting a first terminal to a second terminal. A sum of the link costs for the optimum route is lowest among the link costs for other available routes connecting the first terminal to the second terminal. The route setting unit sets a requested data flow in the optimum route.
摘要翻译：路线控制系统包括状态测量单元，成本管理单元，路线确定单元和路线设置单元。状态测量单元检查网络中包括的每个节点的状态。状态是唤醒状态或睡眠状态。成本管理单元将连接到处于唤醒状态的节点的链路的链路成本更新为小于连接到处于睡眠状态的节点的链路的任何链路成本的值。路线确定单元确定将第一终端连接到第二终端的最佳路由。在将第一终端连接到第二终端的其他可用路由的链路成本中，最佳路由的链路成本的总和最小。路由设置单元在最佳路由中设置所请求的数据流。

6. 发明申请

US20120033567A1 DATA TRANSMISSION APPARATUS, DATA RECEIVING APPARATUS, AND DATA TRANSMISSION METHOD 审中-公开
标题翻译：数据传输装置，数据接收装置和数据传输方法
公开(公告)号：US20120033567A1
公开(公告)日：2012-02-09
申请号：US13154586
申请日：2011-06-07
申请人： Akiko Yamada , Satoshi Imai
发明人： Akiko Yamada , Satoshi Imai
IPC分类号： H04L12/26
CPC分类号： H04L45/60 , H04L45/125
摘要： In a data transmission apparatus a processor refers to a storage unit storing a usage percentage indicative of a percentage by which each of a plurality of routes is used for transmitting data destined for an apparatus, distributes the data destined for the apparatus to routes according to the usage percentage of each route to transmit the data destined for the apparatus, lowers the usage percentage set in the storage unit of a route on which a data transmission load is light compared with other routes to zero. If a state in which the usage percentages of two or more routes are greater than zero continues for a determined period of time, then the processor determines that an equilibrium state has arisen. Upon detecting the equilibrium state, the processor sets usage percentages of the two or more routes between which there is a difference in the storage unit.
摘要翻译：在数据传输装置中，处理器是指存储指示百分比的使用百分比的存储单元，通过该百分比将多个路由中的每个路由用于发送用于装置的数据，将根据该装置的目的地的装置分配给路由用于发送去往设备的数据的每个路由的使用百分比降低与其他路由相比数据传输负载较轻的路由的存储单元中设置的使用百分比为零。如果两个或多个路由的使用百分比大于零的状态持续一段确定的时间，则处理器确定已经出现平衡状态。在检测到平衡状态时，处理器设置存储单元之间存在差异的两条或多条路线的使用百分比。

7. 发明授权

US08049509B2 Battery information acquiring apparatus 有权
标题翻译：电池信息获取装置
公开(公告)号：US08049509B2
公开(公告)日：2011-11-01
申请号：US12406451
申请日：2009-03-18
申请人： Hiroki Sakurai , Tetsuro Itakura , Toshiyuki Umeda , Akiko Yamada , Nobuo Shibuya , Yoshinao Tatebayashi , Daisuke Kurose
发明人： Hiroki Sakurai , Tetsuro Itakura , Toshiyuki Umeda , Akiko Yamada , Nobuo Shibuya , Yoshinao Tatebayashi , Daisuke Kurose
IPC分类号： G01N27/416
CPC分类号： H01M10/482 , G01R31/362 , G01R31/3658 , H02J5/00 , H02J5/005 , H02J7/0021 , Y02T10/7055
摘要： A battery information acquiring apparatus includes a voltage acquiring unit which acquires an inter-terminal voltage of the battery cell; a battery information acquiring circuit which acquires battery information of the battery cell with the acquired voltage being supplied as a first power supply voltage and; a radio circuit which transmits a signal of the battery information to the management unit via the antenna with the acquired voltage being supplied as a second power supply voltage and; a rectification circuit which receives a radio signal from the management unit via the antenna, rectify the received radio signal and generate a DC voltage; and a control circuit which controls supply of the first and second power supply voltages to the battery information acquiring circuit and the radio circuit wherein the control circuit operates with the generated DC voltage being supplied as a third power supply voltage.
摘要翻译：电池信息获取装置包括获取电池单元的端子间电压的电压获取单元; 电池信息获取电路，其获取所获取的电压作为第一电源电压的电池信息; 无线电电路，其中获取的电压被提供作为第二电源电压，经由天线将电池信息的信号发送到管理单元; 整流电路，经由天线从管理单元接收无线信号，对接收到的无线信号进行整流，生成直流电压; 以及控制电路，其控制对电池信息获取电路和无线电电路的第一和第二电源电压的供应，其中控制电路以产生的直流电压作为第三电源电压供电。

8. 发明授权

US07660249B2 Packet shaping device, router, band control device and control method 失效
标题翻译：分组整形设备，路由器，频带控制设备及控制方法
公开(公告)号：US07660249B2
公开(公告)日：2010-02-09
申请号：US11058993
申请日：2005-02-16
申请人： Iwao Toda , Akiko Yamada
发明人： Iwao Toda , Akiko Yamada
IPC分类号： H04L12/26
CPC分类号： H04L47/10 , H04L47/11 , H04L47/21 , H04L47/22 , H04L47/2441 , H04L47/245 , H04L47/283
摘要： A packet shaping device for the purpose of shaping a packet in which burst has grown in a router to an original packet without the burst growth is disclosed. The packet shaping device monitors an arrival time TA of each packet on which a pass time TP is recorded when the packet passes a prescribed pass point and calculates a delay time TD which is a time difference between the pass time TP and the arrival time TA. Then, the packet shaping device obtains a maximum delay time TDmax among the delay times, and delays and sends all the arrived packets in such that the delay time of all the arrived packets is equivalent to the maximum delay time.
摘要翻译：公开了一种分组整形设备，用于将脉冲串在路由器中增长到原始分组而不突发增长的分组。分组整形装置在分组通过规定的通过点时监视记录了通过时间TP的各个分组的到达时间TA，并计算作为通过时间TP与到达时间TA之间的时间差的延迟时间TD。然后，分组整形装置获得延迟时间中的最大延迟时间TDmax，并且延迟并发送所有到达的分组，使得所有到达分组的延迟时间等于最大延迟时间。

9. 发明授权

US07512093B2 QoS setup method and QoS setup system for use in mobile communication, and mobile terminal apparatus, home agent and server apparatus used for the QoS setup system 有权
标题翻译：用于移动通信的QoS建立方法和QoS建立系统，以及用于QoS建立系统的移动终端装置，归属代理和服务器装置
公开(公告)号：US07512093B2
公开(公告)日：2009-03-31
申请号：US11205429
申请日：2005-08-17
申请人： Keiichi Nakatsugawa , Ryuuichi Takechi , Akiko Yamada
发明人： Keiichi Nakatsugawa , Ryuuichi Takechi , Akiko Yamada
IPC分类号： H04Q7/24
CPC分类号： H04W24/00
摘要： A QoS setup method comprises the steps of a mobile node MN recognizing a first QoS setup request when an opposite correspondent node CN makes the first QoS setup request for its route to the home address HoA of the mobile node MN, the mobile node MN making a second QoS setup request, and establishing the second QoS setup for a route between the home address HoA and Care-of Address CoA of the mobile node MN. This method makes it possible to carry out QoS setup for a section to a moved-to place of a mobile node MN in response to a QoS setup request from an opposite correspondent node CN, even if the correspondent node CN and mobile node do not have a function of route optimization.
摘要翻译： QoS建立方法包括以下步骤：移动节点MN在相对的通信节点CN向移动节点MN的归属地址HoA发送其路由的第一QoS建立请求时识别第一QoS建立请求，移动节点MN做出第二QoS建立请求，以及为移动节点MN的归属地址HoA和转交地址CoA之间的路由建立第二QoS建立。该方法使得可以响应于来自对方通信节点CN的QoS建立请求，对移动节点MN的移动位置进行QoS建立，即使对端节点CN和移动节点没有路由优化的功能。

10. 发明授权

US5683898A Gene coding for eicosapentaenoic acid synthesizing enzymes and process for production of eicosapentaenoic acid 失效
标题翻译：二十碳五烯酸合成酶的基因编码和二十碳五烯酸的生产方法
公开(公告)号：US5683898A
公开(公告)日：1997-11-04
申请号：US375709
申请日：1995-01-20
申请人： Kazunaga Yazawa , Akiko Yamada , Seishi Kato , Kiyosi Kondo
发明人： Kazunaga Yazawa , Akiko Yamada , Seishi Kato , Kiyosi Kondo
IPC分类号： C12N1/21 , C12N9/00 , C12P7/64 , C07H19/00 , C12N1/20 , C12N15/00
CPC分类号： C12N9/93 , C12P7/6427 , C12P7/6472
摘要： There is provided an advantageous process for production of EPA by a gene recombinant technique wherein genes coding for biosynthesis enzymes for eicosapentaenoic acid (EPA) useful as pharmaceuticals, agrochemicals, foods, feeds or the like is obtained from microorganisms. EPA is produced by obtaining genes coding for eicosapentaenoic acid (EPA) biosynthesis enzymes, constructing a plasmid by joining the genes to a vector, transforming E. coli with the plasmid, and culturing the transformed E. coli.
摘要翻译：提供了通过基因重组技术生产EPA的有利方法，其中可从微生物获得编码二十碳五烯酸（EPA）的生物合成酶的基因，其用作药物，农业化学品，食品，饲料等。 EPA通过获得编码二十碳五烯酸（EPA）生物合成酶的基因产生，通过将基因连接到载体构建质粒，用质粒转化大肠杆菌，并培养转化的大肠杆菌。

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