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1. 发明申请

US20070069344A1 Semiconductor module 有权
标题翻译：半导体模块
公开(公告)号：US20070069344A1
公开(公告)日：2007-03-29
申请号：US11528672
申请日：2006-09-28
申请人： Shiro Yamashita , Shinichi Fujiwara , Shosaku Ishihara , Hideto Joshinari
发明人： Shiro Yamashita , Shinichi Fujiwara , Shosaku Ishihara , Hideto Joshinari
IPC分类号： H01L23/495
CPC分类号： H01L23/142 , H01L23/367 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/36 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/84 , H01L2224/04034 , H01L2224/04042 , H01L2224/05553 , H01L2224/0603 , H01L2224/29111 , H01L2224/32225 , H01L2224/40091 , H01L2224/40095 , H01L2224/40225 , H01L2224/45124 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73221 , H01L2224/73265 , H01L2224/77272 , H01L2224/83192 , H01L2224/83801 , H01L2224/84801 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/157 , H01L2924/30105 , H01L2924/351 , H01L2924/00 , H01L2924/01047 , H01L2924/00012 , H01L2224/37099
摘要： To prevent any uneven solder wetting in a main surface of electrodes of a semiconductor connected with a main surface of a planar lead and any displacement of the lead vis-a-vis the electrodes due to the reflow of the solder in a semiconductor module having the semiconductor element mounted on a substrate and the planar lead electrically connected therewith, the present invention provides an improved semiconductor module characterized in that the width of at least a part of the region of the main surface of the lead facing the semiconductor element is expanded wider than or equal to the width of the electrodes formed on the semiconductor element, and preferably the other part of the main surface of the lead soldered to an electrode formed on the substrate is split in the extending direction thereof.
摘要翻译：为了防止与平面引线的主表面连接的半导体的电极的主表面中的任何不均匀的焊料润湿以及由于焊料在具有安装在基板上的半导体元件和与其电连接的平面引线，本发明提供一种改进的半导体模块，其特征在于，面向半导体元件的引线的主表面的至少一部分区域的宽度被扩展到宽于或等于形成在半导体元件上的电极的宽度，优选焊接到形成在基板上的电极的引线的主表面的另一部分沿其延伸方向分开。

2. 发明授权

US07719100B2 Power semiconductor module with MOS chip 有权
标题翻译：功率半导体模块采用MOS芯片
公开(公告)号：US07719100B2
公开(公告)日：2010-05-18
申请号：US11528672
申请日：2006-09-28
申请人： Shiro Yamashita , Shinichi Fujiwara , Shosaku Ishihara , Hideto Yoshinari
发明人： Shiro Yamashita , Shinichi Fujiwara , Shosaku Ishihara , Hideto Yoshinari
IPC分类号： H01L23/48 , H01L21/00
CPC分类号： H01L23/142 , H01L23/367 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/36 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/84 , H01L2224/04034 , H01L2224/04042 , H01L2224/05553 , H01L2224/0603 , H01L2224/29111 , H01L2224/32225 , H01L2224/40091 , H01L2224/40095 , H01L2224/40225 , H01L2224/45124 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73221 , H01L2224/73265 , H01L2224/77272 , H01L2224/83192 , H01L2224/83801 , H01L2224/84801 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/157 , H01L2924/30105 , H01L2924/351 , H01L2924/00 , H01L2924/01047 , H01L2924/00012 , H01L2224/37099
摘要： To prevent any uneven solder wetting in a main surface of electrodes of a semiconductor connected with a main surface of a planar lead and any displacement of the lead vis-a-vis the electrodes due to the reflow of the solder in a semiconductor module having the semiconductor element mounted on a substrate and the planar lead electrically connected therewith, the present invention provides an improved semiconductor module characterized in that the width of at least a part of the region of the main surface of the lead facing the semiconductor element is expanded wider than or equal to the width of the electrodes formed on the semiconductor element, and preferably the other part of the main surface of the lead soldered to an electrode formed on the substrate is split in the extending direction thereof.
摘要翻译：为了防止与平面引线的主表面连接的半导体的电极的主表面中的任何不均匀的焊料润湿以及由于焊料在具有安装在基板上的半导体元件和与其电连接的平面引线，本发明提供一种改进的半导体模块，其特征在于，面向半导体元件的引线的主表面的至少一部分区域的宽度被扩展到宽于或等于形成在半导体元件上的电极的宽度，优选焊接到形成在基板上的电极的引线的主表面的另一部分沿其延伸方向分开。

3. 发明授权

US07498671B2 Power semiconductor module 有权
标题翻译：功率半导体模块
公开(公告)号：US07498671B2
公开(公告)日：2009-03-03
申请号：US11834724
申请日：2007-08-07
申请人： Shinichi Fujiwara , Masahide Harada , Hideto Yoshinari , Shosaku Ishihara , Shiro Yamashita , Isamu Yoshida , Ukyo Ikeda
发明人： Shinichi Fujiwara , Masahide Harada , Hideto Yoshinari , Shosaku Ishihara , Shiro Yamashita , Isamu Yoshida , Ukyo Ikeda
IPC分类号： H01L23/10
CPC分类号： H01L23/3735 , H01L24/32 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/83 , H01L24/84 , H01L24/92 , H01L2224/26165 , H01L2224/26175 , H01L2224/291 , H01L2224/29111 , H01L2224/33181 , H01L2224/371 , H01L2224/37147 , H01L2224/3754 , H01L2224/40095 , H01L2224/40225 , H01L2224/40499 , H01L2224/73263 , H01L2224/83136 , H01L2224/83139 , H01L2224/8314 , H01L2224/83385 , H01L2224/83801 , H01L2224/83815 , H01L2224/84801 , H01L2224/84815 , H01L2224/9221 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/1305 , H01L2924/13055 , H01L2924/15747 , H01L2924/15787 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/014 , H01L2224/83 , H01L2224/84
摘要： A semiconductor module of the present invention comprises a first conductive layer (film) and a second conductive layer (film) which are separately formed on the main surface of a packed substrate, a thermal diffusion plate connected by solder to the upper surface of the first conductive layer, a semiconductor element connected by solder to the upper surface of the thermal diffusion plate, and a lead having one end connected by solder to the second conductive layer and the other end connected by solder to the semiconductor element, wherein the outer periphery of the connected region where the semiconductor element is connected by solder to the upper surface of the thermal diffusion plate is formed with protrusion parts protruding up from the connecting region and a turning of the semiconductor element in the upper surface of the thermal diffusion plate in the solder connecting process is suppressed by the protrusion parts.
摘要翻译：本发明的半导体模块包括在填充基板的主表面上分别形成的第一导电层（膜）和第二导电层（膜），通过焊料与第一导电层（膜）的上表面连接的热扩散板导电层，通过焊料连接到热扩散板的上表面的半导体元件，以及引线，其一端通过焊料连接到第二导电层，另一端通过焊料连接到半导体元件，其中外周边半导体元件通过焊料连接到热扩散板的上表面的连接区域形成有从连接区域突出的突出部分和在焊料中的热扩散板的上表面中的半导体元件的转动连接过程被突出部分抑制。

4. 发明申请

US20080061431A1 POWER SEMICONDUCTOR MODULE 有权
标题翻译：功率半导体模块
公开(公告)号：US20080061431A1
公开(公告)日：2008-03-13
申请号：US11834724
申请日：2007-08-07
申请人： Shinichi Fujiwara , Masahide Harada , Hideto Yoshinari , Shosaku Ishihara , Shiro Yamashita , Isamu Yoshida , Ukyo Ikeda
发明人： Shinichi Fujiwara , Masahide Harada , Hideto Yoshinari , Shosaku Ishihara , Shiro Yamashita , Isamu Yoshida , Ukyo Ikeda
IPC分类号： H01L23/34
CPC分类号： H01L23/3735 , H01L24/32 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/83 , H01L24/84 , H01L24/92 , H01L2224/26165 , H01L2224/26175 , H01L2224/291 , H01L2224/29111 , H01L2224/33181 , H01L2224/371 , H01L2224/37147 , H01L2224/3754 , H01L2224/40095 , H01L2224/40225 , H01L2224/40499 , H01L2224/73263 , H01L2224/83136 , H01L2224/83139 , H01L2224/8314 , H01L2224/83385 , H01L2224/83801 , H01L2224/83815 , H01L2224/84801 , H01L2224/84815 , H01L2224/9221 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/1305 , H01L2924/13055 , H01L2924/15747 , H01L2924/15787 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/014 , H01L2224/83 , H01L2224/84
摘要： A semiconductor module of the present invention comprises a first conductive layer (film) and a second conductive layer (film) which are separately formed on the main surface of a packed substrate, a thermal diffusion plate connected by solder to the upper surface of the first conductive layer, a semiconductor element connected by solder to the upper surface of the thermal diffusion plate, and a lead having one end connected by solder to the second conductive layer and the other end connected by solder to the semiconductor element, wherein the outer periphery of the connected region where the semiconductor element is connected by solder to the upper surface of the thermal diffusion plate is formed with protrusion parts protruding up from the connecting region and a turning of the semiconductor element in the upper surface of the thermal diffusion plate in the solder connecting process is suppressed by the protrusion parts.
摘要翻译：本发明的半导体模块包括在填充基板的主表面上分别形成的第一导电层（膜）和第二导电层（膜），通过焊料与第一导电层（膜）的上表面连接的热扩散板导电层，通过焊料连接到热扩散板的上表面的半导体元件，以及引线，其一端通过焊料连接到第二导电层，另一端通过焊料连接到半导体元件，其中外周边半导体元件通过焊料连接到热扩散板的上表面的连接区域形成有从连接区域突出的突出部分和在焊料中的热扩散板的上表面中的半导体元件的转动连接过程被突出部分抑制。

5. 发明申请

US20080261001A1 Mounting Substrate Suitable for Use to Install Surface Mount Components 审中-公开
标题翻译：安装基板适用于安装表面贴装元件
公开(公告)号：US20080261001A1
公开(公告)日：2008-10-23
申请号：US11572030
申请日：2005-02-28
申请人： Tetsuya Nakatsuka , Koji Serizawa , Shosaku Ishihara , Toshio Saeki
发明人： Tetsuya Nakatsuka , Koji Serizawa , Shosaku Ishihara , Toshio Saeki
IPC分类号： B32B3/10
CPC分类号： H05K3/3436 , H05K3/3463 , H05K2201/094 , H05K2203/176 , Y02P70/613 , Y10T428/24826
摘要： Disclosed is a low thermal resistance surface mount component and a mounting substrate bump-connected therewith, capable of removing a soldered low thermal resistance surface mount component from a circuit board without harming the performance of the circuit board or the performance of the low thermal resistance surface mount component. The solder bumps 3 in an area approaching the periphery 2 of the low thermal resistance surface mount component 1 are composed of a solder of a melting point lower than that of the solder bumps 3 in an area approaching the center. The low thermal resistance surface mount component 1 on the circuit board can be removed by partial heating and by melting the solder bumps. However, when the component is partially heated in this manner, the heating temperature declines approaching the periphery compared to that of the center of the low thermal resistance surface mount component 1. Therefore, the solder bump composed of the solder of the low melting point is used in the area approaching the periphery so that the solder bump can be melted even at such a lower heating temperature. As such, the solder bump of the entire surface of the low thermal resistance surface mount component 1 is melted.
摘要翻译：公开了一种低热阻表面安装部件和与其连接的安装基板，其能够从电路板去除焊接的低热阻表面安装部件而不损害电路板的性能或低热阻表面的性能安装组件。在接近低热阻表面安装部件1的周边2的区域中的焊锡凸块3由接近中心的区域的熔点低于焊锡凸块3的焊料构成。电路板上的低热阻表面安装部件1可以通过部分加热和熔化焊料凸块来去除。然而，当以这种方式部分地加热部件时，与低热阻表面安装部件1的中心相比，加热温度下降到接近周边。因此，在接近周边的区域中使用由低熔点焊料构成的焊料凸块，使得即使在这样较低的加热温度下也可以熔化焊料凸块。因此，低热阻表面安装部件1的整个表面的焊料凸块熔化。

6. 发明申请

US20060246304A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20060246304A1
公开(公告)日：2006-11-02
申请号：US11412090
申请日：2006-04-27
申请人： Shosaku Ishihara , Osamu Ikeda , Ryouichi Kajiwara , Shinji Hiramitsu , Satoshi Matsuyoshi
发明人： Shosaku Ishihara , Osamu Ikeda , Ryouichi Kajiwara , Shinji Hiramitsu , Satoshi Matsuyoshi
IPC分类号： B32B13/04 , B32B15/04
CPC分类号： H01L23/24 , B23K35/007 , B23K35/264 , B23K2101/40 , B23K2103/12 , B23K2103/18 , B23K2103/56 , H01L23/49513 , H01L24/01 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L2224/32225 , H01L2224/32245 , H01L2224/325 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83801 , H01L2224/83825 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01019 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01057 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/12035 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/351 , H01L2924/3651 , Y10T428/31678 , H01L2924/00012 , H01L2924/01083 , H01L2924/01013 , H01L2924/01025 , H01L2924/01028 , H01L2924/00 , H01L2924/3512 , H01L2224/05599
摘要： The present invention provides a semiconductor device comprising a semiconductor element and a copper member which are bonded to each other by a bismuth-based (Bi-based) bonding material having its melting temperature of not less than 250° C., wherein silver (Ag) is diffused in a region of the bonding material in the vicinity of an interface thereof to the semiconductor element with an inclination of concentration of the silver from the interface, in order to realize a manufacture of the semiconductor device without using lead (Pb) at low cost.
摘要翻译：本发明提供一种包含半导体元件和铜构件的半导体器件，其通过熔融温度不低于250℃的铋基（Bi系）接合材料彼此接合，其中银（Ag ）在与界面的银浓度倾斜的界面附近在接合材料附近的区域扩散，以实现半导体器件的制造，而不使用铅低成本。

7. 发明授权

US07193319B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07193319B2
公开(公告)日：2007-03-20
申请号：US11288098
申请日：2005-11-29
申请人： Koji Sasaki , Shinji Hiramitsu , Tadaaki Kariya , Satoshi Matsuyoshi , Ryouichi Kajiwara , Shosaku Ishihara
发明人： Koji Sasaki , Shinji Hiramitsu , Tadaaki Kariya , Satoshi Matsuyoshi , Ryouichi Kajiwara , Shosaku Ishihara
IPC分类号： H01L23/34
CPC分类号： H01L23/488 , H01L23/051 , H01L23/24 , H01L24/32 , H01L24/33 , H01L2224/291 , H01L2224/29111 , H01L2924/01006 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01082 , H01L2924/0132 , H01L2924/10253 , H01L2924/181 , H01L2924/351 , H01L2924/01026 , H01L2924/01028 , H01L2924/01083 , H01L2924/3512 , H01L2924/00 , H01L2924/00015 , H01L2924/014 , H01L2924/00012
摘要： A semiconductor device is provided, in which buffer layers having a coefficient of linear expansion of 3×10−6/° C. to 8×10−6/° C. are joined to upper and lower surfaces of a silicon chip through a Pb-free solder having a thickness of not more than 0.05 mm and a melting point of not less than 250° C. The upper surface of the upper buffer layer and the lower surface of the lower buffer layer are respectively joined to a lead and a base through Pb-free solders having a thickness of not less than 0.15 mm and a melting point of not less than 250° C.
摘要翻译：提供了一种半导体器件，其中具有3×10 -6 /℃至8×10 -6 /℃的线性膨胀系数的缓冲层通过无铅焊料接合到硅芯片的上表面和下表面，该无铅焊料具有厚度不大于0.05mm，熔点不低于250℃。上缓冲层的上表面和下缓冲层的下表面分别通过无铅焊接到引线和基体上焊料厚度不小于0.15mm，熔点不低于250℃。

8. 发明申请

US20060214291A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20060214291A1
公开(公告)日：2006-09-28
申请号：US11288098
申请日：2005-11-29
申请人： Koji Sasaki , Shinji Hiramitsu , Tadaaki Kariya , Satoshi Matsuyoshi , Ryouichi Kajiwara , Shosaku Ishihara
发明人： Koji Sasaki , Shinji Hiramitsu , Tadaaki Kariya , Satoshi Matsuyoshi , Ryouichi Kajiwara , Shosaku Ishihara
IPC分类号： H01L23/48
CPC分类号： H01L23/488 , H01L23/051 , H01L23/24 , H01L24/32 , H01L24/33 , H01L2224/291 , H01L2224/29111 , H01L2924/01006 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01082 , H01L2924/0132 , H01L2924/10253 , H01L2924/181 , H01L2924/351 , H01L2924/01026 , H01L2924/01028 , H01L2924/01083 , H01L2924/3512 , H01L2924/00 , H01L2924/00015 , H01L2924/014 , H01L2924/00012
摘要： A semiconductor device is provided, in which buffer layers having a coefficient of linear expansion of 3×10−6/° C. to 8×10−6/° C. are joined to upper and lower surfaces of a silicon chip through a Pb-free solder having a thickness of not more than 0.05 mm and a melting point of not less than 250° C. The upper surface of the upper buffer layer and the lower surface of the lower buffer layer are respectively joined to a lead and a base through Pb-free solders having a thickness of not less than 0.15 mm and a melting point of not less than 250° C.
摘要翻译：提供一种半导体器件，其中具有3×10 -6 /℃至8×10 -6 /℃的线性膨胀系数的缓冲层通过无铅焊料接合到硅芯片的上表面和下表面，该无铅焊料具有厚度不大于0.05mm，熔点不低于250℃。上缓冲层的上表面和下缓冲层的下表面分别通过无铅焊接到引线和基体上焊料厚度不小于0.15mm，熔点不低于250℃。

9. 发明授权

US06798059B1 Multilayer electronic part, its manufacturing method, two-dimensionally arrayed element packaging structure, and its manufacturing method 失效
标题翻译：多层电子部件，其制造方法，二维阵列元件封装结构及其制造方法
公开(公告)号：US06798059B1
公开(公告)日：2004-09-28
申请号：US09830127
申请日：2001-04-24
申请人： Shosaku Ishihara , Masato Nakamura , Takashi Kuroki , Shuzou Sano , Mikio Izumi , Takaya Osawa , Mitsuhiro Oshiki
发明人： Shosaku Ishihara , Masato Nakamura , Takashi Kuroki , Shuzou Sano , Mikio Izumi , Takaya Osawa , Mitsuhiro Oshiki
IPC分类号： H01L23053
CPC分类号： B06B1/064 , B06B1/0622 , H01L41/0472 , H01L41/0475 , H01L41/083 , H01L41/293
摘要： In order to provide a two-dimensionally arrayed probe (element packaging structure) in which a multilayer element can be used as a piezoelectric ceramic transducer element, each defective element can be replaced and the ill connection of each element can be repaired, and in order to provide a multilayer electric part suitable for realizing such an element packaging structure, the multilayer electronic part is configured with a multilayer chip-like element having a surface electrode, an internal electrode and a back electrode on the one hand and a flexible board attached to one side surface of the chip-like element on the other hand, alternate ones of the electrodes along the multilayer of the chip-like element are connected electrically to each other by the electrode pattern of the flexible board thereby to form two electrode groups, and the end portions of the electrode pattern of the flexible board are used as the two electrode portions for external connection which are electrically connected to the two electrode groups.
摘要翻译：为了提供其中可以使用多层元件作为压电陶瓷换能器元件的二维排列的探针（元件封装结构），可以更换每个缺陷元件，并且可以修复每个元件的不良连接，并且按顺序为了提供适于实现这种元件封装结构的多层电气部件，多层电子部件一方面配置有具有表面电极，内部电极和背面电极的多层片状元件，以及附着到另一方面，芯片状元件的一个侧表面沿着芯片状元件的多层的交替电极通过柔性板的电极图案彼此电连接，从而形成两个电极组，并且柔性板的电极图案的端部用作电连接的用于外部连接的两个电极部分连接到两个电极组。

10. 发明授权

US07423349B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07423349B2
公开(公告)日：2008-09-09
申请号：US11412090
申请日：2006-04-27
申请人： Shosaku Ishihara , Osamu Ikeda , Ryouichi Kajiwara , Shinji Hiramitsu , Satoshi Matsuyoshi
发明人： Shosaku Ishihara , Osamu Ikeda , Ryouichi Kajiwara , Shinji Hiramitsu , Satoshi Matsuyoshi
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/24 , B23K35/007 , B23K35/264 , B23K2101/40 , B23K2103/12 , B23K2103/18 , B23K2103/56 , H01L23/49513 , H01L24/01 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L2224/32225 , H01L2224/32245 , H01L2224/325 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83801 , H01L2224/83825 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01019 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01057 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/12035 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/351 , H01L2924/3651 , Y10T428/31678 , H01L2924/00012 , H01L2924/01083 , H01L2924/01013 , H01L2924/01025 , H01L2924/01028 , H01L2924/00 , H01L2924/3512 , H01L2224/05599
摘要： The present invention provides a semiconductor device comprising a semiconductor element and a copper member which are bonded to each other by a bismuth-based (Bi-based) bonding material having its melting temperature of not less than 250° C., wherein silver (Ag) is diffused in a region of the bonding material in the vicinity of an interface thereof to the semiconductor element with an inclination of concentration of the silver from the interface, in order to realize a manufacture of the semiconductor device without using lead (Pb) at low cost.
摘要翻译：本发明提供一种包含半导体元件和铜构件的半导体器件，其通过熔融温度不低于250℃的铋基（Bi系）接合材料彼此接合，其中银（Ag ）在与界面的银浓度倾斜的界面附近在接合材料附近的区域扩散，以实现半导体器件的制造，而不使用铅低成本。

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