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    • 5. 发明授权
    • Cascode circuit and integrated circuit having it
    • 串联电路和集成电路
    • US07071786B2
    • 2006-07-04
    • US10873291
    • 2004-06-23
    • Akira InoueSeiki Goto
    • Akira InoueSeiki Goto
    • H03F3/04
    • H03F1/223H03F3/189
    • A cascode circuit includes a first field effect transistor which has a source terminal grounded, a second field effect transistor which has a source terminal connected to a drain terminal of the first field effect transistor, and a first capacitor connected between the source terminal of the first field effect transistor and a gate terminal of the second field effect transistor. The first field effect transistor and the second field effect transistor are cascode-connected successively. A capacitance value of the first capacitor is 0.01 to 10 times that between the gate and source terminals of the second field effect transistor.
    • 共射共振电路包括:源极端子接地的第一场效应晶体管,具有与第一场效应晶体管的漏极端子连接的源极端子的第二场效应晶体管,以及连接在第一场效应晶体管的源极端子之间的第一电容器 场效应晶体管和第二场效应晶体管的栅极端子。 第一场效应晶体管和第二场效应晶体管被依次串联连接。 第一电容器的电容值是第二场效应晶体管的栅极和源极之间的电容值的0.01至10倍。
    • 6. 发明授权
    • High-frequency power amplifier
    • 高频功率放大器
    • US07030698B2
    • 2006-04-18
    • US10819207
    • 2004-04-07
    • Seiki GotoYoshinobu Sasaki
    • Seiki GotoYoshinobu Sasaki
    • H03F3/68
    • H01L29/7392H01L21/265H03F3/604
    • In a high-frequency power amplifier, gate feed portions are formed by dividing a gate feed which connects transistor gate electrodes in parallel, and each of the gate feed portions includes a given number of gate electrodes connected in parallel. Each of transistor cell elements includes a set of the gate electrodes connected in parallel. A resistance wire is interposed between the transistor cell elements to isolate each transistor cell element. The resistance wire and the gate electrodes are made of the same metal material and formed by the same process. Thus, closed loop oscillation of transistors is suppressed with no increase in chip size.
    • 在高频功率放大器中,栅极馈电部分通过分开并联连接晶体管栅电极的栅极馈电而形成,并且每个栅极馈送部分包括并联连接的给定数量的栅电极。 每个晶体管单元元件包括并联连接的一组栅电极。 电阻线插在晶体管单元元件之间以隔离每个晶体管单元元件。 电阻丝和栅电极由相同的金属材料制成并通过相同的工艺形成。 因此,晶体管的闭环振荡被抑制,芯片尺寸没有增加。