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    • 2. 发明授权
    • Thin-film two-terminal elements, method of production thereof, liquid crystal display
    • 薄膜双端元件,其制造方法,液晶显示器
    • US06350557B1
    • 2002-02-26
    • US09463700
    • 2000-01-31
    • Shigeru AomoriYoshiki Nakatani
    • Shigeru AomoriYoshiki Nakatani
    • G02F1136
    • H01L45/00G02F1/1365
    • A thin-film two-terminal element including first metal film functioning as a wiring layer and a first electrode, a first insulating film formed on the first electrode of the first metal film and having a non-linear resistance property, a second metal film formed on the first insulating film and functioning as a second electrode, and a third metal film formed in a wire layer portion of the first metal film and having a smaller stress and a smaller electrical resistance than the first metal film, and a thin-film two-terminal element including, on a resinous substrate as an insulative substrate, a first metal film functioning as a wiring layer and a first electrode, a first insulating film formed on the first electrode of the first metal film and having a non-linear resistance property, a second metal film formed on the first insulating film and functioning as a second electrode, and a second insulating film formed under the second metal film except on a portion thereof which electrically functions with the first electrode via the first insulating film.
    • 一种薄膜二端元件,包括用作布线层的第一金属膜和第一电极,形成在第一金属膜的第一电极上并具有非线性电阻特性的第一绝缘膜,形成第二金属膜 在第一绝缘膜上并且起第二电极的作用,以及形成在第一金属膜的导线层部分中并且具有比第一金属膜更小的应力和更小电阻的第三金属膜,以及薄膜二 末端元件包括在作为绝缘基板的树脂基板上的作为布线层的第一金属膜和第一电极,形成在第一金属膜的第一电极上并具有非线性电阻特性的第一绝缘膜 形成在第一绝缘膜上并用作第二电极的第二金属膜,以及形成在第二金属膜之下的第二绝缘膜,除了其一部分之外, 通过第一绝缘膜与第一电极起作用。
    • 7. 发明申请
    • THIN FILM TRANSISTOR AND DISPLAY DEVICE
    • 薄膜晶体管和显示器件
    • US20120223316A1
    • 2012-09-06
    • US13509367
    • 2010-07-08
    • Yohsuke KanzakiYudai TakanishiYoshiki Nakatani
    • Yohsuke KanzakiYudai TakanishiYoshiki Nakatani
    • H01L29/786
    • H01L29/78618H01L29/66765H01L29/78678H01L29/78696
    • Disclosed is a thin film transistor wherein an ON current is increased and a leak current is reduced. The channel layer 60 of the TFT 10 is formed of a crystalline silicon, and the lower surface of one end of the channel layer 60 is electrically connected to the surface of an n+ silicon layer 40a, and the lower surface of the other end is electrically connected to the surface of an n+ silicon layer 40b. Furthermore, the side surface of said end of the channel layer 60 is electrically connected to a source electrode 50a, and the side surface of the other end is electrically connected to a drain electrode 50b. Thus, a barrier that makes electrons, which act as carriers, not easily transferred is formed on the boundary between the source electrode 50a and the channel layer 60. As a result, the ON current that flows when the TFT 10 is in the ON state can be increased, and the leak current that flows when the TFT is in the OFF state can be reduced.
    • 公开了一种薄膜晶体管,其中导通电流增加并且漏电流减小。 TFT10的沟道层60由结晶硅形成,沟道层60的一端的下表面与n +硅层40a的表面电连接,另一端的下表面电气 连接到n +硅层40b的表面。 此外,沟道层60的端部的侧表面电连接到源电极50a,另一端的侧表面电连接到漏电极50b。 因此,在源电极50a和沟道层60之间的边界上形成有作为载流子的电子不容易转移的势垒。其结果是,当TFT10处于导通状态时导通的导通电流 可以降低当TFT处于OFF状态时流过的漏电流。
    • 9. 发明授权
    • Scanning signal line drive circuit, shift register and display device
    • 扫描信号线驱动电路,移位寄存器和显示设备
    • US08605028B2
    • 2013-12-10
    • US12998340
    • 2009-06-16
    • Mayuko SakamotoYasuaki IwaseYoshiki NakataniYoshihisa Takahashi
    • Mayuko SakamotoYasuaki IwaseYoshiki NakataniYoshihisa Takahashi
    • G09G3/36
    • G09G3/3677G09G2310/0286G11C19/184G11C19/28
    • There is provided a display device capable of preventing a malfunction and a display defect due to an off-leak from occurring even when a circuit in a shift register is configured utilizing thin film transistors of relatively large off-leaks. In at least one embodiment, each of bistable circuits that constitute the shift register includes: a thin film transistor for increasing a potential of an output terminal based on a first clock; a thin film transistor for decreasing the potential of the output terminal; a thin film transistor for increasing a potential of a range netA connected to a gate terminal of the thin film transistor based on a start signal; thin film transistors for decreasing the potential of the range netA; a capacitor for increasing the potential of a range netB connected to a gate terminal of the thin film transistor; and a thin film transistor for decreasing the potential of the range netB.
    • 即使使用相对较大的泄漏的薄膜晶体管构成移位寄存器中的电路,也提供了一种能够防止因泄漏而引起的故障和显示缺陷的显示装置。 在至少一个实施例中,构成移位寄存器的双稳态电路中的每一个包括:用于基于第一时钟增加输出端子的电位的薄膜晶体管; 用于降低输出端子的电位的薄膜晶体管; 薄膜晶体管,用于基于开始信号增加连接到薄膜晶体管的栅极端子的范围netA的电位; 用于降低范围netA的电位的薄膜晶体管; 用于增加连接到薄膜晶体管的栅极端子的范围netB的电位的电容器; 以及用于降低范围netB的电位的薄膜晶体管。
    • 10. 发明申请
    • THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME
    • 薄膜晶体管及其制造方法
    • US20120138931A1
    • 2012-06-07
    • US13387371
    • 2010-04-21
    • Yoshiki NakataniMasao MoriguchiYohsuke KanzakiYudai Takanishi
    • Yoshiki NakataniMasao MoriguchiYohsuke KanzakiYudai Takanishi
    • H01L29/786H01L21/336
    • H01L29/78696H01L29/04H01L29/66757H01L29/78609H01L29/78675
    • The present invention aims at reducing an OFF current in a thin film transistor while maintaining an ON-state current.A TFT (100) includes a glass substrate (101) formed thereon with a source electrode (110) and a drain electrode (112) having their respective upper surfaces formed with n-type silicon layers (120, 121) of microcrystalline silicon. Microcrystalline silicon regions (135, 136) are formed respectively on the n-type silicon layers (120, 121) while an amorphous silicon region (130) is formed on the glass substrate (101), and these are covered by a microcrystalline silicon layer (145). Therefore, ON-state current flows from the drain electrode (112), through the microcrystalline silicon region (135), the microcrystalline silicon layer (145) and the microcrystalline silicon region (136) in this order, and then to the source electrode (110). Also, OFF current is limited by the amorphous silicon region (130).
    • 本发明旨在在保持导通状态电流的同时减小薄膜晶体管中的截止电流。 TFT(100)包括形成有源电极(110)的玻璃基板(101)和形成有微晶硅的n型硅层(120,121)的各自上表面的漏电极(112)。 分别在n型硅层(120,121)上形成微晶硅区域(135,136),同时在玻璃基板(101)上形成非晶硅区域(130),并且这些区域被微晶硅层 (145)。 因此,导通状态电流依次通过微晶硅区域(135),微晶硅层(145)和微晶硅区域(136)从漏电极(112)流过,然后流到源电极 110)。 此外,OFF电流受到非晶硅区域(130)的限制。