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1. 发明申请

US20130212317A1 Storage and Host Devices for Overlapping Storage Areas for a Hibernation File and Cached Data 审中-公开
标题翻译：用于休眠文件和缓存数据重叠存储区域的存储和主机设备
公开(公告)号：US20130212317A1
公开(公告)日：2013-08-15
申请号：US13371980
申请日：2012-02-13
申请人： Shai Traister , Rizwan Ahmed
发明人： Shai Traister , Rizwan Ahmed
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0871 , G06F1/3234 , G06F9/4418 , Y02D50/20
摘要： Storage and host devices are provided for overlapping storage areas for a hibernation file and cached data. In one embodiment, a storage device is provided that receives a command from a host device to evict cached data in a first address range of the memory. The storage device then receives a command from the host device to store a hibernation file in a second address range of the memory, wherein the second address range does not exist in the memory. The storage device maps the second address range to the first address range and stores the hibernation file in the first address range. In another embodiment, a host device is provided that sends a command to a first storage device to evict cached data in a first address range of the first storage device's memory. The host device then sends a command to the first storage device to store a hibernation file in the first address range.
摘要翻译：为休眠文件和缓存数据的重叠存储区域提供存储和主机设备。在一个实施例中，提供了存储设备，其接收来自主机设备的命令，以驱出存储器的第一地址范围中的高速缓存的数据。然后，存储设备从主机设备接收命令以将休眠文件存储在存储器的第二地址范围内，其中第二地址范围不存在于存储器中。存储设备将第二地址范围映射到第一地址范围，并将休眠文件存储在第一地址范围内。在另一个实施例中，提供了一种主机设备，其向第一存储设备发送命令以驱逐第一存储设备的存储器的第一地址范围中的缓存数据。然后，主机设备向第一存储设备发送命令以将休眠文件存储在第一地址范围内。

2. 发明授权

US08700840B2 Nonvolatile memory with write cache having flush/eviction methods 有权
标题翻译：具有写入缓存的非易失性存储器具有刷新/驱逐方法
公开(公告)号：US08700840B2
公开(公告)日：2014-04-15
申请号：US12348895
申请日：2009-01-05
申请人： Alexander Paley , Sergey Anatolievich Gorobets , Eugene Zilberman , Alan David Bennett , Shai Traister , Andrew Tomlin , William S. Wu , Bum Suck So
发明人： Alexander Paley , Sergey Anatolievich Gorobets , Eugene Zilberman , Alan David Bennett , Shai Traister , Andrew Tomlin , William S. Wu , Bum Suck So
IPC分类号： G06F12/08 , G11C11/34
CPC分类号： G06F12/0866 , G06F12/0246 , G06F12/0804 , G06F2212/7203 , G06F2212/7204 , G11C11/5628 , G11C2211/5641 , Y02D10/13
摘要： A portion of a nonvolatile memory is partitioned from a main multi-level memory array to operate as a cache. The cache memory is configured to store at less capacity per memory cell and finer granularity of write units compared to the main memory. In a block-oriented memory architecture, the cache has multiple functions, not merely to improve access speed, but is an integral part of a sequential update block system. Decisions to archive data from the cache memory to the main memory depend on the attributes of the data to be archived, the state of the blocks in the main memory portion and the state of the blocks in the cache portion.
摘要翻译：将非易失性存储器的一部分从主多层存储器阵列分区以作为高速缓存进行操作。缓存存储器被配置为以比每个存储器单元更少的容量存储和与主存储器相比写入单元的更细粒度。在面向块的存储器架构中，缓存具有多个功能，而不仅仅是提高访问速度，而是顺序更新块系统的组成部分。将数据从高速缓冲存储器归档到主存储器的决定取决于要归档的数据的属性，主存储器部分中的块的状态和高速缓存部分中的块的状态。

3. 发明授权

US08504784B2 Scheduling methods of phased garbage collection and housekeeping operations in a flash memory system 有权
标题翻译：闪存系统中分阶段垃圾收集和家政操作的调度方法
公开(公告)号：US08504784B2
公开(公告)日：2013-08-06
申请号：US11769033
申请日：2007-06-27
申请人： Shai Traister
发明人： Shai Traister
IPC分类号： G06F13/00
CPC分类号： G06F12/0246 , G06F12/0804 , G06F2212/2022 , G06F2212/7203 , G06F2212/7205
摘要： An embodiment of a non-volatile memory storage system comprises a memory controller, and a flash memory module. The memory controller manages the storage operations of the flash memory module. The memory controller is configured to assign a priority level to one or more types of house keeping operations that may be higher than a priority level of one or more types of commands received by a host coupled to the storage system, and to service all operations required of the flash memory module according to priority.
摘要翻译：非易失性存储器存储系统的实施例包括存储器控制器和闪速存储器模块。存储器控制器管理闪存模块的存储操作。存储器控制器被配置为将优先级分配给可以高于由耦合到存储系统的主机接收的一种或多种类型的命令的优先级别的一种或多种类型的房屋保持操作，并且服务于所需的所有操作的闪存模块。

4. 发明授权

US08473923B2 Pointers for write abort handling 有权
标题翻译：写中止处理指针
公开(公告)号：US08473923B2
公开(公告)日：2013-06-25
申请号：US12026472
申请日：2008-02-05
申请人： Jason T. Lin , Shai Traister , Sergey A. Gorobets
发明人： Jason T. Lin , Shai Traister , Sergey A. Gorobets
IPC分类号： G06F9/44 , G06F11/00 , G06F13/28
CPC分类号： G11C11/5642 , G06F11/1441 , G11C16/102 , G11C16/105 , G11C16/3418 , G11C29/00 , G11C2211/5646
摘要： A portion of a nonvolatile memory array that is likely to contain, partially programmed data may be identified from a high sensitivity read, by applying stricter than usual error correction code (ECC) requirements, or using pointers to programmed sectors. The last programmed data may be treated as likely to be partially programmed data. Data in the identified portion may be copied to another location, or left where it is with an indicator to prohibit further programming to the same cells. To avoid compromising previously stored data during subsequent programming, previously stored data may be backed up. Backing up may be done selectively, for example, only for nonsequential data, or only when the previously stored data contains an earlier version of data being programmed. If a backup copy already exists, another backup copy is not created. Sequential commands are treated as a single command if received within a predetermined time period.
摘要翻译：通过应用比通常的纠错码（ECC）要求更严格或使用指向编程扇区的指针，可以从高灵敏度读取来识别可能包含部分编程数据的非易失性存储器阵列的一部分。最后编程的数据可能被视为可能是部分编程的数据。所识别的部分中的数据可以被复制到另一个位置，或者与指示符一起保留在其中，以禁止进一步编程到相同的单元。为了避免在随后的编程期间损害以前存储的数据，可以备份先前存储的数据。可以有选择地进行备份，例如，仅针对非顺序数据，或仅当先前存储的数据包含正被编程的较早版本的数据时。如果备份副本已经存在，则不会创建另一个备份副本。如果在预定的时间段内被接收，则顺序命令被视为单个命令。

5. 发明授权

US08341375B2 Methods for conversion of update blocks based on association with host file management data structures 有权
标题翻译：基于与主机文件管理数据结构的关联来转换更新块的方法
公开(公告)号：US08341375B2
公开(公告)日：2012-12-25
申请号：US11725746
申请日：2007-03-19
申请人： Bum Suck So , Shai Traister
发明人： Bum Suck So , Shai Traister
IPC分类号： G06F13/00
CPC分类号： G06F12/0246 , G06F2212/7202
摘要： A method for operating a memory system is provided. In this method, a sequential update block is provided and a write command is received to write data. The write command comprises a logical address associated with the data. If the logical address is associated with a host file management data structure, then the sequential update block is converted to a chaotic update block. After the conversion, the data are written to the chaotic update block.
摘要翻译：提供了一种用于操作存储器系统的方法。在该方法中，提供顺序更新块，并且接收写入命令以写入数据。写命令包括与数据相关联的逻辑地址。如果逻辑地址与主机文件管理数据结构相关联，则将顺序更新块转换为混沌更新块。转换后，将数据写入混沌更新块。

6. 发明授权

US08244960B2 Non-volatile memory and method with write cache partition management methods 有权
标题翻译：非易失性存储器和写入缓存分区管理方法
公开(公告)号：US08244960B2
公开(公告)日：2012-08-14
申请号：US12348899
申请日：2009-01-05
申请人： Alexander Paley , Sergey Anatolievich Gorobets , Eugene Zilberman , Alan David Bennett , Shai Traister , Andrew Tomlin , William S. Wu , Bum Suck So
发明人： Alexander Paley , Sergey Anatolievich Gorobets , Eugene Zilberman , Alan David Bennett , Shai Traister , Andrew Tomlin , William S. Wu , Bum Suck So
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F12/0804 , G06F12/0866 , G06F2212/224 , G06F2212/7203 , G06F2212/7204
摘要： A portion of a nonvolatile memory is partitioned from a main multi-level memory array to operate as a cache. The cache memory is configured to store at less capacity per memory cell and finer granularity of write units compared to the main memory. In a block-oriented memory architecture, the cache has multiple functions, not merely to improve access speed, but is an integral part of a sequential update block system. The cache memory has a capacity dynamically increased by allocation of blocks from the main memory in response to a demand to increase the capacity. Preferably, a block with an endurance count higher than average is allocated. The logical addresses of data are partitioned into zones to limit the size of the indices for the cache.
摘要翻译：将非易失性存储器的一部分从主多层存储器阵列分区以作为高速缓存进行操作。缓存存储器被配置为以比每个存储器单元更少的容量存储和与主存储器相比写入单元的更细粒度。在面向块的存储器架构中，缓存具有多个功能，而不仅仅是提高访问速度，而是顺序更新块系统的组成部分。响应于增加容量的需求，高速缓冲存储器具有通过从主存储器分配块而动态增加的容量。优选地，分配耐力计数高于平均值的块。数据的逻辑地址被划分为区域以限制高速缓存的索引的大小。

7. 发明授权

US07697325B2 Non-volatile memory cell endurance using data encoding 有权
标题翻译：使用数据编码的非易失性存储单元耐久性
公开(公告)号：US07697325B2
公开(公告)日：2010-04-13
申请号：US11903764
申请日：2007-09-24
申请人： Steven T. Sprouse , Dhaval Parikh , Sukhminder S. Lobana , Shai Traister
发明人： Steven T. Sprouse , Dhaval Parikh , Sukhminder S. Lobana , Shai Traister
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C7/1006
摘要： A method and apparatus for storing an n-bit (for n>=2) data block in an array of non-volatile memory cells utilizes a predetermined n+k-bit (for k>=1) encoding selected to reduce the number of programmed cells required to store the n-bit data block.
摘要翻译：用于在非易失性存储器单元阵列中存储n位（对于n> = 2）数据块的方法和装置利用所选择的编码的预定n + k位（对于k> = 1）来减少编号存储n位数据块所需的编程单元。

8. 发明申请

US20090044190A1 URGENCY AND TIME WINDOW MANIPULATION TO ACCOMMODATE UNPREDICTABLE MEMORY OPERATIONS 有权
标题翻译：紧急和时间窗口操作来调节不可预测的存储器操作
公开(公告)号：US20090044190A1
公开(公告)日：2009-02-12
申请号：US11864740
申请日：2007-09-28
申请人： J. James Tringali , Sergey A. Gorobets , Shai Traister , Yosief Ataklti
发明人： J. James Tringali , Sergey A. Gorobets , Shai Traister , Yosief Ataklti
IPC分类号： G06F9/46
CPC分类号： G06F13/1689
摘要： The variable latency associated with flash memory due to background data integrity operations is managed in order to allow the flash memory to be used in isochronous systems. A system processor is notified regularly of the nature and urgency of requests for time to ensure data integrity. Minimal interruptions of system processing are achieved and operation is ensured in the event of a power interruption.
摘要翻译：管理由于背景数据完整性操作而与闪存相关联的可变延迟，以便允许在同步系统中使用闪存。系统处理器定期通知请求时间的性质和紧迫性，以确保数据的完整性。实现系统处理的最小中断，并且在电源中断的情况下确保操作。

9. 发明申请

US20080235463A1 Methods for conversion of update blocks based on comparison with a threshold size 有权
标题翻译：基于与阈值大小的比较来转换更新块的方法
公开(公告)号：US20080235463A1
公开(公告)日：2008-09-25
申请号：US11725628
申请日：2007-03-19
申请人： Shai Traister
发明人： Shai Traister
IPC分类号： G06F12/06
CPC分类号： G06F12/0246 , G06F2212/1016 , G06F2212/7202
摘要： A method for operating a memory system is provided. In this method, a write command is received to write data following a previous write command. The write command and the previous write command have a discontinuity in logical addresses and the discontinuity in logical addresses defines a gap between a logical address of the write command and a logical address of the previous write command. Here, a sequential update block and preexisting data associated with the sequential update block are provided. The gap is compared with a threshold size and the data are written to the sequential update block if the gap is less than the threshold size.
摘要翻译：提供了一种用于操作存储器系统的方法。在该方法中，接收写入命令以在先前写入命令之后写入数据。写入命令和先前的写入命令在逻辑地址中具有不连续性，逻辑地址中的不连续性定义了写入命令的逻辑地址与先前写入命令的逻辑地址之间的间隙。这里，提供顺序更新块和与顺序更新块相关联的预先存在的数据。将间隙与阈值大小进行比较，并且如果间隙小于阈值大小，则将数据写入顺序更新块。

10. 发明申请

US20080086619A1 Methods for phased garbage collection using phased garbage collection block or scratch pad block as a buffer 有权
标题翻译：使用分阶段垃圾收集块或便笺块作为缓冲区的分阶段垃圾收集方法
公开(公告)号：US20080086619A1
公开(公告)日：2008-04-10
申请号：US11541035
申请日：2006-09-28
申请人： Shai Traister , Jason Lin
发明人： Shai Traister , Jason Lin
IPC分类号： G06F12/00
CPC分类号： G06F12/0269
摘要： A method for phased garbage collection is provided. In this method, a write command is received to write data. The write command is allocated a timeout period to complete an execution of the write command. Thereafter, a busy signal is asserted and a portion of a garbage collection operation is performed for a garbage collection time period. The data are written to a block and the busy signal is released before the timeout period.
摘要翻译：提供了一种分阶段垃圾收集方法。在该方法中，接收写入命令以写入数据。写命令被分配一个超时周期以完成写入命令的执行。此后，确定忙信号，并且在垃圾收集时间段内执行垃圾收集操作的一部分。数据被写入一个块，并且在超时时间段之前释放忙信号。

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