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1. 发明授权

US06771343B2 Liquid crystal display 失效
标题翻译：液晶显示器
公开(公告)号：US06771343B2
公开(公告)日：2004-08-03
申请号：US10054079
申请日：2002-01-22
申请人： Il-Gon Kim , Woon-Yong Park , Byoung-Sun Na , Yu-Ri Song , Seung-Soo Baek , Young-Mi Tak , Sahng-Ik Jun
发明人： Il-Gon Kim , Woon-Yong Park , Byoung-Sun Na , Yu-Ri Song , Seung-Soo Baek , Young-Mi Tak , Sahng-Ik Jun
IPC分类号： G02F11343
CPC分类号： G02F1/136213 , G02F1/133707 , G02F1/134336 , G02F2201/121
摘要： An LCD has a storage electrode wire between long sides of partitions of a pixel electrode and gate lines or data lines. A gate wire and a storage electrode wire are formed on a substrate and covered with a gate insulating layer. A data wire is formed on the gate insulating layer and covered with a passivation layer. A thin film transistor including gate, source and drain electrodes are provided on the substrate. A pixel electrode is formed on the passivation layer and connected to the drain electrode. The pixel electrode is divided into three partitions, a first one having long and short sides parallel to data lines and gate lines, respectively, and second and third ones vice versa. A storage electrode line and some storage electrodes are disposed between the long sides of the partitions and the gate or the data lines, and between the long sides of the partitions. Other storage electrodes disposed between the short sides of the partitions and the gate or the data lines are covered by the pixel electrode. A storage electrode between the short side of the first portion and the long side of the partition is spaced apart from the first partition by at least 3 &mgr;m.
摘要翻译： LCD在像素电极的隔板的长边和栅极线或数据线之间具有存储电极线。栅极线和存储电极线形成在基板上并被栅极绝缘层覆盖。数据线形成在栅极绝缘层上并被钝化层覆盖。在基板上设置包括栅极，源极和漏极的薄膜晶体管。像素电极形成在钝化层上并连接到漏电极。像素电极被分成三个分区，第一分隔板分别具有与数据线和栅极线平行的长边和短边，第二和第三分隔物反之亦然。存储电极线和一些存储电极设置在隔板的长边和栅极或数据线之间以及隔板的长边之间。设置在隔板的短边和栅极或数据线之间的其他存储电极被像素电极覆盖。第一部分的短边与隔板的长边之间的存储电极与第一隔板间隔至少3毫米。

2. 发明授权

US06842213B2 Liquid crystal display 失效
标题翻译：液晶显示器
公开(公告)号：US06842213B2
公开(公告)日：2005-01-11
申请号：US10811049
申请日：2004-03-26
申请人： Il-Gon Kim , Woon-Yong Park , Byoung-Sun Na , Yu-Ri Song , Seung-Soo Baek , Young-Mi Tak , Sahng-Ik Jun
发明人： Il-Gon Kim , Woon-Yong Park , Byoung-Sun Na , Yu-Ri Song , Seung-Soo Baek , Young-Mi Tak , Sahng-Ik Jun
IPC分类号： G02F1/1337 , G02F1/1333 , G02F1/1343 , G02F1/1362 , G02F1/1368 , G09F9/30 , G09F9/35 , H01L21/336 , H01L29/786
CPC分类号： G02F1/136213 , G02F1/133707 , G02F1/134336 , G02F2201/121
摘要： An LCD has a storage electrode wire between long sides of partitions of a pixel electrode and gate lines or data lines. A gate wire and a storage electrode wire are formed on a substrate and covered with a gate insulating layer. A data wire is formed on the gate insulating layer and covered with a passivation layer. A thin film transistor including gate, source and drain electrodes are provided on the substrate. A pixel electrode is formed on the passivation layer and connected to the drain electrode. The pixel electrode is divided into three partitions, a first one having long and short sides parallel to data lines and gate lines, respectively, and second and third ones vice versa. A storage electrode line and some storage electrodes are disposed between the long sides of the partitions and the gate or the data lines, and between the long sides of the partitions. Other storage electrodes disposed between the short sides of the partitions and the gate or the data lines are covered by the pixel electrode. A storage electrode between the short side of the first portion and the long side of the partition is spaced apart from the first partition by at least 3 μm.
摘要翻译： LCD在像素电极的隔板的长边和栅极线或数据线之间具有存储电极线。栅极线和存储电极线形成在基板上并被栅极绝缘层覆盖。数据线形成在栅极绝缘层上并被钝化层覆盖。在基板上设置包括栅极，源极和漏极的薄膜晶体管。像素电极形成在钝化层上并连接到漏电极。像素电极被分成三个分区，第一分隔板分别具有与数据线和栅极线平行的长边和短边，第二和第三分隔物反之亦然。存储电极线和一些存储电极设置在隔板的长边和栅极或数据线之间以及隔板的长边之间。设置在隔板的短边和栅极或数据线之间的其他存储电极被像素电极覆盖。第一部分的短边与隔板的长边之间的存储电极与第一隔板间隔至少3毫米。

3. 发明授权

US06816220B2 Liquid crystal display 失效
公开(公告)号：US06816220B2
公开(公告)日：2004-11-09
申请号：US10108774
申请日：2002-03-28
申请人： Seung-Soo Baek , Woon-Yong Park , Sahng-IK Jun , Il-Gon Kim , Byoung-Sun Na , Young-Mi Tak , Yu-Ri Song
发明人： Seung-Soo Baek , Woon-Yong Park , Sahng-IK Jun , Il-Gon Kim , Byoung-Sun Na , Young-Mi Tak , Yu-Ri Song
IPC分类号： G02F11343
CPC分类号： G02F1/134336 , G02F1/133707 , G02F2001/134318 , G02F2201/121
摘要： A liquid crystal display includes: a first substrate; a first signal line formed on the first substrate and extending in a direction; a second signal line intersecting the first signal line while being insulated; a pixel electrode formed in a pixel area defined by intersections of the first signal line and the second signal line, the pixel electrode having a plurality of partitions; a switching element connected to the first signal line, the second signal line, and the pixel electrode; a second substrate opposite the first substrate; a black matrix formed on the second substrate; and a common electrode formed over the second substrate having a plurality of domain defining members, wherein each domain is enclosed by the partitions of the pixel electrode and the domain defining members and has at least one long side parallel or perpendicular to the first signal line and at least one short side curved at an angle of about 30 to about 60 degrees with the first signal line.

4. 发明授权

US09153190B2 Gate driver and display apparatus having the same 有权
标题翻译：门驱动器和显示装置具有相同的功能
公开(公告)号：US09153190B2
公开(公告)日：2015-10-06
申请号：US12333561
申请日：2008-12-12
申请人： Soon-Il Ahn , Ho-Kyoon Kwon , Byoung-Sun Na , Dong-Hyon Ki , Seung-Soo Baek , Hye-Seok Na
发明人： Soon-Il Ahn , Ho-Kyoon Kwon , Byoung-Sun Na , Dong-Hyon Ki , Seung-Soo Baek , Hye-Seok Na
IPC分类号： G09G3/36 , G06F3/038 , G11C19/18 , G11C19/28
CPC分类号： G09G3/3677 , G09G2330/08 , G11C19/184 , G11C19/28
摘要： A gate driver that comprises n shift registers, wherein n is an integer equal to or larger than 1, each of the n shift registers includes; a start stage which outputs a gate signal and starts its operation in response to a start signal, and a plurality of subsequent stages which are connected to each other in sequence, and which sequentially output a plurality of gate signals in response to a signal output from the start stage, wherein at least one stage of the plurality of subsequent stages is reset by the start signal.
摘要翻译：一种包括n个移位寄存器的栅极驱动器，其中n是等于或大于1的整数，n个移位寄存器中的每一个包括：开始阶段，其响应于起始信号输出门信号并开始其操作;以及多个后续级，其依次相互连接，并且响应于从...输出的信号顺序地输出多个门信号起始阶段，其中多个后续级中的至少一级由起始信号复位。

5. 再颁专利

USRE43575E1 Liquid crystal display panels having control lines with uniform resistance 有权
标题翻译：具有均匀电阻的控制线的液晶显示面板
公开(公告)号：USRE43575E1
公开(公告)日：2012-08-14
申请号：US10218968
申请日：2002-08-14
申请人： Byoung-Sun Na , Dong-Gyu Kim , Woon-Yong Park
发明人： Byoung-Sun Na , Dong-Gyu Kim , Woon-Yong Park
IPC分类号： G02F1/1345
CPC分类号： G02F1/1345
摘要： A liquid crystal display (LCD) panel includes a substrate, a plurality of parallel control lines on the substrate, and a bonding pad area on the substrate having a plurality of bonding pads therein. A respective one of a plurality of interconnecting conductors connect a respective bonding pad of the bonding pad area to a respective one of the plurality of parallel control lines, each of the plurality of interconnecting conductors having a uniform resistance. According to embodiments of the invention, an interconnecting conductor of the plurality of interconnecting conductors may include a material selected to provide the uniform resistance. The interconnecting conductor may include a first portion including a first material having a first resistivity and a second portion including a second material having a second resistivity different from the first resistivity. The first and second portions may have respective first and second lengths selected to provide the uniform resistance. According to other embodiments, an interconnecting conductor of the plurality of interconnecting conductors may have a width selected to provide the uniform resistance. In one embodiment, the plurality of interconnecting conductors have a resistivity per unit length associated therewith and extend from the bonding pad area in a fanned configuration, with the resistivity of the interconnecting conductors increasing toward a medial portion of the fanned configuration. The width of the interconnecting conductors may decrease towards the medial portion of the fanned configuration to produce the desired resistivity. According to other embodiments, an interconnecting conductor of the plurality of interconnecting conductors has a length selected to provide the uniform resistance. In one embodiment, the interconnecting conductor has a serpentine portion to provide the desired length.
摘要翻译：液晶显示器（LCD）面板包括衬底，在衬底上的多个并行控制线，以及衬底上的焊盘区域，其中具有多个焊盘。多个互连导体中的相应一个将接合焊盘区域的相应接合焊盘连接到多个并联控制线中的相应一个，多个互连导体中的每一个具有均匀的电阻。根据本发明的实施例，多个互连导体的互连导体可以包括被选择以提供均匀电阻的材料。互连导体可以包括包括具有第一电阻率的第一材料的第一部分和包括具有不同于第一电阻率的第二电阻率的第二材料的第二部分。第一和第二部分可以具有相应的第一和第二长度，以提供均匀的电阻。根据其他实施例，多个互连导体的互连导体可以具有被选择为提供均匀电阻的宽度。在一个实施例中，多个互连导体具有与其相关联的每单位长度的电阻率，并且从结合焊盘区域以扇形配置延伸，互连导体的电阻率朝着扇形结构的中间部分增加。互连导体的宽度可以朝着扇形构型的中间部分减小以产生所需的电阻率。根据其他实施例，多个互连导体的互连导体具有选择的长度以提供均匀的电阻。在一个实施例中，互连导体具有蛇形部分以提供期望的长度。

6. 发明授权

US6111621A Flat panel display devices having improved signal line repair capability 失效
标题翻译：具有改进的信号线修复能力的平板显示装置
公开(公告)号：US6111621A
公开(公告)日：2000-08-29
申请号：US53440
申请日：1998-04-01
申请人： Dong-Gyu Kim , Kyung-Seop Kim , Woon-Yong Park , Byoung-Sun Na
发明人： Dong-Gyu Kim , Kyung-Seop Kim , Woon-Yong Park , Byoung-Sun Na
IPC分类号： G02F1/1343 , G02F1/13 , G02F1/1362 , G02F1/1333
CPC分类号： G02F1/1309 , G02F2001/136263
摘要： Flat panel display devices having improved signal line repair capability utilize repair lines which have reduced parasitic capacitance with other active signal lines when connected to provide a repair function. This reduced parasitic capacitance is a result of a reduced number of overlaps between active signal lines (or other repair lines) and each repair line performing a repair function. A main repair line is provided on a display substrate to provide a repair function in the event one of the signal lines is defective. If a repair function is needed because a data line is defective (e.g., "opened"), this main repair line is electrically connected to a first end of the defective data line and indirectly electrically connected to a second end of the defective data line. The indirect electrical connection is provided by a sub-repair line, which can be electrically connected (i.e., "shorted") to the main repair line, and a data line extension which is electrically connected to a second end of the defective data line and the sub-repair line. To further reduce parasitic capacitance caused by overlaps between wiring patterns, the main repair line and data line extension are provided at a first wiring level and the data line and sub-repair line are provided at a second wiring level.
摘要翻译：具有改进的信号线修复能力的平板显示装置利用修复线，其在连接时具有减小的寄生电容与其它有源信号线以提供修复功能。这种减小的寄生电容是有源信号线（或其他修复线）与执行修复功能的每个修复线之间的重叠数量减少的结果。在显示基板上提供主维修线，以在信号线之一发生故障的情况下提供修复功能。如果由于数据线有缺陷（例如“打开”）而需要维修功能，则该主维修线电连接到有缺陷的数据线的第一端并间接电连接到有缺陷的数据线的第二端。间接电连接由辅修线提供，该副维修线可以与主维修线电连接（即“短路”），以及电连接到有缺陷数据线的第二端的数据线延伸，以及次修线。为了进一步降低由布线图案之间的重叠引起的寄生电容，主维修线和数据线延伸被设置在第一布线级，并且数据线和副维修线设置在第二布线级。

7. 发明授权

US6104465A Liquid crystal display panels having control lines with uniforms resistance 失效
标题翻译：具有均匀电阻的控制线的液晶显示面板
公开(公告)号：US6104465A
公开(公告)日：2000-08-15
申请号：US774505
申请日：1996-12-30
申请人： Byoung-Sun Na , Dong-Gyu Kim , Woon-Yong Park
发明人： Byoung-Sun Na , Dong-Gyu Kim , Woon-Yong Park
IPC分类号： G02F1/1343 , G02F1/1345
CPC分类号： G02F1/1345
摘要： A liquid crystal display (LCD) panel includes a substrate, a plurality of parallel control lines on the substrate, and a bonding pad area on the substrate having a plurality of bonding pads therein. A respective one of a plurality of interconnecting conductors connect a respective bonding pad of the bonding pad area to a respective one of the plurality of parallel control lines, each of the plurality of interconnecting conductors having a uniform resistance. According to embodiments of the invention, an interconnecting conductor of the plurality of interconnecting conductors may include a material selected to provide the uniform resistance. The interconnecting conductor may include a first portion including a first material having a first resistivity and a second portion including a second material having a second resistivity different from the first resistivity. The first and second portions may have respective first and second lengths selected to provide the uniform resistance. According to other embodiments, an interconnecting conductor of the plurality of interconnecting conductors may have a width selected to provide the uniform resistance. In one embodiment, the plurality of interconnecting conductors have a resistivity per unit length associated therewith and extend from the bonding pad area in a fanned configuration, with the resistivity of the interconnecting conductors increasing toward a medial portion of the fanned configuration. The width of the interconnecting conductors may decrease towards the medial portion of the fanned configuration to produce the desired resistivity. According to other embodiments, an interconnecting conductor of the plurality of interconnecting conductors has a length selected to provide the uniform resistance. In one embodiment, the interconnecting conductor has a serpentine portion to provide the desired length.
摘要翻译：液晶显示器（LCD）面板包括衬底，在衬底上的多个并行控制线，以及衬底上的焊盘区域，其中具有多个焊盘。多个互连导体中的相应一个将接合焊盘区域的相应接合焊盘连接到多个并联控制线中的相应一个，多个互连导体中的每一个具有均匀的电阻。根据本发明的实施例，多个互连导体的互连导体可以包括被选择以提供均匀电阻的材料。互连导体可以包括包括具有第一电阻率的第一材料的第一部分和包括具有不同于第一电阻率的第二电阻率的第二材料的第二部分。第一和第二部分可以具有相应的第一和第二长度，以提供均匀的电阻。根据其他实施例，多个互连导体的互连导体可以具有被选择为提供均匀电阻的宽度。在一个实施例中，多个互连导体具有与其相关联的每单位长度的电阻率，并且从结合焊盘区域以扇形配置延伸，互连导体的电阻率朝着扇形结构的中间部分增加。互连导体的宽度可以朝着扇形构型的中间部分减小以产生所需的电阻率。根据其他实施例，多个互连导体的互连导体具有选择的长度以提供均匀的电阻。在一个实施例中，互连导体具有蛇形部分以提供期望的长度。

8. 发明授权

US09024857B2 Gate driving apparatus and display device including the same 有权
标题翻译：门驱动装置及包括其的显示装置
公开(公告)号：US09024857B2
公开(公告)日：2015-05-05
申请号：US13074378
申请日：2011-03-29
申请人： Si-Hyun Ahn , Byoung-Sun Na , Kyong-Sik Choi , Hye-Rim Han , Seon-Kyoon Mok , So-Young Kim , Woo-Jung Shin
发明人： Si-Hyun Ahn , Byoung-Sun Na , Kyong-Sik Choi , Hye-Rim Han , Seon-Kyoon Mok , So-Young Kim , Woo-Jung Shin
IPC分类号： G09G3/36 , G02F1/1343 , G02F1/1345 , G06F3/038 , G11C19/28
CPC分类号： G09G3/3677 , G09G2300/0426 , G09G2310/0286 , G09G2330/04 , G11C19/28
摘要： Provided are a gate driving apparatus and a display device including the same. The gate driving apparatus includes a plurality of stages arranged sequentially, each stage is adapted to output a gate signal and including first output lines and a second output line, wherein the first output lines are electrically connected to a gate line corresponding to each of the stages and are adapted to transmit the gate signal to a plurality of pixels coupled to the gate line, the second output line is adapted to transmit the gate signal to a preceding stage of each of the stages, and the first output lines and the second output line share one contact pad.
摘要翻译：提供了一种门驱动装置和包括该驱动装置的显示装置。栅极驱动装置包括依次布置的多个级，每一级适于输出栅极信号并包括第一输出线和第二输出线，其中第一输出线电连接到与每个级对应的栅极线并且适于将栅极信号传输到耦合到栅极线的多个像素，第二输出线适于将栅极信号传输到每个级的前级，并且第一输出线和第二输出线共享一个接触垫。

9. 发明授权

US08901564B2 Array substrate and method of manufacturing the same 有权
标题翻译：阵列基板及其制造方法
公开(公告)号：US08901564B2
公开(公告)日：2014-12-02
申请号：US13553090
申请日：2012-07-19
申请人： Jang-Il Kim , Jae-Jin Song , Sung-Hee Hong , Hyuk-Jin Kim , Kee-Bum Park , Byoung-Sun Na
发明人： Jang-Il Kim , Jae-Jin Song , Sung-Hee Hong , Hyuk-Jin Kim , Kee-Bum Park , Byoung-Sun Na
IPC分类号： H01L29/10 , G02F1/1345 , G09G3/36
CPC分类号： G02F1/13458 , G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2310/0286
摘要： An array substrate includes a base substrate and a contact part. The contact part is disposed on the base substrate. The contact part includes a first metal pattern, a disconnection control pattern and a connecting pattern. The second metal pattern is disposed on a layer different from the first metal pattern, the disconnection control pattern overlaps a side surface of the second metal pattern and a connecting pattern is formed on the first and second metal patterns and the disconnection control pattern and connects the first metal pattern with the second metal pattern.
摘要翻译：阵列基板包括基底基板和接触部件。接触部分设置在基底基板上。接触部分包括第一金属图案，断开控制图案和连接图案。第二金属图案设置在与第一金属图案不同的层上，断开控制图案与第二金属图案的侧表面重叠，并且在第一和第二金属图案和断开控制图案上形成连接图案，并将第一金属图案与第二金属图案。

10. 发明授权

US08456409B2 Gate drive circuit and display apparatus having the same 有权
标题翻译：栅极驱动电路和具有该栅极驱动电路的显示装置
公开(公告)号：US08456409B2
公开(公告)日：2013-06-04
申请号：US12533821
申请日：2009-07-31
申请人： Gwang-Bum Ko , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Ju-Hee Lee , Ji-Hyun Kwon
发明人： Gwang-Bum Ko , Won-Hee Lee , Ho-Kyoon Kwon , Byoung-Sun Na , Ju-Hee Lee , Ji-Hyun Kwon
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G09G2300/0426 , G09G2310/0224 , G09G2310/0286 , G09G2310/08 , G09G2320/0223 , G09G2320/0247 , G09G2330/06
摘要： Gate drive circuit includes a plurality of stages connected one after another to each other. An m-th stage includes a pull-up section outputting a first clock signal as a gate signal of the m-th stage to an output terminal, a pull-down section applying a low voltage to the output terminal, a carry section outputting the first clock signal as a carry signal of the m-th stage in response to the high voltage of the first node signal, a first carry holding section maintaining the carry signal of the m-th stage at the low voltage in response to the high voltage of the first clock signal and a second carry holding section maintaining the carry signal of the m-th stage at the low voltage in response to a high voltage of the second clock signal.
摘要翻译：栅极驱动电路包括彼此相继连接的多个级。第m级包括将作为第m级的门信号的第一时钟信号输出到输出端的上拉部分，向输出端子施加低电压的下拉部分，输出第一时钟信号作为响应于第一节点信号的高电压的第m级的进位信号，第一进位保持部分响应于高电压而将第m级的进位信号保持在低电压以及第二进位保持部，其响应于所述第二时钟信号的高电压而将所述第m级的进位信号保持在所述低电压。

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