专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08773922B2 Non-volatile memory device, memory card and system, and method determining read voltage by comparing referenced program data with comparative read data 失效
标题翻译：非易失性存储器件，存储卡和系统，以及通过将参考程序数据与比较读取数据进行比较来确定读取电压的方法
公开(公告)号：US08773922B2
公开(公告)日：2014-07-08
申请号：US12614545
申请日：2009-11-09
申请人： Seung-Hwan Song , Jaehong Kim , Kyoung Lae Cho , Yong June Kim , Jun Jin Kong , Jong Han Kim
发明人： Seung-Hwan Song , Jaehong Kim , Kyoung Lae Cho , Yong June Kim , Jun Jin Kong , Jong Han Kim
IPC分类号： G11C7/06
CPC分类号： G11C16/26 , G11C11/5642 , G11C29/00 , G11C2211/5634
摘要： A non-volatile semiconductor memory device and related method of determining a read voltage are disclosed. The non-volatile semiconductor memory device includes; a memory cell array including a plurality of memory cells, a read voltage determination unit configured to determine an optimal read voltage by comparing reference data obtained during a program operation with comparative data obtained during a subsequent read operation and changing a current read voltage to a new read voltage based on a result of the comparison, and a read voltage generation unit configured to generate the new read voltage in response to a read voltage control signal provided by the read voltage determination unit.
摘要翻译：公开了一种非易失性半导体存储器件及确定读取电压的相关方法。非易失性半导体存储器件包括：包括多个存储单元的存储单元阵列，读电压确定单元，被配置为通过将在编程操作期间获得的参考数据与在随后的读取操作期间获得的比较数据进行比较来确定最佳读取电压，并将当前读取电压改变为新的基于比较结果的读取电压和读取电压生成单元，被配置为响应于由读取电压确定单元提供的读取电压控制信号而产生新的读取电压。

2. 发明授权

US08274840B2 Nonvolatile memory devices having built-in memory cell recovery during block erase and methods of operating same 有权
标题翻译：在块擦除期间具有内置存储器单元恢复的非易失性存储器件及其操作方法
公开(公告)号：US08274840B2
公开(公告)日：2012-09-25
申请号：US12498508
申请日：2009-07-07
申请人： Yong-June Kim , Jae-Hong Kim , Kyoung-Lae Cho , Seung-Hwan Song , Jun-Jin Kong
发明人： Yong-June Kim , Jae-Hong Kim , Kyoung-Lae Cho , Seung-Hwan Song , Jun-Jin Kong
IPC分类号： G11C11/34
CPC分类号： G11C16/16
摘要： Nonvolatile memory devices include support memory cell recovery during operations to erase blocks of nonvolatile (e.g., flash) memory cells. A nonvolatile memory system includes a flash memory device and a memory controller electrically coupled to the flash memory device. The memory controller is configured to control memory cell recovery operations within the flash memory device by issuing a first instruction(s) to the flash memory device that causes erased memory cells in the block of memory to become at least partially programmed memory cells and then issuing a second instruction(s) to the flash memory device that causes the at least partially programmed memory cells become fully erased.
摘要翻译：非易失性存储器件包括在擦除非易失性（例如闪存）存储器单元块的操作期间的支持存储器单元恢复。非易失性存储器系统包括闪存器件和电耦合到闪速存储器件的存储器控制器。存储器控制器被配置为通过向闪存器件发出第一指令来控制闪存器件内的存储器单元恢复操作，该第一指令使存储器块中的擦除存储器单元变成至少部分被编程的存储器单元，然后发出使闪存器件的至少部分编程的存储器单元完全被擦除的第二指令。

3. 发明申请

US20100091578A1 Nonvolatile Memory Devices Having Built-in Memory Cell Recovery During Block Erase and Methods of Operating Same 有权
标题翻译：在块擦除期间具有内置存储器单元恢复的非易失性存储器件和操作方法相同
公开(公告)号：US20100091578A1
公开(公告)日：2010-04-15
申请号：US12498508
申请日：2009-07-07
申请人： Yong-June Kim , Jae-Hong Kim , Kyoung-Lae Cho , Seung-Hwan Song , Jun-Jin Kong
发明人： Yong-June Kim , Jae-Hong Kim , Kyoung-Lae Cho , Seung-Hwan Song , Jun-Jin Kong
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/16
摘要： Nonvolatile memory devices include support memory cell recovery during operations to erase blocks of nonvolatile (e.g., flash) memory cells. A nonvolatile memory system includes a flash memory device and a memory controller electrically coupled to the flash memory device. The memory controller is configured to control memory cell recovery operations within the flash memory device by issuing a first instruction(s) to the flash memory device that causes erased memory cells in the block of memory to become at least partially programmed memory cells and then issuing a second instruction(s) to the flash memory device that causes the at least partially programmed memory cells become fully erased.
摘要翻译：非易失性存储器件包括在擦除非易失性（例如闪存）存储器单元块的操作期间的支持存储器单元恢复。非易失性存储器系统包括闪存器件和电耦合到闪速存储器件的存储器控制器。存储器控制器被配置为通过向闪存器件发出第一指令来控制闪存器件内的存储器单元恢复操作，该第一指令使存储器块中的擦除存储器单元变成至少部分被编程的存储器单元，然后发出使闪存器件的至少部分编程的存储器单元完全被擦除的第二指令。

4. 发明授权

US07864574B2 Memory device and memory programming method 有权
标题翻译：存储器和存储器编程方法
公开(公告)号：US07864574B2
公开(公告)日：2011-01-04
申请号：US12453108
申请日：2009-04-29
申请人： Kyoung Lae Cho , Yong June Kim , Seung-Hwan Song , Jun Jin Kong
发明人： Kyoung Lae Cho , Yong June Kim , Seung-Hwan Song , Jun Jin Kong
IPC分类号： G11C11/34
CPC分类号： G11C16/10 , G11C11/5628 , G11C2211/5621
摘要： Provided are memory devices and memory programming methods. A memory device may include a multi-bit cell array including a plurality of multi-bit cells, a programming unit configured to program a first data page in the plurality of multi-bit cells and to program a second data page in the multi-bit cells with the programmed first data page, a first controller configured to divide the multi-bit cells with the programmed first data page into a first group and a second group, and a second controller configured to set a target threshold voltage interval of each of the multi-bit cells included in the first group based on first read voltage levels and the second data page, and to set a target threshold voltage interval of each of the multi-bit cells included in the second group based on second read threshold voltage levels and the second data page.
摘要翻译：提供的是存储器件和存储器编程方法。存储器件可以包括包括多个多位单元的多位单元阵列，编程单元，被配置为对多个多位单元中的第一数据页进行编程，并编程多位单元中的第二数据页具有编程的第一数据页的单元，被配置为将多位单元与编程的第一数据页划分为第一组和第二组的第一控制器，以及配置成将每个的第一数据页的目标阈值电压间隔基于第一读取电压电平和第二数据页面包括在第一组中的多位单元，并且基于第二读取阈值电压电平来设置包括在第二组中的每个多位单元的目标阈值电压间隔，以及第二个数据页面。

5. 发明申请

US20090285023A1 Memory device and memory programming method 有权
标题翻译：存储器和存储器编程方法
公开(公告)号：US20090285023A1
公开(公告)日：2009-11-19
申请号：US12453108
申请日：2009-04-29
申请人： Kyoung Lae Cho , Yong June Kim , Seung-Hwan Song , Jun Jin Kong
发明人： Kyoung Lae Cho , Yong June Kim , Seung-Hwan Song , Jun Jin Kong
IPC分类号： G11C16/02 , G11C7/00 , G11C16/06
CPC分类号： G11C16/10 , G11C11/5628 , G11C2211/5621
摘要： Provided are memory devices and memory programming methods. A memory device may include a multi-bit cell array including a plurality of multi-bit cells, a programming unit configured to program a first data page in the plurality of multi-bit cells and to program a second data page in the multi-bit cells with the programmed first data page, a first controller configured to divide the multi-bit cells with the programmed first data page into a first group and a second group, and a second controller configured to set a target threshold voltage interval of each of the multi-bit cells included in the first group based on first read voltage levels and the second data page, and to set a target threshold voltage interval of each of the multi-bit cells included in the second group based on second read threshold voltage levels and the second data page.
摘要翻译：提供的是存储器件和存储器编程方法。存储器件可以包括包括多个多位单元的多位单元阵列，编程单元，被配置为对多个多位单元中的第一数据页进行编程，并编程多位单元中的第二数据页具有编程的第一数据页的单元，被配置为将多位单元与编程的第一数据页划分为第一组和第二组的第一控制器，以及配置成将每个的第一数据页的目标阈值电压间隔基于第一读取电压电平和第二数据页面包括在第一组中的多位单元，并且基于第二读取阈值电压电平来设置包括在第二组中的每个多位单元的目标阈值电压间隔，以及第二个数据页面。

6. 发明申请

US20090190396A1 Memory device and method of reading memory data 有权
标题翻译：存储器件和读取存储器数据的方法
公开(公告)号：US20090190396A1
公开(公告)日：2009-07-30
申请号：US12219264
申请日：2008-07-18
申请人： Kyoung Lae Cho , Dong Hun Yu , Jun Jin Kong , Seung-Hwan Song , Yoon Dong Park , Jong Han Kim , Young Hwan Lee
发明人： Kyoung Lae Cho , Dong Hun Yu , Jun Jin Kong , Seung-Hwan Song , Yoon Dong Park , Jong Han Kim , Young Hwan Lee
IPC分类号： G11C16/06 , G11C7/00
CPC分类号： G11C16/34 , G11C11/5642 , G11C2211/5634
摘要： A memory device and a method of reading multi-bit data stored in a multi-bit cell array may be provided. The memory device may include a multi-bit cell array including a least one memory page with each memory page having a plurality of multi-bit cells, and a determination unit to divide the plurality of multi-bit cells into a first group and second group. The first group may include multi-bit cells with a threshold voltage higher than a reference voltage. The second group may include multi-bit cells with a threshold voltage lower than the reference voltage. The determination unit may sequentially update the first group and second group while changing the reference voltage.
摘要翻译：可以提供存储器件和读取存储在多位单元阵列中的多位数据的方法。存储器件可以包括多比特单元阵列，其包括至少一个存储器页，每个存储器页具有多个多位单元，以及确定单元，用于将多个多位单元划分成第一组和第二组。第一组可以包括具有高于参考电压的阈值电压的多位单元。第二组可以包括阈值电压低于参考电压的多位单元。确定单元可以在改变参考电压的同时顺序地更新第一组和第二组。

7. 发明授权

US07738293B2 Apparatus and method of memory programming 有权
标题翻译：存储器编程的装置和方法
公开(公告)号：US07738293B2
公开(公告)日：2010-06-15
申请号：US12213944
申请日：2008-06-26
申请人： Kyoung Lae Cho , Yoon Dong Park , Jun Jin Kong , Jong Han Kim , Jae Hong Kim , Young Hwan Lee , Heeseok Eun , Seung-Hwan Song
发明人： Kyoung Lae Cho , Yoon Dong Park , Jun Jin Kong , Jong Han Kim , Jae Hong Kim , Young Hwan Lee , Heeseok Eun , Seung-Hwan Song
IPC分类号： G11C16/04 , G11C29/04
CPC分类号： G11C11/5628 , G11C29/00 , G11C2216/14
摘要： A memory programming apparatuses and/or methods are provided. The memory programming apparatus may include a data storage unit, a first counting unit, an index storage unit and/or a programming unit. The data storage unit may be configured to store a data page. The first counting unit may be configured to generate index information by counting a number of cells included in at least one reference threshold voltage state based on the data page. The index storage unit may be configured to store the generated index information. The programming unit may be configured to store the data page in the data storage unit and store the generated index information in the index storage unit. The first counting unit may send the generated index information to the programming unit. The memory programming apparatus can monitor distribution states of threshold voltages in memory cells.
摘要翻译：提供了存储器编程设备和/或方法。存储器编程装置可以包括数据存储单元，第一计数单元，索引存储单元和/或编程单元。数据存储单元可以被配置为存储数据页。第一计数单元可以被配置为通过基于数据页计数包括在至少一个参考阈值电压状态中的单元的数量来生成索引信息。索引存储单元可以被配置为存储所生成的索引信息。编程单元可以被配置为将数据页存储在数据存储单元中，并将生成的索引信息存储在索引存储单元中。第一计数单元可以将生成的索引信息发送到编程单元。存储器编程装置可以监视存储器单元中阈值电压的分布状态。

8. 发明申请

US20090185417A1 Apparatus and method of memory programming 有权
标题翻译：存储器编程的装置和方法
公开(公告)号：US20090185417A1
公开(公告)日：2009-07-23
申请号：US12213944
申请日：2008-06-26
申请人： Kyoung Lae Cho , Yoon Dong Park , Jun Jin Kong , Jong Han Kim , Jae Hong Kim , Young Hwan Lee , Heeseok Eun , Seung-Hwan Song
发明人： Kyoung Lae Cho , Yoon Dong Park , Jun Jin Kong , Jong Han Kim , Jae Hong Kim , Young Hwan Lee , Heeseok Eun , Seung-Hwan Song
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C29/00 , G11C2216/14
摘要： A memory programming apparatuses and/or methods are provided. The memory programming apparatus may include a data storage unit, a first counting unit, an index storage unit and/or a programming unit. The data storage unit may be configured to store a data page. The first counting unit may be configured to generate index information by counting a number of cells included in at least one reference threshold voltage state based on the data page. The index storage unit may be configured to store the generated index information. The programming unit may be configured to store the data page in the data storage unit and store the generated index information in the index storage unit. The first counting unit may send the generated index information to the programming unit. The memory programming apparatus can monitor distribution states of threshold voltages in memory cells.
摘要翻译：提供了存储器编程设备和/或方法。存储器编程装置可以包括数据存储单元，第一计数单元，索引存储单元和/或编程单元。数据存储单元可以被配置为存储数据页。第一计数单元可以被配置为通过基于数据页计数包括在至少一个参考阈值电压状态中的单元的数量来生成索引信息。索引存储单元可以被配置为存储所生成的索引信息。编程单元可以被配置为将数据页存储在数据存储单元中，并将生成的索引信息存储在索引存储单元中。第一计数单元可以将生成的索引信息发送到编程单元。存储器编程装置可以监视存储器单元中阈值电压的分布状态。

9. 发明申请

US20090027238A1 Apparatuses and methods for encoding and decoding 有权
标题翻译：用于编码和解码的装置和方法
公开(公告)号：US20090027238A1
公开(公告)日：2009-01-29
申请号：US12010025
申请日：2008-01-18
申请人： Jun Jin Kong , Sung Chung Park , Seung-Hwan Song , Jong Han Kim , Young Hwan Lee , Kyoung Lae Cho , Nam Phil Jo , Sung-Jae Byun
发明人： Jun Jin Kong , Sung Chung Park , Seung-Hwan Song , Jong Han Kim , Young Hwan Lee , Kyoung Lae Cho , Nam Phil Jo , Sung-Jae Byun
IPC分类号： H03M7/00
CPC分类号： H03M13/235 , H03M13/6561
摘要： A code encoding apparatus includes a delay circuit and a code generator. The delay circuit generates delayed information based on p-bit input information received in parallel. The delayed information is generated according to a clock. The code generator generates n·p-bit code based on at least one of the input information and the delayed information, where n is a rational number.
摘要翻译：码编码装置包括延迟电路和码发生器。延迟电路基于并行接收的p位输入信息产生延迟信息。延迟信息根据时钟生成。代码生成器基于输入信息和延迟信息中的至少一个生成n.p位代码，其中n是有理数。

10. 发明授权

US08279668B2 Apparatus and method of memory programming 有权
标题翻译：存储器编程的装置和方法
公开(公告)号：US08279668B2
公开(公告)日：2012-10-02
申请号：US12801532
申请日：2010-06-14
申请人： Kyoung Lae Cho , Yoon Dong Park , Jun Jin Kong , Jong Han Kim , Jae Hong Kim , Young Hwan Lee , Heeseok Eun , Seung-Hwan Song
发明人： Kyoung Lae Cho , Yoon Dong Park , Jun Jin Kong , Jong Han Kim , Jae Hong Kim , Young Hwan Lee , Heeseok Eun , Seung-Hwan Song
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C29/00 , G11C2216/14
摘要： A memory programming apparatuses and/or methods are provided. The memory programming apparatus may include a data storage unit, a first counting unit, an index storage unit and/or a programming unit. The data storage unit may be configured to store a data page. The first counting unit may be configured to generate index information by counting a number of cells included in at least one reference threshold voltage state based on the data page. The index storage unit may be configured to store, the generated index information. The programming unit may be configured to store the data page in the data storage unit and store the generated index information in the index storage unit. The first counting unit may send the generated index information to the programming unit. The memory programming apparatus can monitor distribution states of threshold voltages in memory cells.
摘要翻译：提供了存储器编程设备和/或方法。存储器编程装置可以包括数据存储单元，第一计数单元，索引存储单元和/或编程单元。数据存储单元可以被配置为存储数据页。第一计数单元可以被配置为通过基于数据页计数包括在至少一个参考阈值电压状态中的单元的数量来生成索引信息。索引存储单元可以被配置为存储所生成的索引信息。编程单元可以被配置为将数据页存储在数据存储单元中，并将生成的索引信息存储在索引存储单元中。第一计数单元可以将生成的索引信息发送到编程单元。存储器编程装置可以监视存储器单元中阈值电压的分布状态。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式