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1. 发明申请

US20100170708A1 METHOD OF MANUFACTURING CAPACITOR-EMBEDDED LOW TEMPERATURE CO-FIRED CERAMIC SUBSTRATE 审中-公开
标题翻译：制造电容器嵌入式低温合成陶瓷基板的方法
公开(公告)号：US20100170708A1
公开(公告)日：2010-07-08
申请号：US12724239
申请日：2010-03-15
申请人： Seung Gyo Jeong , Yong Seok Choi , Ki Pyo Hong
发明人： Seung Gyo Jeong , Yong Seok Choi , Ki Pyo Hong
IPC分类号： H05K1/18
CPC分类号： H01G4/30 , H01G4/232 , H01L2224/48091 , H01L2924/01019 , H01L2924/09701 , H01L2924/30107 , H05K1/0231 , H05K1/0306 , H05K1/162 , H05K1/186 , H05K3/4611 , H05K3/4629 , H05K3/4688 , H05K2201/09672 , H05K2201/10636 , Y02P70/611 , Y10T29/43 , Y10T29/435 , Y10T29/49117 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , H01L2924/00014 , H01L2924/00
摘要： A method of manufacturing a capacitor-embedded low temperature co-fired ceramic substrate. A capacitor part is manufactured by firing a deposition including at least one high dielectric ceramic sheet to form a capacitor part. A plurality of low temperature co-fired green sheets are provided. Each of the low temperature co-fired green sheet has at least one of a conductive pattern and a conductive via hole thereon. A low temperature co-fired ceramic deposition is formed by depositing the low temperature co-fired green sheets to embed the capacitor part in the low temperature co-fired ceramic deposition. The embedded capacitor part is connected either to the conductive pattern or the conductive via hole of an adjacent green sheet. Then the low temperature co-fired ceramic deposition having the capacitor part embedded therein is fired.
摘要翻译：一种制造电容器嵌入式低温共烧陶瓷基板的方法。通过烧结包括至少一个高介电陶瓷片的沉积来形成电容器部分来制造电容器部分。提供多个低温共烧生片。每个低温共烧生片具有导电图案和导电通孔中的至少一个。通过沉积低温共烧生片将电容器部分嵌入低温共烧陶瓷沉积中形成低温共烧陶瓷沉积。嵌入式电容器部分连接到相邻生片的导电图案或导电通孔。然后烧结具有嵌入其中的电容器部分的低温共烧陶瓷沉积。

2. 发明申请

US20080000061A1 Method of manufacturing capacitor-embedded low temperature co-fired ceramic substrate 失效
标题翻译：制造电容器嵌入式低温共烧陶瓷基板的方法
公开(公告)号：US20080000061A1
公开(公告)日：2008-01-03
申请号：US11819897
申请日：2007-06-29
申请人： Seung Gyo Jeong , Yong Seok Choi , Ki Pyo Hong
发明人： Seung Gyo Jeong , Yong Seok Choi , Ki Pyo Hong
IPC分类号： H01G9/00
CPC分类号： H01G4/30 , H01G4/232 , H01L2224/48091 , H01L2924/01019 , H01L2924/09701 , H01L2924/30107 , H05K1/0231 , H05K1/0306 , H05K1/162 , H05K1/186 , H05K3/4611 , H05K3/4629 , H05K3/4688 , H05K2201/09672 , H05K2201/10636 , Y02P70/611 , Y10T29/417 , Y10T29/43 , Y10T29/435 , Y10T29/49117 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , H01L2924/00014 , H01L2924/00
摘要： A method of manufacturing a capacitor-embedded low temperature co-fired ceramic substrate, the method including: manufacturing a capacitor part by firing a deposition including at least one high dielectric ceramic sheet to form a capacitor part; providing a plurality of low temperature co-fired green sheets each having at least one of a conductive pattern and a conductive via hole thereon; forming a low temperature co-fired ceramic deposition by depositing the low temperature co-fired green sheets to embed the capacitor part in the low temperature co-fired ceramic deposition, the embedded capacitor part connected to the one of conductive pattern and conductive via hole of an adjacent one of the green sheets; and firing the low temperature co-fired ceramic deposition having the capacitor part embedded therein. The capacitor-embedded low temperature co-fired ceramic substrate may be beneficially employed in various types of capacitor part such as a deposited chip capacitor and a capacitor layer structure.
摘要翻译：一种制造电容器嵌入式低温共烧陶瓷基板的方法，所述方法包括：通过烧结包括至少一个高介电陶瓷片的沉积物来形成电容器部分，以形成电容器部分; 提供多个低温共烧生坯片，每个低温共烧生坯在其上具有导电图案和导电通孔中的至少一个; 通过沉积低温共烧生片将电容器部分嵌入低温共烧陶瓷沉积中形成低温共烧陶瓷沉积，将嵌入式电容器部分连接到导电图案和导电通孔中的一个相邻的一个生片; 并烧制具有嵌入其中的电容器部分的低温共烧陶瓷沉积。电容器嵌入式低温共烧陶瓷基板可以有利地用于各种类型的电容器部分，例如沉积的芯片电容器和电容器层结构。

3. 发明授权

US07703198B2 Method of manufacturing capacitor-embedded low temperature co-fired ceramic substrate 失效
标题翻译：制造电容器嵌入式低温共烧陶瓷基板的方法
公开(公告)号：US07703198B2
公开(公告)日：2010-04-27
申请号：US11819897
申请日：2007-06-29
申请人： Seung Gyo Jeong , Yong Seok Choi , Ki Pyo Hong
发明人： Seung Gyo Jeong , Yong Seok Choi , Ki Pyo Hong
IPC分类号： H05K3/30 , H01G4/06
CPC分类号： H01G4/30 , H01G4/232 , H01L2224/48091 , H01L2924/01019 , H01L2924/09701 , H01L2924/30107 , H05K1/0231 , H05K1/0306 , H05K1/162 , H05K1/186 , H05K3/4611 , H05K3/4629 , H05K3/4688 , H05K2201/09672 , H05K2201/10636 , Y02P70/611 , Y10T29/417 , Y10T29/43 , Y10T29/435 , Y10T29/49117 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , H01L2924/00014 , H01L2924/00
摘要： A method of manufacturing a capacitor-embedded low temperature co-fired ceramic substrate. A capacitor part is manufactured by firing a deposition including at least one high dielectric ceramic sheet to form a capacitor part. A plurality of low temperature co-fired green sheets are provided. Each of the low temperature co-fired green sheet has at least one of a conductive pattern and a conductive via hole thereon. A low temperature co-fired ceramic deposition is formed by depositing the low temperature co-fired green sheets to embed the capacitor part in the low temperature co-fired ceramic deposition. The embedded capacitor part is connected either to the conductive pattern or the conductive via hole of an adjacent green sheet. Then the low temperature co-fired ceramic deposition having the capacitor part embedded therein is fired.
摘要翻译：一种制造电容器嵌入式低温共烧陶瓷基板的方法。通过烧结包括至少一个高介电陶瓷片的沉积来形成电容器部分来制造电容器部分。提供多个低温共烧生片。每个低温共烧生片具有导电图案和导电通孔中的至少一个。通过沉积低温共烧生片将电容器部分嵌入低温共烧陶瓷沉积中来形成低温共烧陶瓷沉积。嵌入式电容器部分连接到相邻生片的导电图案或导电通孔。然后烧结具有嵌入其中的电容器部分的低温共烧陶瓷沉积。

4. 发明授权

US07871482B2 Method of manufacturing multilayer ceramic substrate 失效
标题翻译：多层陶瓷基板的制造方法
公开(公告)号：US07871482B2
公开(公告)日：2011-01-18
申请号：US12476538
申请日：2009-06-02
申请人： Yong Seok Choi , Seung Gyo Jeong , Eun Tae Park , Ki Pyo Hong , Soo Hyun Lyoo
发明人： Yong Seok Choi , Seung Gyo Jeong , Eun Tae Park , Ki Pyo Hong , Soo Hyun Lyoo
IPC分类号： C03B29/00 , B23B33/00 , A63B39/00 , B29C65/00 , B65C9/25
CPC分类号： B32B18/00 , C04B35/634 , C04B37/005 , C04B2235/36 , C04B2237/10 , C04B2237/341 , C04B2237/562 , C04B2237/565 , C04B2237/595 , C04B2237/62 , C04B2237/68 , C04B2237/704 , C04B2237/708 , C04B2237/72 , H01G4/105 , H01G4/232 , H01G4/30 , H05K3/4629 , H05K2201/0195 , H05K2203/061 , Y10T156/1089
摘要： Disclosed is a method of manufacturing a multilayer ceramic substrate. The method includes providing a plurality of ceramic blocks, each including a ceramic laminate having a first surface and a second surface and having a laminated structure of a plurality of ceramic green sheets containing a glass ceramic component, and a first bonding ceramic green sheet including a glass component and disposed on a surface of the first and second surfaces of the ceramic laminate, which is to contact another ceramic laminate, firing the plurality of ceramic blocks, laminating the plurality of fired ceramic blocks such that the first bonding ceramic green sheets of the adjacent ceramic blocks face each other, and bonding the plurality of ceramic blocks using the glass component of the first bonding ceramic green sheets.
摘要翻译：公开了一种制造多层陶瓷基板的方法。该方法包括提供多个陶瓷块，每个陶瓷块包括具有第一表面和第二表面的陶瓷层压体，并且具有包含玻璃陶瓷部件的多个陶瓷生片的层叠结构，以及第一粘合陶瓷生片，玻璃组分，并且设置在陶瓷层压体的第一和第二表面的与另一陶瓷层压体接触的表面上，烧制多个陶瓷块，层叠多个烧制的陶瓷块，使得第一粘合陶瓷生片相邻的陶瓷块彼此面对，并且使用第一接合陶瓷生片的玻璃成分接合多个陶瓷块。

5. 发明申请

US20130162278A1 PROBE PIN, PROBE CARD USING THE PROBE PIN, AND METHOD OF MANUFACTURING THE PROBE CARD 审中-公开
标题翻译：探针，使用探针的探针卡和制造探针卡的方法
公开(公告)号：US20130162278A1
公开(公告)日：2013-06-27
申请号：US13532475
申请日：2012-06-25
申请人： Doo Yun CHUNG , Dae Hyeong Lee , Ki Pyo Hong , Won Chul Ma , Yong Seok Choi
发明人： Doo Yun CHUNG , Dae Hyeong Lee , Ki Pyo Hong , Won Chul Ma , Yong Seok Choi
IPC分类号： G01R1/067 , B23K31/02 , B23K1/20 , G01R1/073
CPC分类号： G01R3/00 , B23K1/0008 , B23K3/0638 , B23K26/382 , B23K26/40 , B23K35/0222 , B23K35/262 , B23K35/3006 , B23K2101/42 , B23K2103/16 , B23K2103/50 , G01R1/06727 , G01R1/07357
摘要： There is provided a probe card, including: a substrate having a plurality of grooves formed in one surface thereof; and at least one probe pin having a plurality of substrate combining protrusions formed on one surface thereof and corresponding to the plurality of grooves, the plurality of substrate combining protrusions having heights corresponding to the plurality of grooves.
摘要翻译：提供了一种探针卡，包括：具有形成在其一个表面中的多个凹槽的基底; 以及至少一个探针，其具有在其一个表面上形成并对应于所述多个凹槽的多个基板组合突起，所述多个基板组合突起具有与所述多个凹槽对应的高度。

6. 发明授权

US08569838B2 Control of local environment for polysilicon conductors in integrated circuits 有权
标题翻译：集成电路中多晶硅导体的局部环境控制
公开(公告)号：US08569838B2
公开(公告)日：2013-10-29
申请号：US13049862
申请日：2011-03-16
申请人： James Walter Blatchford, Jr. , Yong Seok Choi
发明人： James Walter Blatchford, Jr. , Yong Seok Choi
IPC分类号： H01L21/70
CPC分类号： H01L29/66484 , H01L21/28123 , H01L21/823828 , H01L27/0207 , H01L29/78
摘要： A method of fabricating gate level electrodes and interconnects in an integrated circuit, and an integrated circuit so fabricated, with improved process margin for the gate level interconnects of a width near the critical dimension. Off-axis illumination, as used in the photolithography of deep sub-micron critical dimension, is facilitated by the patterned features having a preferred orientation in a common direction, with a pitch constrained to within a relatively narrow range. Interconnects in that same gate level, for example “field poly” interconnects, that run parallel to an array of gate elements are placed within a specified distance range from the ends of the gate elements, or at a distance sufficient to allow sub-resolution assist features.
摘要翻译：一种在集成电路中制造栅极电极和互连的方法，以及如此制造的集成电路，其具有改进的临界尺寸附近的栅极级互连的工艺裕度。在深亚微米临界尺寸的光刻中使用的离轴照明通过具有在相同方向上具有优选取向的图案化特征促进，其间距限制在相对较窄的范围内。在与栅极元件阵列平行的同一栅极级别（例如，“多晶”互连）的互连被放置在从栅极元件的端部指定的距离范围内，或者距离足以允许次级分辨率辅助特征。

7. 发明授权

US08147633B2 Ceramic laminate and method of manufacturing ceramic sintered body 有权
标题翻译：陶瓷层压板及陶瓷烧结体的制造方法
公开(公告)号：US08147633B2
公开(公告)日：2012-04-03
申请号：US13175813
申请日：2011-07-01
申请人： Soo Hyun Lyoo , Yong Seok Choi
发明人： Soo Hyun Lyoo , Yong Seok Choi
IPC分类号： C03C29/00 , C03C1/00
CPC分类号： B32B18/00 , C04B2235/36 , C04B2235/5436 , C04B2235/5445 , C04B2235/656 , C04B2237/343 , C04B2237/56 , C04B2237/588 , C04B2237/62 , C04B2237/68 , C04B2237/702 , C04B2237/704 , H01G4/129 , H01G4/30 , H05K3/4629 , H05K3/4688 , H05K2201/0209 , H05K2201/0266 , Y10T428/24926 , Y10T428/2495 , Y10T428/252
摘要： There are provided a method of manufacturing a ceramic sintered body. A method of manufacturing a ceramic sintered body according to one aspect of the invention may include: preparing at least one ceramic sheet having first ceramic particles and glass particles; preparing at least one constraining sheet having second ceramic particles having a smaller particle size than the glass particles and the first ceramic particles; forming a ceramic laminate by alternating the ceramic sheet and the constraining sheet while the ceramic sheet and the constraining sheet are in contact with each other; and sintering the ceramic laminate so that components, which do not react with the first ceramic particles, from the glass particle are moved into the constraining sheet to sinter the constraining sheet when the ceramic sheet is sintered.
摘要翻译：提供了制造陶瓷烧结体的方法。根据本发明的一个方面的陶瓷烧结体的制造方法可以包括：制备至少一个具有第一陶瓷颗粒和玻璃颗粒的陶瓷片; 制备具有比玻璃颗粒和第一陶瓷颗粒小的粒径的第二陶瓷颗粒的至少一个约束片; 通过在陶瓷片和约束片彼此接触的同时交替陶瓷片和约束片形成陶瓷层压体; 并且烧结陶瓷层压体，使得当陶瓷片烧结时，不与第一陶瓷颗粒反应的组分从玻璃颗粒移动到约束片中以烧结约束片。

8. 发明申请

US20110277912A1 CERAMIC LAMINATE AND METHOD OF MANUFACTURING CERAMIC SINTERED BODY 有权
标题翻译：陶瓷层压板及其制造方法陶瓷烧结体
公开(公告)号：US20110277912A1
公开(公告)日：2011-11-17
申请号：US13175813
申请日：2011-07-01
申请人： Soo Hyun Lyoo , Yong Seok Choi
发明人： Soo Hyun Lyoo , Yong Seok Choi
IPC分类号： C04B37/00
CPC分类号： B32B18/00 , C04B2235/36 , C04B2235/5436 , C04B2235/5445 , C04B2235/656 , C04B2237/343 , C04B2237/56 , C04B2237/588 , C04B2237/62 , C04B2237/68 , C04B2237/702 , C04B2237/704 , H01G4/129 , H01G4/30 , H05K3/4629 , H05K3/4688 , H05K2201/0209 , H05K2201/0266 , Y10T428/24926 , Y10T428/2495 , Y10T428/252
摘要： There are provided a method of manufacturing a ceramic sintered body. A method of manufacturing a ceramic sintered body according to one aspect of the invention may include: preparing at least one ceramic sheet having first ceramic particles and glass particles; preparing at least one constraining sheet having second ceramic particles having a smaller particle size than the glass particles and the first ceramic particles; forming a ceramic laminate by alternating the ceramic sheet and the constraining sheet while the ceramic sheet and the constraining sheet are in contact with each other; and sintering the ceramic laminate so that components, which do not react with the first ceramic particles, from the glass particle are moved into the constraining sheet to sinter the constraining sheet when the ceramic sheet is sintered.
摘要翻译：提供了制造陶瓷烧结体的方法。根据本发明的一个方面的陶瓷烧结体的制造方法可以包括：制备至少一个具有第一陶瓷颗粒和玻璃颗粒的陶瓷片; 制备具有比玻璃颗粒和第一陶瓷颗粒小的粒径的第二陶瓷颗粒的至少一个约束片; 通过在陶瓷片和约束片彼此接触的同时交替陶瓷片和约束片形成陶瓷层压体; 并且烧结陶瓷层压体，使得当陶瓷片烧结时，不与第一陶瓷颗粒反应的组分从玻璃颗粒移动到约束片中以烧结约束片。

9. 发明申请

US20110064952A1 CERAMIC SUBSTRATE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：陶瓷基板及其制造方法
公开(公告)号：US20110064952A1
公开(公告)日：2011-03-17
申请号：US12650801
申请日：2009-12-31
申请人： Min Ji Ko , Yong Seok Choi
发明人： Min Ji Ko , Yong Seok Choi
IPC分类号： B32B18/00 , B29C65/02 , B28B1/00 , B28B3/00
CPC分类号： B32B18/00 , C04B2235/9615 , C04B2237/32 , C04B2237/66 , Y10T428/31504
摘要： A method of fabricating a ceramic substrate includes: preparing a firing theta; forming a ceramic laminated body comprising at least one internal confinement layer on the ceramic theta; providing a temperature-compensation ceramic layer on at least one of a top surface of the ceramic laminated body and a bottom surface of the ceramic laminated body contacting the firing theta, the temperature-compensation ceramic layer having a different initial firing shrinkage temperature than the ceramic laminated body; and firing the ceramic laminated body.
摘要翻译：制造陶瓷基板的方法包括：制备烧制θ; 形成陶瓷层压体，其包括在陶瓷θ上的至少一个内部限制层; 在陶瓷层叠体的上表面和陶瓷层叠体的与烧成点θ接触的底面中的至少一个上提供温度补偿陶瓷层，所述温度补偿陶瓷层的初始烧制收缩温度与陶瓷不同层压体并烧制陶瓷层压体。

10. 发明授权

US07811942B2 Tri-layer plasma etch resist rework 有权
标题翻译：三层等离子蚀刻抗蚀返修
公开(公告)号：US07811942B2
公开(公告)日：2010-10-12
申请号：US11843361
申请日：2007-08-22
申请人： Jeannette Michelle Jacques , Yong Seok Choi
发明人： Jeannette Michelle Jacques , Yong Seok Choi
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/31144 , H01L21/02079 , H01L21/0271
摘要： Exemplary embodiments provide a tri-layer resist (TLR) stack used in a photolithographic process, and methods for resist reworking by a single plasma etch process. The single plasma etch process can be used to remove one or more portions/layers of the TLR stack that needs to be reworked in a single process. The removed portions/layers can then be re-formed and resulting in a reworked TLR stack for subsequent photo-resist (PR) processing. The disclosed plasma-etch resist rework method can be a fast, simple, and cost effective process used in either single or dual damascene tri-layer patterning processes for the fabrication of, for example, sub 45-nm node semiconductor structures.
摘要翻译：示例性实施例提供了在光刻工艺中使用的三层抗蚀剂（TLR）堆叠，以及通过单个等离子体蚀刻工艺来抵抗再加工的方法。单个等离子体蚀刻工艺可用于去除在单个工艺中需要重新加工的TLR堆叠的一个或多个部分/层。然后可以重新形成去除的部分/层，并导致用于随后的光致抗蚀剂（PR）处理的返工TLR堆叠。所公开的等离子体蚀刻抗蚀剂返修方法可以是用于制造例如子45nm节点半导体结构的单镶嵌或双镶嵌三层图案化工艺中的快速，简单和成本有效的工艺。

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