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    • 1. 发明申请
    • Cycle time synchronization apparatus and method for wireless 1394 system
    • 无线1394系统的周期时间同步装置和方法
    • US20060126671A1
    • 2006-06-15
    • US11260591
    • 2005-10-27
    • Seong ParkSangsung ChoiKwang Park
    • Seong ParkSangsung ChoiKwang Park
    • H04J3/16H04J3/06
    • H04J3/0676H04J3/0638
    • A cycle time synchronization apparatus for a wireless 1394 system having one wireless 1394 intermediary and at least one wireless 1394 slave, the apparatus including: a cycle time generator for generating a cycle time by a predetermined clock signal; a cycle time register synchronized to a beacon inputted, and storing the cycle time from the cycle time generator; a cycle time temporary storage unit for storing the cycle time of the cycle time register and cycle times generated from other devices; a cycle time management unit for managing calculation and control operations of the cycle times of the cycle time register and the cycle time temporary storage unit; and a cycle time controller for controlling the cycle time by the cycle time management unit.
    • 一种具有一个无线1394中间和至少一个无线1394从机的无线1394系统的周期时间同步装置,该装置包括:周期时间发生器,用于通过预定时钟信号产生周期时间; 与输入的信标同步的周期时间寄存器,存储来自周期时间发生器的周期时间; 周期时间临时存储单元,用于存储从其他设备产生的周期时间寄存器和周期时间的周期时间; 周期时间管理单元,用于管理周期时间寄存器和周期时间临时存储单元的周期时间的计算和控制操作; 以及循环时间控制器,用于通过循环时间管理单元控制循环时间。
    • 2. 发明申请
    • Code acquisition device and method using two-step search process in DS-CDMA UWB modem
    • 在DS-CDMA UWB调制解调器中使用两步搜索过程的码采集设备和方法
    • US20060093021A1
    • 2006-05-04
    • US11063583
    • 2005-02-24
    • Bub KangKyu KangSangsung ChoiKwang Park
    • Bub KangKyu KangSangsung ChoiKwang Park
    • H04B1/707
    • H04B1/70735H04B1/7077H04B1/7183
    • There is provided a code acquisition device and method using a two-step search process in a DS-CDMA UWB modem. The device includes: an I/Q channel symbol generating unit for, generating a plurality (i) of nth I/Q channel symbols in a first search process and generating a plurality of nth I/Q channel symbols in a second search process; a spread code selecting unit for receiving the plurality of nth I/Q channel symbols in the first search process; an NNC2NS tap I/Q channel symbol matched filter unit for, in the second search process, receiving the plurality (i) of nth I/Q channel symbols; a switching unit for changing to a closed state of the second search process; and a super frame and symbol boundary time deciding unit for deciding a super frame time and a symbol boundary time.
    • 提供了在DS-CDMA UWB调制解调器中使用两步搜索处理的代码获取装置和方法。 该装置包括:I / Q信道符号生成单元,用于在第一搜索处理中生成第n个第I / Q个信道符号的多个(i),并产生多个第n个 在第二搜索过程中的I / Q通道符号; 扩展码选择单元,用于在第一搜索处理中接收多个第n个I / Q信道符号; 用于在第二搜索过程中,接收多个(i)个第n个/第N个N / N个抽头I / Q通道符号匹配滤波器单元, SUB> I / Q通道符号; 用于切换到第二搜索处理的关闭状态的切换单元; 以及用于决定超帧时间和符号边界时间的超帧和符号边界时间决定单元。
    • 3. 发明申请
    • 2N-point and N-point FFT/IFFT dual mode processor
    • 2N点和N点FFT / IFFT双模式处理器
    • US20060093052A1
    • 2006-05-04
    • US11264886
    • 2005-11-02
    • Sang ChoSangsung ChoiKwang Park
    • Sang ChoSangsung ChoiKwang Park
    • H04K1/10
    • H04L27/265H04L27/263
    • A 2N-point and N-point FFT/IFFT dual mode processor is provided. The processor includes a butterfly operator, the first and second MUXs, and the first and second N-point FFT processors. The butterfly operator receives 2N data and butterfly-operates on the received 2N data when receiving a control signal ‘0’ from the controller. The first and second MUXs respectively receive results from the butterfly operator to output the results in an increment of N when receiving a control signal ‘0’ from the controller, and respectively outputs different N data when receiving a control signal ‘1’ from the controller. The first and second N-point FFT processors N-point FFT operate on the results from the first and second MUXs and respectively output the same under control of the controller. Since the N-point FFT operation can be simultaneously performed two times at a receiver, the performance of the receiver can be enhanced.
    • 提供2N点和N点FFT / IFFT双模式处理器。 处理器包括蝶形运算符,第一和第二MUX以及第一和第二N点FFT处理器。 当从控制器接收到控制信号“0”时,蝶形运算符接收2N个数据并对接收的2N数据进行蝶形运算。 当从控制器接收到控制信号“0”时,第一和第二MUX分别接收蝶形运算器的结果以输出N的增量,并且当从控制器接收到控制信号“1”时分别输出不同的N数据 。 第一和第二N点FFT处理器N点FFT对来自第一和第二MUX的结果进行操作,并在控制器的控制下分别输出。 由于在接收机可以同时进行N点FFT运算两次,所以可以提高接收机的性能。
    • 5. 发明申请
    • FIR filter of DS-CDMA UWB modem transmitter and control method thereof
    • DS-CDMA UWB调制解调器发射机的FIR滤波器及其控制方法
    • US20060120437A1
    • 2006-06-08
    • US11137468
    • 2005-05-26
    • Kyu KangBub KangSangsung ChoiKwang Park
    • Kyu KangBub KangSangsung ChoiKwang Park
    • H04B1/69
    • H04B1/7176H04B1/7174H04B2201/70707
    • An FIR filter of a DS-CDMA UWB modem transmitter and a control method thereof are disclosed. The FIR filter includes an LUT control device for outputting a resultant value of “0” to all adders if data values corresponding to upper three chips H2, M2 and L2 and lower three chips H, M and L are “000000”, and discriminating which group between a first group and a second group the upper/lower data values belong to if the upper/lower data values are not “000000”. The LUT control device provides upper or lower LUT values to the adders using the upper or lower LUT values as they are, or converts the upper or lower LUT values into 2's complements and provides the converted values to the adders according to the discriminated first or second group. The FIR filter has the effect of reducing the amount of memory by about 50% to 80% in comparison to the conventional FIR filter.
    • 公开了DS-CDMA UWB调制解调发射机的FIR滤波器及其控制方法。 如果对应于上三个码片H 2,M 2和L 2以及较低的三个码片H,M和L的数据值为“000000”,则FIR滤波器包括LUT控制装置,用于向所有加法器输出结果值“0” 并且如果所述上/下数据值不是“000000”,则鉴别所述上/下数据值属于第一组和第二组之间的组。 LUT控制装置使用上下LUT值向加法器提供上或下LUT值,或者将上或下LUT值转换为2的补码,并根据所识别的第一或第二值向加法器提供转换的值 组。 与常规FIR滤波器相比,FIR滤波器具有将存储器量减少约50%至80%的效果。
    • 7. 发明申请
    • Synthetic method of glycol diesters from reaction of glycol monoesters and linear aliphatic carboxylic acids
    • 乙二醇单酯和直链脂肪羧酸反应的乙二醇二酯的合成方法
    • US20070049764A1
    • 2007-03-01
    • US11209255
    • 2005-08-23
    • Donghyun KoKwang ParkSang LeeJijoong MoonSungshik EomDae Rew
    • Donghyun KoKwang ParkSang LeeJijoong MoonSungshik EomDae Rew
    • C07C67/02
    • C07C67/08Y02P20/127C07C69/003C07C69/28
    • A method of synthesizing glycol diester by reacting a linear aliphatic carboxylic acid and a glycol monoester in the presence of a Lewis acid type catalyst is provided. In the method, after introducing the glycol monoester, the linear aliphatic carboxylic acid and the Lewis acid type catalyst into a reactor, the reaction occurs to produce reaction products and water in the reactor; an excess of the linear aliphatic carboxylic acid forms an azeotrope with water during the reaction to be sent to a condenser through a distillation column; the linear aliphatic carboxylic acid and water passed through the condenser are divided into an organic layer and an aqueous layer in an oil water separator; and the organic layer is returned to the distillation column through a material cycling line and water in the aqueous layer is removed through a water removal line. By utilizing reactive distillation technique, water produced during the reaction is rapidly removed, and thus the reaction time can be significantly reduced and the yield of the glycol diester can be maximized.
    • 提供了在路易斯酸型催化剂存在下使直链脂族羧酸和二醇单酯反应合成二醇二酯的方法。 在该方法中,在将二醇单酯,直链脂肪族羧酸和路易斯酸型催化剂引入反应器中之后,发生反应以在反应器中产生反应产物和水; 过量的直链脂族羧酸在反应期间与水形成共沸物,通过蒸馏塔送至冷凝器; 将通过冷凝器的直链脂肪族羧酸和水分为油水分离器中的有机层和水层; 并且有机层通过材料循环管线返回到蒸馏塔,水层中的水通过除水管线除去。 通过利用反应蒸馏技术,快速除去反应期间产生的水,从而可以显着降低反应时间,并使乙二醇二酯的产率最大化。
    • 8. 发明申请
    • Liquid crystal display device
    • 液晶显示装置
    • US20060279687A1
    • 2006-12-14
    • US11446572
    • 2006-06-02
    • Kwang ParkSoo YoonMin Chun
    • Kwang ParkSoo YoonMin Chun
    • G02F1/1343
    • G02F1/1333G02F2001/133354
    • Disclosed herein is an LCD device having a drive area directly formed inside a non-pixel area of a substrate without an additional drive IC. The LCD device includes a first substrate having a pixel area and a non-pixel area disposed peripherally to the pixel area. The pixel area has a thin film transistor and a pixel electrode in each sub-pixel defined by gate and data lines crossing each other. A second substrate formed in opposition to the first substrate includes a color filter layer and a black matrix layer. A liquid crystal layer is formed between the first and second substrates. An opening in the black matrix layer reveals an alignment mark, which is disposed on at least one of the first substrate and the second substrate.
    • 这里公开了一种LCD装置,其具有直接形成在衬底的非像素区域内的驱动区域,而没有附加的驱动IC。 LCD装置包括具有像素区域的第一基板和设置在像素区域周边的非像素区域。 像素区域具有由彼此交叉的栅极和数据线限定的每个子像素中的薄膜晶体管和像素电极。 与第一基板相对形成的第二基板包括滤色器层和黑矩阵层。 在第一和第二基板之间形成液晶层。 黑色矩阵层中的开口显示对准标记,其设置在第一基板和第二基板中的至少一个上。