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1. 发明授权

US08143911B2 Input/output driver swing control and supply noise rejection 有权
标题翻译：输入/输出驱动器摆幅控制和电源噪声抑制
公开(公告)号：US08143911B2
公开(公告)日：2012-03-27
申请号：US12060251
申请日：2008-03-31
申请人： Zuoguo Wu , Feng Chen , Sanjay Dabral
发明人： Zuoguo Wu , Feng Chen , Sanjay Dabral
IPC分类号： H03K17/16 , H03K19/003 , H03K19/0175
CPC分类号： H04L25/0276
摘要： In general, in one aspect, the disclosure describes an apparatus having an averager to receive differential output voltages of a transmitter and generate an average transmitter output voltage. A comparator is to compare the average transmitter output voltage to a reference voltage and generate a difference therebetween. An integrator is to integrate the difference between the average transmitter output voltage and the reference voltage over time. The integrated difference is fed back to the transmitter to bias the transmitter.
摘要翻译：通常，在一个方面，本公开描述了一种具有平均器以接收发射机的差分输出电压并产生平均发射机输出电压的装置。比较器将平均发射机输出电压与参考电压进行比较，并产生它们之间的差值。积分器将整合平均发射机输出电压和参考电压随时间的差异。积分差值被反馈给发射机以偏置发射机。

2. 发明申请

US20120011276A1 Dynamically Modulating Link Width 有权
标题翻译：动态调节链路宽度
公开(公告)号：US20120011276A1
公开(公告)日：2012-01-12
申请号：US13240546
申请日：2011-09-22
申请人： Naveen Cherukuri , Aaron T. Spink , Phanindra Mannaya , Tim Frodsham , Jeffrey R. Wilcox , Sanjay Dabral , David Dunning , Theodore Z. Schoenborn
发明人： Naveen Cherukuri , Aaron T. Spink , Phanindra Mannaya , Tim Frodsham , Jeffrey R. Wilcox , Sanjay Dabral , David Dunning , Theodore Z. Schoenborn
IPC分类号： G06F15/173
CPC分类号： H04L67/141 , G06F13/4265 , H04L65/60 , Y02D10/14 , Y02D10/151
摘要： Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.
摘要翻译：管理链路的系统和方法提供了在链路初始化期间接收远程宽度能力，即对应于远程端口的远程宽度能力。根据远程宽度能力，本地端口和远程端口之间的链路以多个链路宽度进行操作。

3. 发明授权

US07907418B2 Circuit board including stubless signal paths and method of making same 有权
标题翻译：电路板包括无铅信号路径及其制作方法
公开(公告)号：US07907418B2
公开(公告)日：2011-03-15
申请号：US12628778
申请日：2009-12-01
申请人： Pascal Meier , Sanjay Dabral
发明人： Pascal Meier , Sanjay Dabral
IPC分类号： H05K7/00
CPC分类号： H05K3/4611 , H01L2224/16225 , H01L2924/15311 , H05K1/024 , H05K1/112 , H05K1/147 , H05K3/0064 , H05K3/4084 , H05K2201/091 , H05K2201/09318 , H05K2201/10734 , Y10T29/49126
摘要： A circuit board may include first and second sides, a plurality of circuit board layers between the sides, and a plurality of signal traces located in respective circuit board layers. The circuit board layers and the signal traces may extend from a first component connection region at the first side of the circuit board to a second component connection region at the first side of the circuit board. The signal traces may thus form stubless signal paths through the circuit board between the component connection regions. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
摘要翻译：电路板可以包括第一和第二侧，在侧面之间的多个电路板层和位于相应的电路板层中的多个信号迹线。电路板层和信号迹线可以从电路板的第一侧的第一部件连接区域延伸到电路板的第一侧的第二部件连接区域。因此，信号迹线可以在组件连接区域之间形成通过电路板的不连续的信号路径。当然，在不偏离本实施例的情况下，可以进行许多替代，变化和修改。

4. 发明申请

US20080238588A1 Programmable passive equalizer 失效
标题翻译：可编程无源均衡器
公开(公告)号：US20080238588A1
公开(公告)日：2008-10-02
申请号：US12156532
申请日：2008-06-02
申请人： Evelina F. Yeung , Sanjay Dabral , Pascal Meier , Santanu Chaudhuri
发明人： Evelina F. Yeung , Sanjay Dabral , Pascal Meier , Santanu Chaudhuri
IPC分类号： H04B3/14
CPC分类号： H04B3/145
摘要： Embodiments of a programmable passive equalizer are described herein.
摘要翻译：本文描述了可编程无源均衡器的实施例。

5. 发明授权

US07394331B2 Programmable passive equalizer 有权
公开(公告)号：US07394331B2
公开(公告)日：2008-07-01
申请号：US11198111
申请日：2005-08-05
申请人： Evelina F Yeung , Sanjay Dabral , Pascal Meier , Santanu Chaudhuri
发明人： Evelina F Yeung , Sanjay Dabral , Pascal Meier , Santanu Chaudhuri
IPC分类号： H04B3/14
CPC分类号： H04B3/145
摘要： Embodiments of a programmable passive equalizer are described herein.

6. 发明授权

US07328359B2 Technique to create link determinism 有权
标题翻译：技术创造链接决定论
公开(公告)号：US07328359B2
公开(公告)日：2008-02-05
申请号：US10897225
申请日：2004-07-21
申请人： Tim Frodsham , Michael J. Tripp , David J. O'Brien , Muraleedhara Navada , Naveen Cherukuri , Sanjay Dabral , David S. Dunning , Theodore Z. Schoenborn
发明人： Tim Frodsham , Michael J. Tripp , David J. O'Brien , Muraleedhara Navada , Naveen Cherukuri , Sanjay Dabral , David S. Dunning , Theodore Z. Schoenborn
IPC分类号： G06F1/04 , G06F1/12 , G06F5/00 , G06F13/42 , H04L7/00
CPC分类号： G06F13/4273 , G06F5/06
摘要： A technique for promoting determinism among bus agents within a point-to-point (PtP) network. More particularly, embodiments of the invention relate to techniques to compensate for link latency, data skew, and clock shift within a PtP network of common system interface (CSI) bus agents.
摘要翻译：一种促进点对点（PtP）网络中总线代理之间确定性的技术。更具体地，本发明的实施例涉及补偿公共系统接口（CSI）总线代理的PtP网络内的链路延迟，数据偏移和时钟偏移的技术。

7. 发明授权

US07250333B2 Method of fabricating a linearized output driver and terminator 有权
标题翻译：制造线性化输出驱动器和终端器的方法
公开(公告)号：US07250333B2
公开(公告)日：2007-07-31
申请号：US10394977
申请日：2003-03-20
申请人： Sanjay Dabral , Krishna Seshan
发明人： Sanjay Dabral , Krishna Seshan
IPC分类号： H01L21/8234 , H01L21/8244
CPC分类号： H01L29/66659 , H01L29/7835 , Y02P80/30
摘要： A method and apparatus for a linearized output driver and terminator is described. In one embodiment the method includes forming a gate electrode on a substrate, the portion of the substrate covered by the gate electrode defining a channel. The method further includes forming a first source/drain doped region on laterally opposed sides of the gate electrode in the substrate. The method also includes forming a spacer on laterally opposed sides of the gate electrode on the substrate. The method also includes forming a linearized drain contact region at a location within the first source/drain doped region sufficiently distant from the gate electrode to define a series resistor in the first source/drain doped region disposed between the gate electrode and the linearized drain contact area based on an expected resistivity of the source/drain doped region, the series resistor coupled electrically to the channel.
摘要翻译：描述了用于线性化输出驱动器和终止器的方法和装置。在一个实施例中，该方法包括在衬底上形成栅电极，衬底的由栅电极覆盖的部分限定沟道。该方法还包括在衬底的栅电极的横向相对侧上形成第一源极/漏极掺杂区域。该方法还包括在基板上的栅电极的横向相对侧上形成间隔物。该方法还包括在与栅电极充分远的第一源极/漏极掺杂区域内的位置处形成线性化的漏极接触区域，以在布置在栅极电极和线性化漏极接触之间的第一源极/漏极掺杂区域中限定串联电阻器基于源极/漏极掺杂区域的预期电阻率的区域，串联电阻器电连接到沟道。

8. 发明授权

US07245156B2 Pre-drivers for current-mode I/O drivers 有权
标题翻译：当前模式I / O驱动程序的前驱动程序
公开(公告)号：US07245156B2
公开(公告)日：2007-07-17
申请号：US11094810
申请日：2005-03-31
申请人： Evelina F. Yeung , Karthisha Canagasaby , Sanjay Dabral
发明人： Evelina F. Yeung , Karthisha Canagasaby , Sanjay Dabral
IPC分类号： H03K19/0175
CPC分类号： H03K19/00323 , H03K19/018528
摘要： A pre-driver circuit includes a first stage to generate a first pre-driver signal and a second stage to generate a second pre-driver signal. The first and second stages are to generate the first and second pre-driver signals to cross at a point which reduces rise-and-fall mismatch in differential signal outputs from a current-mode driver.
摘要翻译：预驱动器电路包括产生第一预驱动器信号的第一级和产生第二预驱动器信号的第二级。第一和第二阶段是产生第一和第二预驱动器信号以在减少来自当前模式驱动器的差分信号输出的上升和下降失配的点处交叉。

9. 发明授权

US07219220B2 Methods and apparatuses for resetting the physical layers of two agents interconnected through a link-based interconnection 有权
标题翻译：用于重置通过基于链路的互连互联的两个代理的物理层的方法和装置
公开(公告)号：US07219220B2
公开(公告)日：2007-05-15
申请号：US10850783
申请日：2004-05-21
申请人： Naveen Cherukuri , Sanjay Dabral , David S. Dunning , Tim Frodsham , Theodore Z. Schoenborn
发明人： Naveen Cherukuri , Sanjay Dabral , David S. Dunning , Tim Frodsham , Theodore Z. Schoenborn
IPC分类号： G06F15/177 , G06F9/00
CPC分类号： H04L69/32
摘要： A method for effecting an in-band reset of the physical layers of two agents interconnected through a link-based interconnection scheme. In accordance with one embodiment of the invention, a first of the two agents ceases its forwarded clock to initiate the in-band reset. Upon realization of the cessation, a second agent ceases its forwarded clock and proceeds to a reset state. The first agent then proceeds to a reset state. Subsequently, after waiting a specified period of time, both agents proceed with a re-initialization of the physical layer. In accordance with one embodiment of the invention, the re-initialization of the physical layer is effected without impacting other layers of the interconnection hierarchy.
摘要翻译：一种用于实现通过基于链路的互连方案互联的两个代理的物理层的带内复位的方法。根据本发明的一个实施例，两个代理中的第一个停止其转发的时钟以启动带内复位。在停止实现时，第二代理程序停止其转发的时钟并进入复位状态。然后第一个代理进入复位状态。随后，等待指定的时间段后，两个代理进行物理层的重新初始化。根据本发明的一个实施例，实现物理层的重新初始化而不影响互连层次结构的其他层。

10. 发明授权

US07210050B2 Increasing robustness of source synchronous links by avoiding write pointers based on strobes 有权
标题翻译：通过避免基于选通的写指针来提高源同步链路的鲁棒性
公开(公告)号：US07210050B2
公开(公告)日：2007-04-24
申请号：US10232157
申请日：2002-08-30
申请人： Sanjay Dabral
发明人： Sanjay Dabral
IPC分类号： G06F1/12 , G06F13/42 , G06F1/04 , H04L7/00
CPC分类号： H04L7/0012 , H04L7/005
摘要： A source synchronous scheme in which data from one clock domain is synchronized to a clock of a second clock domain. Using a more reliable clock of the second domain to control and adjust the alignment after the data is latched in allows more robust performance to maintain correctly ordered data. In this manner, a write pointer based on strobe signal(s) from the first clock domain may be avoided.
摘要翻译：源同步方案，其中来自一个时钟域的数据与第二时钟域的时钟同步。在数据被锁存之后，使用第二域的更可靠的时钟来控制和调整对齐，从而可以提供更稳健的性能来维护正确排序的数据。以这种方式，可以避免基于来自第一时钟域的选通信号的写指针。

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