会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明申请
    • Method for fabricating thin film transistor
    • 制造薄膜晶体管的方法
    • US20060046357A1
    • 2006-03-02
    • US11011585
    • 2004-12-15
    • Sang-Woong LeeJae-Young OhTae-Hoon YangJin-Wook SeoKi-Yong LeeCheol-Ho Yu
    • Sang-Woong LeeJae-Young OhTae-Hoon YangJin-Wook SeoKi-Yong LeeCheol-Ho Yu
    • H01L21/84H01L21/00
    • H01L21/02672H01L21/02532H01L21/02595H01L21/2022H01L27/1277H01L29/04H01L29/66757H01L29/78675
    • The present invention relates to a method for fabricating thin film transistor, more particularly, to a method for fabricating thin film transistor which not only manufactures a polycrystalline silicon layer having large grain size and containing a trace of residual metal catalyst by heat treating thereby crystallizing the metal catalyst layer after forming an amorphous silicon layer on a substrate, forming a capping layer formed of nitride film having 1.78 to 1.90 of the refraction index when crystallizing the amorphous silicon layer and forming a metal catalyst layer on the capping layer, but also controls characteristics of the polycrystalline silicon layer by controlling the refraction index of the capping layer. The present invention provides a method for fabricating thin film transistor comprising the steps of preparing an insulation substrate; forming an amorphous silicon layer on the substrate; forming a capping layer having 1.78 to 1.90 of the refraction index on the amorphous silicon layer; forming a metal catalyst layer on the capping layer; and crystallizing the amorphous silicon layer into a polycrystalline silicon layer by heat treating the substrate. Therefore, a method for fabricating thin film transistor fabricates a thin film transistor which has superior characteristics and is capable of controlling the characteristics by controlling the refraction index of capping layer formed of nitride film to 1.78 to 1.90 when performing crystallization by super grain silicon crystallization method, thereby obtaining a semiconductor layer having a large grain size so that electron mobility is increased, and an amount of metal catalyst remained is decreased to lower leakage current, and controlling grain size of polycrystalline silicon layer by the refraction index of the capping layer so that a polycrystalline silicon layer having desired size and uniformity is obtained.
    • 本发明涉及一种制造薄膜晶体管的方法,更具体地说,涉及制造薄膜晶体管的方法,该方法不仅通过热处理制造具有大晶粒尺寸并且含有微量残余金属催化剂的多晶硅层,从而使 在基板上形成非晶硅层之后,形成由氮化物膜形成的覆盖层,所述覆盖层在结晶非晶硅层时具有1.78〜1.90的折射率,并且在封盖层上形成金属催化剂层,而且还控制特性 的多晶硅层,通过控制覆盖层的折射率。 本发明提供一种制造薄膜晶体管的方法,包括以下步骤:制备绝缘衬底; 在所述基板上形成非晶硅层; 形成在非晶硅层上具有1.78至1.90折射率的覆盖层; 在覆盖层上形成金属催化剂层; 以及通过对所述衬底进行热处理将所述非晶硅层结晶成多晶硅层。 因此,制造薄膜晶体管的方法制造薄膜晶体管,其具有优异的特性,并且能够通过将由氮化物膜形成的覆盖层的折射率控制在通过超晶硅结晶法进行结晶时为1.78〜1.90的特性 从而获得具有大晶粒尺寸的电子迁移率增加的半导体层,并且减少金属催化剂的剩余量以降低泄漏电流,并且通过覆盖层的折射率控制多晶硅层的晶粒尺寸,使得 得到所需尺寸和均匀性的多晶硅层。
    • 5. 发明授权
    • Thin film transistor and method for fabricating the same
    • 薄膜晶体管及其制造方法
    • US07935586B2
    • 2011-05-03
    • US12853263
    • 2010-08-09
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • H01L21/84
    • H01L29/78654H01L29/66757H01L29/66772H01L29/78675H01L29/78696
    • A thin film transistor that has improved characteristics and uniformity is developed by uniformly controlling low concentration of crystallization catalyst and controlling crystallization position so that no seed exists and no grain boundary exists, or one grain boundary exists in a channel layer of the thin film transistor. The thin film transistor includes a substrate; a semiconductor layer pattern which is formed on the substrate, the semiconductor layer pattern having a channel layer of which no seed exists and no gram boundary exists; a gate insulating film formed on the semiconductor layer pattern; and a gate electrode formed on the gate insulating film. A method for fabricating the thin film transistor includes forming an amorphous silicon layer on a substrate; forming a semiconductor layer pattern having a channel layer in which no seed exists and no grain boundary exists by crystallizing and patterning the amorphous silicon layer; forming a gate insulating film on the semiconductor layer pattern; and forming a gate electrode on the gate insulating film.
    • 通过均匀控制结晶催化剂的低浓度和控制结晶位置,使得不存在晶种并且不存在晶界,或者在薄膜晶体管的沟道层中存在一个晶界,开发出具有改善的特性和均匀性的薄膜晶体管。 薄膜晶体管包括基板; 形成在所述基板上的半导体层图案,所述半导体层图案具有不存在种子的沟道层,并且不存在晶界; 形成在半导体层图案上的栅极绝缘膜; 以及形成在栅极绝缘膜上的栅电极。 一种薄膜晶体管的制造方法,包括在基板上形成非晶硅层; 形成具有不存在种子的沟道层的半导体层图案,并且通过对非晶硅层进行结晶和图案化而不存在晶界; 在半导体层图案上形成栅极绝缘膜; 以及在所述栅极绝缘膜上形成栅电极。
    • 6. 发明申请
    • THIN FILM TRANSISTOR AND METHOD FOR FABRICATING THE SAME
    • 薄膜晶体管及其制造方法
    • US20110020990A1
    • 2011-01-27
    • US12853263
    • 2010-08-09
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • H01L21/336
    • H01L29/78654H01L29/66757H01L29/66772H01L29/78675H01L29/78696
    • A thin film transistor that has improved characteristics and uniformity is developed by uniformly controlling low concentration of crystallization catalyst and controlling crystallization position so that no seed exists and no grain boundary exists, or one grain boundary exists in a channel layer of the thin film transistor. The thin film transistor includes a substrate; a semiconductor layer pattern which is formed on the substrate, the semiconductor layer pattern having a channel layer of which no seed exists and no gram boundary exists; a gate insulating film formed on the semiconductor layer pattern; and a gate electrode formed on the gate insulating film. A method for fabricating the thin film transistor includes forming an amorphous silicon layer on a substrate; forming a semiconductor layer pattern having a channel layer in which no seed exists and no grain boundary exists by crystallizing and patterning the amorphous silicon layer; forming a gate insulating film on the semiconductor layer pattern; and forming a gate electrode on the gate insulating film.
    • 通过均匀控制结晶催化剂的低浓度和控制结晶位置,使得不存在晶种并且不存在晶界,或者在薄膜晶体管的沟道层中存在一个晶界,开发出具有改善的特性和均匀性的薄膜晶体管。 薄膜晶体管包括基板; 形成在所述基板上的半导体层图案,所述半导体层图案具有不存在种子的沟道层,并且不存在晶界; 形成在半导体层图案上的栅极绝缘膜; 以及形成在栅极绝缘膜上的栅电极。 一种薄膜晶体管的制造方法,包括在基板上形成非晶硅层; 形成具有不存在种子的沟道层的半导体层图案,并且通过对非晶硅层进行结晶和图案化而不存在晶界; 在半导体层图案上形成栅极绝缘膜; 以及在所述栅极绝缘膜上形成栅电极。
    • 9. 发明授权
    • Method of fabricating thin film transistor
    • 制造薄膜晶体管的方法
    • US07795082B2
    • 2010-09-14
    • US11741273
    • 2007-04-27
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • Tae-Hoon YangKi-Yong LeeJin-Wook SeoByoung-Keon Park
    • H01L21/00
    • H01L21/02672H01L21/02488H01L21/02532H01L21/3226H01L27/1277H01L27/1288
    • A method of fabricating a CMOS thin film transistor includes: providing a substrate; forming an amorphous silicon layer on the substrate; performing a first annealing process on the substrate and crystallizing the amorphous silicon layer into a polysilicon layer; patterning the polysilicon layer to form first and second semiconductor layers; implanting first impurities into the first and second semiconductor layers; implanting second impurities into the first or second semiconductor layer; and performing a second annealing process on the semiconductor layers to remove the metal catalyst remaining in the first or second semiconductor layer, on which the second impurities are implanted, wherein the first impurities are implanted at a dose of 6×1013/cm2 to 5×1015/cm2, and the second impurities are implanted at a dose of 1×1011/cm2 to 3×1015/cm2.
    • 制造CMOS薄膜晶体管的方法包括:提供衬底; 在所述基板上形成非晶硅层; 在所述衬底上进行第一退火处理并将所述非晶硅层结晶成多晶硅层; 图案化多晶硅层以形成第一和第二半导体层; 将第一杂质注入到第一和第二半导体层中; 将第二杂质注入第一或第二半导体层; 以及对所述半导体层进行第二退火处理,以去除留在其中注入所述第二杂质的所述第一或第二半导体层中的金属催化剂,其中所述第一杂质以6×10 13 / cm 2至5× 1015 / cm2,第1杂质以1×10 11 / cm 2的剂量注入3×1015 / cm 2。