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1. 发明授权

US08085572B2 Semiconductor memory apparatus 失效
标题翻译：半导体存储装置
公开(公告)号：US08085572B2
公开(公告)日：2011-12-27
申请号：US12264832
申请日：2008-11-04
申请人： Sang Don Lee , Jung Ho Lee , Tae Su Jang
发明人： Sang Don Lee , Jung Ho Lee , Tae Su Jang
IPC分类号： G11C11/22 , G11C11/24 , G11C7/00
CPC分类号： G11C11/404 , G11C7/04 , G11C11/406
摘要： A semiconductor memory apparatus includes a unit cell with a transistor having a floated body and a capacitor for storing charges; a word line for activating the unit cell; and a bit line for transmitting data to the unit cell.
摘要翻译：一种半导体存储装置，包括具有带有浮体的晶体管的单元电池和用于存储电荷的电容器; 用于激活单元的字线; 以及用于将数据发送到单元的位线。

2. 发明申请

US20090296453A1 Semiconductor Memory Apparatus 失效
标题翻译：半导体存储器
公开(公告)号：US20090296453A1
公开(公告)日：2009-12-03
申请号：US12264832
申请日：2008-11-04
申请人： Sang Don Lee , Jung Ho Lee , Tae Su Jang
发明人： Sang Don Lee , Jung Ho Lee , Tae Su Jang
IPC分类号： G11C5/14 , G11C11/24
CPC分类号： G11C11/404 , G11C7/04 , G11C11/406
摘要： A semiconductor memory apparatus includes a unit cell with a transistor having a floated body and a capacitor for storing charges; a word line for activating the unit cell; and a bit line for transmitting data to the unit cell.
摘要翻译：一种半导体存储装置，包括具有带有浮体的晶体管的单元电池和用于存储电荷的电容器; 用于激活单元的字线; 以及用于将数据发送到单元的位线。

3. 发明申请

US20130171684A1 Aerosol deposition apparatus for highly controlled range of population densities on material surfaces 审中-公开
标题翻译：气溶胶沉积装置，用于材料表面上高度控制的人口密度范围
公开(公告)号：US20130171684A1
公开(公告)日：2013-07-04
申请号：US13374572
申请日：2012-01-03
申请人： Michael Worth Calfee , Sang Don Lee , Shawn Patrick Ryan
发明人： Michael Worth Calfee , Sang Don Lee , Shawn Patrick Ryan
IPC分类号： C12Q1/22 , B05D1/02 , C12Q1/06 , B05B15/00
CPC分类号： B05B1/28 , B65D83/30 , G01N15/0606 , G01N2001/2893
摘要： An aerosol deposition apparatus is described for reproducibly preparing standardized coupon surfaces, which mimic aerosol deposited materials in an uncontrolled environment. The dome shaped apparatus is placed over the surfaces and an aerosol is delivered to the apex of the dome. The aerosol deposited surfaces may be used as standards for evaluating decontamination methods.
摘要翻译：描述了一种气溶胶沉积设备，用于可再现地制备标准化试样表面，其在不受控制的环境中模拟气溶胶沉积材料。将圆顶形装置放置在表面上，并将气溶胶输送到圆顶的顶点。气溶胶沉积表面可以用作评估去污方法的标准。

4. 发明申请

US20100300221A1 Aerosol particle deposition on surfaces 失效
标题翻译：气溶胶颗粒沉积在表面上
公开(公告)号：US20100300221A1
公开(公告)日：2010-12-02
申请号：US12457164
申请日：2009-06-02
申请人： Sang Don Lee , Shawn P. Ryan , Emily G. Snyder
发明人： Sang Don Lee , Shawn P. Ryan , Emily G. Snyder
IPC分类号： G01N33/00 , B05D1/02 , B05C5/00
CPC分类号： B08B13/00 , B65D83/14
摘要： A method and apparatus for generating a standardized surface contaminated by an aerosol deposited on its surface is described. Aerosols are propelled horizontally onto a vertical surface. The standardized contaminated surface is used to evaluate the effectiveness of cleaning and removing techniques.
摘要翻译：描述了用于产生被沉积在其表面上的气溶胶污染的标准化表面的方法和装置。气溶胶水平推进垂直表面。标准污染表面用于评估清洁和清除技术的有效性。

5. 发明申请

US20100197123A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20100197123A1
公开(公告)日：2010-08-05
申请号：US12693389
申请日：2010-01-25
申请人： Sang Don Lee
发明人： Sang Don Lee
IPC分类号： H01L21/20 , H01L21/302
CPC分类号： H01L21/3065 , H01L21/30604 , H01L27/105 , H01L27/1052 , H01L27/10855 , H01L27/10888 , H01L27/10894
摘要： A semiconductor device includes a device isolation structure formed on a semiconductor substrate to define an active region. A first Si-based epitaxial pattern is formed over the active region corresponding to a bit line contact region and a portion of a gate region at both sides adjacent to the bit line contact region. A second Si-based epitaxial layer is formed over the semiconductor substrate which is stepped up on the first Si-based epitaxial pattern. A stepped gate pattern is formed over the stepped second Si-based epitaxial layer.
摘要翻译：半导体器件包括形成在半导体衬底上以限定有源区的器件隔离结构。在对应于位线接触区域的有源区域和与位线接触区域相邻的两侧的栅极区域的一部分上形成第一Si基外延图案。第二Si基外延层形成在半导体衬底上，该半导体衬底被加强在第一Si基外延图案上。在阶梯状的第二Si基外延层上形成阶梯状栅极图案。

6. 发明授权

US07683406B2 Semiconductor device and method for forming the same 失效
标题翻译：半导体装置及其形成方法
公开(公告)号：US07683406B2
公开(公告)日：2010-03-23
申请号：US11517422
申请日：2006-09-08
申请人： Sang Don Lee
发明人： Sang Don Lee
IPC分类号： H01L31/062
CPC分类号： H01L29/66772 , H01L29/78648
摘要： The present invention is related to semiconductor device and method for manufacturing the same. In accordance with the semiconductor device and method for manufacturing the same, at least one opening extending between LDD regions and exposing a buried insulating layer is formed so that a gate electrode surrounds the surface of a channel region. This structure allows the formation of a relatively a thick channel region and decreases the sensitivity of characteristics of the device dependent upon the thickness of the channel region.
摘要翻译：本发明涉及半导体器件及其制造方法。根据半导体器件及其制造方法，形成在LDD区域之间延伸并露出掩埋绝缘层的至少一个开口，使得栅极电极围绕沟道区域的表面。该结构允许形成相对较厚的沟道区域，并且根据沟道区域的厚度降低器件特性的灵敏度。

7. 发明申请

US20090294874A1 Method of Fabricating Semiconductor Apparatus Having Saddle-Fin Transistor and Semiconductor Apparatus Fabricated Thereby 有权
标题翻译：制造具有鞍鳍晶体管和半导体装置的半导体装置的方法
公开(公告)号：US20090294874A1
公开(公告)日：2009-12-03
申请号：US12265902
申请日：2008-11-06
申请人： Sang Don Lee
发明人： Sang Don Lee
IPC分类号： H01L21/336 , H01L29/78 , H01L27/088
CPC分类号： H01L27/088 , H01L21/823412 , H01L21/823456 , H01L21/823481 , H01L27/105 , H01L27/10876 , H01L27/10879 , H01L27/10894 , H01L29/66795 , H01L29/7851
摘要： A method of fabricating a saddle-fin transistor may include: forming a buffer oxide film and a hard mask oxide film over a semiconductor substrate; etching the buffer oxide film, the hard mask oxide film and the semiconductor substrate corresponding to a mask pattern to form a trench corresponding to a gate electrode and a fin region; oxidizing the exposed semiconductor substrate in the trench to form a gate oxide film; depositing a gate lower electrode in the trench; and depositing a gate upper electrode over the gate lower electrode to fill the trench.
摘要翻译：制造鞍形鳍式晶体管的方法可以包括：在半导体衬底上形成缓冲氧化膜和硬掩模氧化膜; 蚀刻缓冲氧化膜，硬掩模氧化物膜和对应于掩模图案的半导体衬底，以形成对应于栅电极和鳍区的沟槽; 氧化暴露的沟槽中的半导体衬底以形成栅氧化膜; 在沟槽中沉积栅极下电极; 以及在所述栅极下电极上沉积栅极上电极以填充所述沟槽。

8. 发明申请

US20090294857A1 Method for Manufacturing Semiconductor Apparatus Having Saddle-Fin Transistor and Semiconductor Apparatus Fabricated Thereby 有权
标题翻译：制造具有鞍鳍晶体管和半导体装置的半导体装置的方法
公开(公告)号：US20090294857A1
公开(公告)日：2009-12-03
申请号：US12265399
申请日：2008-11-05
申请人： Sang Don Lee
发明人： Sang Don Lee
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/10894 , H01L27/10876 , H01L27/10879 , H01L29/66795 , H01L29/785
摘要： A method for manufacturing a semiconductor memory apparatus may include forming a channel region and a gate region through a self-alignment etching process on a cell region; and forming a three-dimensional multi-channel region through an etching process using a first multi-channel mask on a core region and a peripheral region and forming a gate region through an etching process using a second multi-channel mask, thereby preventing mis-arrangement of gates.
摘要翻译：半导体存储器件的制造方法可以包括通过在单元区域上的自对准蚀刻工艺形成沟道区域和栅极区域; 以及通过使用第一多通道掩模在芯区域和周边区域上的蚀刻工艺形成三维多沟道区域，并通过使用第二多通道掩模的蚀刻工艺形成栅极区域，安排门。

9. 发明授权

US07615449B2 Semiconductor device having a recess channel transistor 失效
标题翻译：具有凹槽通道晶体管的半导体器件
公开(公告)号：US07615449B2
公开(公告)日：2009-11-10
申请号：US11529420
申请日：2006-09-29
申请人： Sung Woong Chung , Sang Don Lee
发明人： Sung Woong Chung , Sang Don Lee
IPC分类号： H01L29/94 , H01L29/78
CPC分类号： H01L29/66621 , H01L27/10876
摘要： The semiconductor device having a recess channel transistor includes a device isolation structure formed in a semiconductor substrate to define an active region having a recess region at a lower part of sidewalls thereof and a recess channel region formed in the semiconductor substrate under the active region. A method for fabricating the semiconductor device includes forming a device isolation structure in a semiconductor substrate to form an active region having a recess region at a lower part of sidewalls thereof, a gate insulating film formed over the semiconductor substrate including the recess channel region, and a gate electrode formed over the gate insulating film to fill up the recess channel region.
摘要翻译：具有凹陷沟道晶体管的半导体器件包括形成在半导体衬底中的器件隔离结构，以限定其侧壁下部具有凹陷区域的有源区域和在有源区域下形成在半导体衬底中的凹槽沟道区域。一种制造半导体器件的方法包括：在半导体衬底中形成器件隔离结构，以形成在其侧壁的下部具有凹陷区域的有源区，形成在包括凹槽沟道区域的半导体衬底上的栅极绝缘膜，以及形成在所述栅极绝缘膜上方以填充所述凹陷沟道区域的栅电极。

10. 发明授权

US07608508B2 Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07608508B2
公开(公告)日：2009-10-27
申请号：US11529540
申请日：2006-09-29
申请人： Sang Don Lee
发明人： Sang Don Lee
IPC分类号： H01L21/336
CPC分类号： H01L21/823437 , H01L27/10876 , H01L29/66621 , H01L29/7834
摘要： A method for manufacturing a semiconductor device includes forming a recess with a device separating film and a first hard mask layer so that a pad nitride film for defining a recess gate region may remain with a conventional mask. The method additionally the recess gate region to facilitate a subsequent process for etching a gate electrode without a step difference between the device separating film.
摘要翻译：一种制造半导体器件的方法包括：通过器件分离膜和第一硬掩模层形成凹槽，从而用常规掩模保留用于限定凹陷栅区的衬垫氮化物膜。该方法另外还包括凹槽栅极区域，以便于在器件分离膜之间没有阶差的情况下进行蚀刻栅电极的后续处理。

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