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1. 发明申请

WO2004034218A2 METHOD AND APPARATUS FOR THREAD-BASED MEMORY ACCESS IN A MULTITHREADED PROCESSOR 审中-公开
标题翻译：在多线程处理器中用于基于线程的存储器访问的方法和设备
公开(公告)号：WO2004034218A2
公开(公告)日：2004-04-22
申请号：PCT/US2003/031961
申请日：2003-10-09
申请人： SANDBRIDGE TECHNOLOGIES, INC.
发明人： HOKENEK, Erdem , MOUDGILL, Mayan , GLOSSNER, John, c.
IPC分类号： G06F
CPC分类号： G06F9/342 , G06F9/3851 , G06F12/06 , G06F12/0842 , G06F12/0846 , Y02D10/13
摘要： Techniques for thread-based memory access by a multithreaded processor are disclosed. The multithreaded processor determines a thread identifier associated with a particular processor thread, and utilizes at least a portion of the thread identifier to select a particular portion of an associated memory to be accessed by the corresponding processor thread. In an illustrative embodiment, a first portion of the thread identifier is utilized to select one of a plurality of multiple-bank memory elements within the memory, and a second portion of the thread identifier is utilized to select one of a plurality of memory banks within the selected one of the multiple-bank memory elements. The first portion may comprise one or more most significant bits of the thread identifier, while the second portion comprises one or more least significant bits of the thread identifier. Advantageously, the invention reduces memory access times and power consumption, while preventing the stalling of any processor threads.
摘要翻译：
披露了多线程处理器基于线程的内存访问技术。多线程处理器确定与特定处理器线程相关联的线程标识符，并且利用线程标识符的至少一部分来选择要由相应处理器线程访问的关联存储器的特定部分。在说明性实施例中，利用线程标识符的第一部分来选择存储器内的多个多存储体单元中的一个存储单元，并且利用线程标识符的第二部分来选择多个存储体中的一个存储体选择多个存储体元件中的一个。第一部分可以包括线程标识符的一个或多个最高有效位，而第二部分包括线程标识符的一个或多个最低有效位。有利地，本发明减少了存储器访问时间和功耗，同时防止了任何处理器线程的停顿。

2. 发明公开

EP1550032A2 METHOD AND APPARATUS FOR THREAD-BASED MEMORY ACCESS IN A MULTITHREADED PROCESSOR 有权转让
标题翻译：方法和设备访问线程群中建立了多线程处理器
公开(公告)号：EP1550032A2
公开(公告)日：2005-07-06
申请号：EP03774703.7
申请日：2003-10-09
申请人： Sandbridge Technologies, Inc.
发明人： HOKENEK, Erdem , MOUDGILL, Mayan , GLOSSNER, John, c.
IPC分类号： G06F9/44
CPC分类号： G06F9/342 , G06F9/3851 , G06F12/06 , G06F12/0842 , G06F12/0846 , Y02D10/13
摘要： Techniques for thread-based memory access by a multithreaded processor are disclosed. The multithreaded processor determines a thread identifier associated with a particular processor thread, and utilizes at least a portion of the thread identifier to select a particular portion of an associated memory to be accessed by the corresponding processor thread. In an illustrative embodiment, a first portion of the thread identifier is utilized to select one of a plurality of multiple-bank memory elements within the memory, and a second portion of the thread identifier is utilized to select one of a plurality of memory banks within the selected one of the multiple-bank memory elements. The first portion may comprise one or more most significant bits of the thread identifier, while the second portion comprises one or more least significant bits of the thread identifier. Advantageously, the invention reduces memory access times and power consumption, while preventing the stalling of any processor threads.

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