专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20120043673A1 THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：三维半导体存储器件
公开(公告)号：US20120043673A1
公开(公告)日：2012-02-23
申请号：US13198234
申请日：2011-08-04
申请人： SUNG-IL CHANG , Youngwoo Park , Kwang Soo Seol
发明人： SUNG-IL CHANG , Youngwoo Park , Kwang Soo Seol
IPC分类号： H01L23/52
CPC分类号： H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L29/66825 , H01L29/66833 , H01L29/7889 , H01L29/7926
摘要： Provided are three-dimensional semiconductor devices. A device includes an electrode structure including conductive patterns sequentially stacked on a substrate, a semiconductor pattern penetrating the electrode structure and including channel regions adjacent to the conductive patterns and vertical adjacent regions between the channel regions, and a semiconductor connecting layer extending from an outer sidewall of the semiconductor pattern to connect the semiconductor pattern to the substrate.
摘要翻译：提供三维半导体器件。一种器件包括：电极结构，包括依次层叠在衬底上的导电图案，穿透电极结构的半导体图案，以及包括与导电图案相邻的沟道区域和沟道区域之间的垂直相邻区域;以及从外侧壁延伸的半导体连接层的半导体图案以将半导体图案连接到基板。

2. 发明申请

US20170110474A1 THREE-DIMENSIONAL SEMICONDUCTOR DEVICES 审中-公开
公开(公告)号：US20170110474A1
公开(公告)日：2017-04-20
申请号：US15392521
申请日：2016-12-28
申请人： CHANGHYUN LEE , CHANJIN PARK , BYOUNGKEUN SON , SUNG-IL CHANG
发明人： CHANGHYUN LEE , CHANJIN PARK , BYOUNGKEUN SON , SUNG-IL CHANG
IPC分类号： H01L27/11582 , H01L29/792 , H01L29/06
CPC分类号： H01L27/11582 , H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L29/0649 , H01L29/7926
摘要： A three-dimensional semiconductor device includes an upper structure on a lower structure, the upper structure including conductive patterns, a semiconductor pattern connected to the lower structure through the upper structure, and an insulating spacer between the semiconductor pattern and the upper structure, a bottom surface of the insulating spacer being positioned at a vertical level equivalent to or higher than an uppermost surface of the lower structure.

3. 发明申请

US20150187791A1 METHODS OF FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICES 审中-公开
标题翻译：制造三维半导体器件的方法
公开(公告)号：US20150187791A1
公开(公告)日：2015-07-02
申请号：US14657849
申请日：2015-03-13
申请人： CHANGHYUN LEE , CHANJIN PARK , BYOUNGKEUN SON , SUNG-IL CHANG
发明人： CHANGHYUN LEE , CHANJIN PARK , BYOUNGKEUN SON , SUNG-IL CHANG
IPC分类号： H01L27/115
CPC分类号： H01L27/11582 , H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L29/0649 , H01L29/7926
摘要： A three-dimensional semiconductor device includes an upper structure on a lower structure, the upper structure including conductive patterns, a semiconductor pattern connected to the lower structure through the upper structure, and an insulating spacer between the semiconductor pattern and the upper structure, a bottom surface of the insulating spacer being positioned at a vertical level equivalent to or higher than an uppermost surface of the lower structure.
摘要翻译：三维半导体器件包括下结构的上结构，上结构包括导电图案，通过上结构连接到下结构的半导体图案，以及半导体图案和上结构之间的绝缘间隔物，底部绝缘间隔物的表面位于等于或高于下部结构的最上表面的垂直水平。

4. 发明申请

US20110298037A1 VERTICAL STRUCTURE NONVOLATILE MEMORY DEVICES 有权
标题翻译：垂直结构非易失性存储器件
公开(公告)号：US20110298037A1
公开(公告)日：2011-12-08
申请号：US13152684
申请日：2011-06-03
申请人： BYEONG-IN CHOE , SUNG-IL CHANG , CHANG-SEOK KANG , JIN-SOO LIM
发明人： BYEONG-IN CHOE , SUNG-IL CHANG , CHANG-SEOK KANG , JIN-SOO LIM
IPC分类号： H01L29/792 , H01L29/78
CPC分类号： H01L29/66666 , G11C16/0466 , G11C16/0483 , H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L29/66825 , H01L29/66833 , H01L29/7827 , H01L29/7889 , H01L29/7926
摘要： A vertical structure nonvolatile memory device can include a channel layer that extends in a vertical direction on a substrate. A memory cell string includes a plurality of transistors that are disposed on the substrate in the vertical direction along a vertical sidewall of the channel layer. At least one of the plurality of transistors includes at least one recess in a gate of the transistor into which at least one protrusion, which includes the channel layer, extends.
摘要翻译：垂直结构的非易失性存储器件可以包括在衬底上沿垂直方向延伸的沟道层。存储单元串包括沿着沟道层的垂直侧壁沿垂直方向设置在基板上的多个晶体管。多个晶体管中的至少一个晶体管包括在晶体管的栅极中的至少一个凹部，至少一个包括沟道层的突起延伸到该凹槽中。

5. 发明申请

US20120326225A1 NON-VOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件
公开(公告)号：US20120326225A1
公开(公告)日：2012-12-27
申请号：US13529621
申请日：2012-06-21
申请人： SUNG-IL CHANG , Young-Woo Park
发明人： SUNG-IL CHANG , Young-Woo Park
IPC分类号： H01L29/792
CPC分类号： H01L21/764 , H01L21/76224 , H01L27/11563 , H01L27/11568 , H01L29/792
摘要： A non-volatile memory device includes a substrate having an active region defined by a device isolation region that has a trench and an air gap, a device isolation pattern positioned at a lower portion of the trench, a memory cell layer including a tunnel insulation layer, a trap insulation layer and a blocking insulation layer that are sequentially stacked on the active region and one of which extends from the active region toward the device isolation region encloses top of the air gap whose bottom is defined by a layer other than that of the top, and a control gate electrode positioned on the cell structure. The one of the insulation layer extending includes a recess at a region corresponding to the center of the air gap.
摘要翻译：非易失性存储器件包括具有由具有沟槽和气隙的器件隔离区限定的有源区的衬底，位于沟槽下部的器件隔离图案，包括隧道绝缘层的存储单元层，顺序堆叠在有源区上并且其中一个从有源区向器件隔离区延伸的陷阱绝缘层和阻挡绝缘层包围气隙的顶部，其底部由不同于顶部和位于电池结构上的控制栅电极。绝缘层延伸的一个包括在对应于气隙的中心的区域处的凹部。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式