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2. 发明公开

EP0762492A1 Semiconductor device manufacturing method 失效
标题翻译： Halbleiterelement-Herstellungsverfahren
公开(公告)号：EP0762492A1
公开(公告)日：1997-03-12
申请号：EP96401812.1
申请日：1996-08-23
申请人： SONY CORPORATION
发明人： Anmo, Hiroaki , Kanematsu, Shigeru , Gomi, Takayuki
IPC分类号： H01L21/74 , H01L21/8228 , H01L21/266
CPC分类号： H01L21/26513 , H01L21/74 , H01L21/8228 , H01L23/544 , H01L2223/54453 , H01L2924/0002 , Y10S148/102 , Y10S438/975 , H01L2924/00
摘要： To form NPN and PNP transistors on the same base for example to obtain a complementary bipolar transistor (1) it has been necessary to make an epitaxial layer a thick film, and this has resulted in deterioration of the characteristics of the NPN transistor. Also, because a step of forming an alignment mark has been necessary this has increased the number of manufacturing steps needed to make a complementary bipolar transistor. This invention provides a semiconductor device manufacturing method which solves this problem as follows: After a first opening (13) [alignment mark (16)] and a second opening (14) are formed in an insulating film (12) formed on a semiconductor base (11) and a doping mask (15) is then formed on the semiconductor base (11), a third opening (17) is formed thereon with the alignment mark (16) as a reference. After an impurity (18) is introduced into the semiconductor base (11) through the third opening (17), the doping mask (15) is removed and after that an impurity (19) is introduced into the semiconductor base (11) by solid-phase diffusion through the second opening (14) and a first embedded diffusion layer (20) is thereby formed and at the same time the impurity (18) is caused to diffuse and form a second embedded diffusion layer (21). Then, after an epitaxial layer is formed, an impurity diffusion layer is formed therein by ion injection (not shown).
摘要翻译：例如，为了形成NPN和PNP晶体管以形成互补双极型晶体管（1），必须使外延层成为厚膜，导致NPN晶体管的特性劣化。此外，由于需要形成对准标记的步骤，这增加了制造互补双极晶体管所需的制造步骤的数量。本发明提供了如下解决该问题的半导体器件制造方法：在形成在半导体基底上的绝缘膜（12）中形成第一开口（13）对准标记（16）和第二开口（14）之后， 11），然后在半导体基底（11）上形成掺杂掩模（15），在其上形成有以对准标记（16）为基准的第三开口（17）。在通过第三开口（17）将杂质（18）引入半导体基底（11）之后，去除掺杂掩模（15），然后通过固体将杂质（19）引入半导体基底（11）由此形成通过第二开口（14）和第一嵌入扩散层（20）的相扩散，并且同时使杂质（18）扩散并形成第二嵌入扩散层（21）。然后，在形成外延层之后，通过离子注入形成杂质扩散层（未示出）。

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