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1. 发明专利

JPH1197573A SEMICONDUCTOR PACKAGE 失效
公开(公告)号：JPH1197573A
公开(公告)日：1999-04-09
申请号：JP25454997
申请日：1997-09-19
申请人： SONY CORP
发明人： OSAWA KENJI , OIDE TOMOSHI
IPC分类号： H01L23/12 , H01L23/36 , H01L23/495 , H01L23/50
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor package which can improve the heat- radiation of the package, and eliminate the ball-size unevenness of protruding electrodes such as solder balls formed by an electrolytic plating method. SOLUTION: A package comprises a semiconductor chip 2 having a plurality of electrode pads 3, the inside of the region in which the pads 3 are formed as an effective element region 4, a reinforcing plate 7 surrounding the semiconductor chip 2, a plurality of leads 10 including an outer lead 10b and an inner lead 10a, the outer lead 10b having a protruding electrode 12b thereon and the tip of the inner lead 10a being connected to the electrode pads 3, and sealing resin 15 filled in the peripheral region of the semiconductor chip 2. A semiconductor pattern 6 is formed on the effective element region 4 of the semiconductor chip 2, the semiconductor pattern 6 being covered with an isolation film 11a and provided with a protruding electrode 12a thereon.

2. 发明专利

JPH04206855A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH04206855A
公开(公告)日：1992-07-28
申请号：JP33833890
申请日：1990-11-30
申请人： SONY CORP
发明人： ASAMI YUKIO , FUKAZAWA HIROYUKI , OIDE TOMOSHI , KOJIMA AKIRA
IPC分类号： H01L23/28
摘要： PURPOSE:To notably enhance the bond properties of a semiconductor chip onto a mold resin for avoiding the cracking in a package by removing the organic pollutants at least on the surface of the semiconductor chip. CONSTITUTION:In order to remove pollutants 8, the oxygen in dry air (or air) is turned into ozone in high energetic state by ultraviolet ray (a) excitation so as to decompose and remove the organic pollutants 8 by the ozone radicals. At this time, numerous OH radicals are formed on the surface of a semiconductor chip 5 to be turned in hydrophilic state having no organic pollutants at all so that the O-H coupling of OH radicals on the semiconductor chip surface (a) with the organic matters comprising a mold resin 11 may be facilitated to make the semiconductor chip 5 firmly bond onto the mold resin 11.

3. 发明专利

JP2008047710A Semiconductor substrate and semiconductor device, and manufacturing method thereof 审中-公开
标题翻译：半导体衬底和半导体器件及其制造方法
公开(公告)号：JP2008047710A
公开(公告)日：2008-02-28
申请号：JP2006222053
申请日：2006-08-16
申请人： Sony Computer Entertainment Inc , Sony Corp , ソニー株式会社 , 株式会社ソニー・コンピュータエンタテインメント
发明人： NISHITANI YUJI , OIDE TOMOSHI
IPC分类号： H01L23/12
摘要： PROBLEM TO BE SOLVED: To obtain a coreless semiconductor substrate further readily without damaging reliability.
SOLUTION: After a multilayer wiring which enables a semiconductor chip to be mounted on a base metallic substrate 100 is constructed in a plurality of regions, a part of the metallic substrate 100 is selectively etched by using a resist, and a stiffener 160 is formed to enclose an electrode pad 25 in each semiconductor chip mounting region. Each region is cut by dicing processing or the like, and a semiconductor substrate 11 with the stiffener 160 is subjected to discrete dicing treatment.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：进一步获得无芯半导体衬底而不损害可靠性。解决方案：在多个区域中构成能够将半导体芯片安装在基底金属基板100上的多层布线之后，通过使用抗蚀剂选择性地蚀刻金属基板100的一部分，并且加强件160 形成为在每个半导体芯片安装区域中包围电极焊盘25。通过切割处理等切割每个区域，并且对具有加强件160的半导体基板11进行离散的切割处理。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2007335740A Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2007335740A
公开(公告)日：2007-12-27
申请号：JP2006167624
申请日：2006-06-16
申请人： Sony Computer Entertainment Inc , Sony Corp , ソニー株式会社 , 株式会社ソニー・コンピュータエンタテインメント
发明人： KANAYAMA FUJIO , OIDE TOMOSHI , ADACHI MITSURU , NISHITANI YUJI , NIIMI TETSUNAGA , KUSANO HIDETOSHI , SASAKI ATSUO
IPC分类号： H01L23/28 , H01L23/29 , H01L23/31
CPC分类号： H01L2224/16225 , H01L2924/15311 , H01L2924/19106
摘要： PROBLEM TO BE SOLVED: To protect a semiconductor chip in a semiconductor device properly, and to suppress influences received from an environment surrounding the semiconductor chip. SOLUTION: The semiconductor device 10 comprises an underfill 70 charging a gap between a substrate 20 and a semiconductor chip 30, and a sealing resin layer 40 covering a part of the substrate 20. The sealing resin layer 40 has a sealing part 40a for sealing a side face 30a of the semiconductor chip 30 through the underfill 70 projecting to the side face 30a, so that a rear face of the semiconductor chip 30 is exposed from the sealing resin layer 40; and a recess 40c which is provided in the upper region of the underfill 70 projecting to the side face 30a, and is lower than the upper face 40b of the sealing resin layer 40. Thus, a force is decreased in which a filet 70a receives from the sealing resin layer 40, and it is possible to suppress a peeling of the filet 70a contained in the underfill 70 from the semiconductor chip 30. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：适当地保护半导体器件中的半导体芯片，并且抑制从半导体芯片周围的环境接收的影响。解决方案：半导体器件10包括填充衬底20和半导体芯片30之间的间隙的底部填充物70以及覆盖衬底20的一部分的密封树脂层40.密封树脂层40具有密封部40a 用于通过向侧面30a突出的底部填充物70密封半导体芯片30的侧面30a，使得半导体芯片30的背面从密封树脂层40露出; 以及凹部40c，其设置在向侧面30a突出的底部填充物70的上部区域中，并且比密封树脂层40的上表面40b低。因此，压片70a从密封树脂层40，并且可以抑制来自半导体芯片30的底部填充物70中包含的file口70a的剥离。版权所有（C）2008，JPO＆INPIT

5. 发明专利

JPH11163022A SEMICONDUCTOR AND MANUFACTURE OF THE SAME AND ELECTRONIC EQUIPMENT 失效
公开(公告)号：JPH11163022A
公开(公告)日：1999-06-18
申请号：JP32793897
申请日：1997-11-28
申请人： SONY CORP
发明人： OSAWA KENJI , OIDE TOMOSHI
IPC分类号： H01L23/12 , H01L21/52 , H01L21/60 , H01L23/00 , H01L23/24 , H01L23/31 , H01L23/498 , H01L23/60
摘要： PROBLEM TO BE SOLVED: To load a fine ball electrode of a semiconductor in the CSP or BGA type of a wire bonding, and to attain reduction in the diameter of an electrode formation hole, fine patterning of a wiring film, high precision of outline precision, and simplification of manufacture. SOLUTION: Plural wiring films 4 are formed at one surface of a base 5 made of insulating resin so that the film surface can be positioned on almost the same plane as the base surface, and at lest one part of the wring films can be overlapped on electrode forming holes 8 of the base 5. Each electrode forming hole 8 is buried with conductive materials so that an outside electrode 6 projecting on the opposite wiring film side face can be formed. Then, a semiconductor 14 is adhered through an insulating material film 11 on one surface of the base 5, and each electrode is bonded through a wire with each wiring film 4 corresponding to this, and the semiconductor element 14, the wiring film 4, and the wire are sealed by a resin 16.

6. 发明专利

JP2010161419A Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2010161419A
公开(公告)日：2010-07-22
申请号：JP2010096232
申请日：2010-04-19
申请人： Sony Computer Entertainment Inc , Sony Corp , ソニー株式会社 , 株式会社ソニー・コンピュータエンタテインメント
发明人： NISHITANI YUJI , OIDE TOMOSHI
IPC分类号： H01L21/60 , H01L23/12
CPC分类号： H01L2224/16225 , H01L2924/15311
摘要： PROBLEM TO BE SOLVED: To achieve a thinner wiring substrate with a narrower pitch without detracting reliability.
SOLUTION: A method of manufacturing a semiconductor device includes steps of: applying a conductive paste 200 containing solder to an upper surface of a substrate for semiconductor chips 11; mounting a semiconductor chip 30 in each of areas of the substrate for semiconductor chips 11; and then heat-treating it at a solder-melting temperature thereby bonding electrode pads 25 to solder bumps 32 with the solder 210 contained in the conductive paste 200. Portions bonded with the solder 210 are coated with insulating resin 212 contained in the conductive paste 200.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：实现更窄的间距的较薄的布线基板，而不降低可靠性。解决方案：制造半导体器件的方法包括以下步骤：将含有焊料的导电膏200施加到用于半导体芯片11的衬底的上表面; 将半导体芯片30安装在用于半导体芯片11的基板的各个区域中; 然后在焊料熔融温度下对其进行热处理，由此将焊料210与包含在导电膏200中的焊料接合，将电极焊盘25接合到焊料凸块32.与焊料210接合的部分用包含在导电膏200中的绝缘树脂212 。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2008198805A Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2008198805A
公开(公告)日：2008-08-28
申请号：JP2007032719
申请日：2007-02-13
申请人： Sony Computer Entertainment Inc , Sony Corp , ソニー株式会社 , 株式会社ソニー・コンピュータエンタテインメント
发明人： KUSANO HIDETOSHI , OIDE TOMOSHI , ADACHI MITSURU , NISHITANI YUJI , NIIMI TETSUNAGA , KANAYAMA FUJIO , SASAKI ATSUO
IPC分类号： H01L23/12 , H01L21/56 , H01L21/60
CPC分类号： H01L24/97 , H01L2224/16 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/16195 , H01L2224/81
摘要： PROBLEM TO BE SOLVED: To easily manufacture a semiconductor device without deteriorating reliability in the semiconductor device using a coreless substrate.
SOLUTION: A multilayer wiring substrate 20 is constructed on a metallic substrate 100 to be a base, and then, semiconductor chips 30 are respectively mounted by flip-chip onto a plurality of areas in the multilayer wiring substrate 20. The metallic substrate 100 is removed after sealing the plurality of semiconductor chips 30 with the use of a sealing resin layer 40. Then, soldering balls, etc., are mounted on the lower surface of the multilayer wiring substrate 20, thereby making the semiconductor device into individual pieces.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了容易地制造半导体器件而不劣化使用无芯基板的半导体器件的可靠性。解决方案：在作为基底的金属基板100上构造多层布线基板20，然后通过倒装芯片将半导体芯片30分别安装到多层布线基板20中的多个区域上。金属基板在使用密封树脂层40密封多个半导体芯片30之后去除100。然后，在多层布线基板20的下表面上安装焊球等，从而使半导体器件成为单独的部件。版权所有（C）2008，JPO＆INPIT

8. 发明专利

JP2008192996A Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008192996A
公开(公告)日：2008-08-21
申请号：JP2007028494
申请日：2007-02-07
申请人： Sony Computer Entertainment Inc , Sony Corp , ソニー株式会社 , 株式会社ソニー・コンピュータエンタテインメント
发明人： KANAYAMA FUJIO , OIDE TOMOSHI , ADACHI MITSURU , NIIMI TETSUNAGA , KUSANO HIDETOSHI , NISHITANI YUJI
IPC分类号： H01L23/02 , H01L23/08 , H01L23/10
CPC分类号： H01L23/315 , H01L21/565 , H01L23/055 , H01L23/3121 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/19041 , H01L2924/00012 , H01L2924/00 , H01L2224/0401
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device in which influence of the heat generated in a flip-chip mounted semiconductor chip to the resin is suppressed. SOLUTION: The semiconductor device 10 comprises a base plate 20, a semiconductor chip 30 mounted on the base plate 20 with the front surface being faced down, and a molded resin layer 40 which is arranged on the same surface of the base plate 20 on which the semiconductor chip 30 is mounted, being separated from the semiconductor chip 30, and arranged at the periphery of the semiconductor chip 30. Furthermore, the upper surface of the molded resin layer 40 is positioned higher than the rear surface of the semiconductor chip 30. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体器件，其中抑制了倒装芯片安装的半导体芯片中产生的热量对树脂的影响。解决方案：半导体器件10包括基板20，安装在基板20上的前表面朝下的半导体芯片30和设置在基板的同一表面上的模制树脂层40 20，其上安装有半导体芯片30，与半导体芯片30分离，并且布置在半导体芯片30的外围。此外，模制树脂层40的上表面被定位成高于半导体芯片30的后表面芯片30.版权所有（C）2008，JPO＆INPIT

9. 发明专利

JPH0677266A ELECTRONIC PART RESIN SEALING METHOD, RESIN POCESSING DEVICE, AND RESIN EVALUATION METHOD 失效
公开(公告)号：JPH0677266A
公开(公告)日：1994-03-18
申请号：JP31711492
申请日：1992-11-26
申请人： SONY CORP
发明人： FUKAZAWA HIROYUKI , OIDE TOMOSHI
IPC分类号： B29C45/02 , B29C45/14 , B29L31/34 , G01N9/00 , G01N25/56 , H01L21/56
摘要： PURPOSE:To prevent air bubbles induced by moisture or the like contained in unmelted and undried resin from being generated in the cured sealing resin of an electronic part, by a method wherein unmelted and undried sealing resin is previously dried up with dry gas of normal temperature before use. CONSTITUTION:When an electronic part is sealed up with sealing resin by the use of a molding die, ummelted and undried sealing resin 12 is previously dried up with dry gas of normal temperature before use, and then the electronic part is sealed up with the dried unmelted sealing resin 12. A drying device Da is provided, where a chamber 17 provided with a gas inlet 14 and an exhaust vent 15 is provided, unmelted and undried sealing resin 12 is placed in the chamber 17, dry gas of normal temperature is fed into the chamber 17 through the gas inlet 14 and blown directly against the sealing resin 12, and moisture- bearing gas is exhausted from the chamber 17 through the exhaust vent 15. For instance, sealing resin 12 is put in a plate-like tray 16, and dry gas (dew point is below 0 deg.C) kept at a temperature of 30 deg.C or so is fed sufficiently into the chamber 17 through the gas inlet 14.

10. 发明专利

JP2008182100A Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2008182100A
公开(公告)日：2008-08-07
申请号：JP2007015093
申请日：2007-01-25
申请人： Sony Computer Entertainment Inc , Sony Corp , ソニー株式会社 , 株式会社ソニー・コンピュータエンタテインメント
发明人： KANAYAMA FUJIO , OIDE TOMOSHI , ADACHI MITSURU , NIIMI TETSUNAGA , KUSANO HIDETOSHI , NISHITANI YUJI
IPC分类号： H01L23/00 , H01L21/56 , H01L23/12
CPC分类号： H01L24/97 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device, capable of reducing damage in the end of a thinned substrate. SOLUTION: Semiconductor chips 30 are respectively flip-flop mounted on a plurality of substrates 20 with an insulating layer and a wiring layer laminated therein. The size of the substrate 20 is larger than a stipulated size. Sealing resins 40 are molded in a state where the plurality of substrates 20, where the semiconductor chips 30 are mounted, respectively, is aligned in one direction. The molding regions of the sealing resins 40 are made to be larger than the outer shapes of a sealing resin layers to be molded in the respective substrates 20. Then, surplus regions R are cut by using a dicing device, etc., so as to meet the prescribed dimension, and the respective substrates 20 are made into single pieces. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供一种半导体器件的制造方法，其能够减少在薄板化基板的端部的损伤。解决方案：半导体芯片30分别安装在多个基板20上，绝缘层和布线层被层压在其上。基板20的尺寸大于规定尺寸。密封树脂40在分别安装半导体芯片30的多个基板20分别沿一个方向排列的状态下成型。使密封树脂40的成型区域大于要在各个基板20中成型的密封树脂层的外部形状。然后，通过使用切割装置等切割多余区域R，以便满足规定的尺寸，并且将各个基板20制成单件。版权所有（C）2008，JPO＆INPIT

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