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1. 发明公开

EP3190706A1 VARIABLE FREQUENCY OSCILLATOR HAVING WIDE TUNING RANGE AND LOW PHASE NOISE 审中-公开
标题翻译：具有宽调谐范围和低相位噪声的变频振荡器
公开(公告)号：EP3190706A1
公开(公告)日：2017-07-12
申请号：EP16290005.4
申请日：2016-01-07
申请人： SDRF EURL
发明人： Bisanti, Biagio , Duvivier, Eric , Carpineto, Lorenzo , Cipriani, Stefano , Coppola, Francesco , Puccio, Gianni , Artinian, Rémi , Marot, Francois , Bodrero, Vanessa , Koechlin, Lysiane
IPC分类号： H03L7/099 , H03B5/12
CPC分类号： H03B5/04 , H03B5/1218 , H03B5/1231 , H03B5/124 , H03B5/1243 , H03B2200/0006 , H03B2200/0008 , H03B2200/004 , H03B2201/0208 , H03L7/099
摘要： A Variable Frequency oscillator comprising a first transistor (10) and a second transistor (20); wherein :
the first transistor (10) has a first terminal which is connected to a reference voltage, and a second terminal which is connected to a first terminal of a first current source (13) which second terminal is connected to ground. Transistor (10) has a third terminal which is connected to a first terminal of a first inductor (14) and to a top terminal of a first capacitor (11) having a bottom terminal being connected to the first terminal of the first inductor (14) and also to a top terminal of a second capacitor (12) having a bottom terminal being connected to ground.
the second transistor (20) has a first terminal which is connected to a reference voltage, and a second terminal which is connected to a first terminal of a second current source (23) which second terminal is connected to ground. Second transistor (20) has a third terminal connected to a first terminal of a second inductor (14) and to a top terminal of a third capacitor (21), wherein the third capacitor (21) has a bottom terminal which is connected to said first terminal of said second inductor (24) and also to a top terminal of a fourth capacitor (12) having a bottom terminal being connected to ground.
In order to achieve a variable frequency oscillation, a variable tank capacitors is connected between the second terminal of inductors (14, 24), so as to form a circuit connecting in series all passive components composing the LC tank, thus masking all parasitic capacitances.
摘要翻译：一种包括第一晶体管（10）和第二晶体管（20）的可变频率振荡器; 其中：所述第一晶体管（10）具有连接到参考电压的第一端子，以及连接到所述第二端子接地的第一电流源（13）的第一端子的第二端子。晶体管（10）具有连接到第一电感器（14）的第一端子和连接到第一电容器（11）的顶端子的第三端子，所述第一电容器的底部端子连接到第一电感器（14）的第一端子）并且还连接到具有接地的底部端子的第二电容器（12）的顶端子。第二晶体管（20）具有连接到参考电压的第一端子，以及连接到第二端子接地的第二电流源（23）的第一端子的第二端子。第二晶体管（20）具有连接到第二电感器（14）的第一端子和第三电容器（21）的顶端子的第三端子，其中第三电容器（21）具有连接到所述第一电容器所述第二电感器（24）的第一端子以及还连接到具有接地的底部端子的第四电容器（12）的顶端子。为了实现变频振荡，可变储能电容器连接在电感器（14,24）的第二端子之间，从而形成将构成LC谐振电容器的所有无源元件串联连接的电路，从而掩蔽所有寄生电容。

2. 发明公开

EP3190701A1 VARIABLE GAIN AMPLIFIER WITH PROGRAMMABLE NOISE AND COMPRESSION CHARACTERISTICS 审中-公开
标题翻译：具有可编程噪声和压缩特性的可变增益放大器
公开(公告)号：EP3190701A1
公开(公告)日：2017-07-12
申请号：EP16290006.2
申请日：2016-01-07
申请人： SDRF EURL
发明人： Bisanti, Biagio , Duvivier, Eric , Carpineto, Lorenzo , Cipriani, Stefano , Coppola, Francesco , Puccio, Gianni , Artinian, Rémi , Marot, Francois , Bodrero, Vanessa , Koechlin, Lysiane
IPC分类号： H03G3/30
CPC分类号： H03G3/30 , H03F3/45475 , H03F2200/408 , H03F2200/411 , H03G3/3036
摘要： A variable gain amplifier (VGA) comprising an input terminal (11) for receiving an input signal, an output terminal (22) for generating an amplified signal in accordance with a control voltage (Vc) applied to a control terminal (101, 201), characterized in that it includes:
- a first stage comprising:
- a first variable amplifier (10) having an input connected to said input terminal (11) and an output (12),
- a first control block (100) having an input receiving said control voltage (Vc) for controlling the gain of said first amplifier (10), said first control block (100) comprising a first register (110) being configured for storing a first control word (CW1) dedicated for determining the point of action of said first amplifier (10);

- a second stage comprising:
- a second variable amplifier (20) having an input connected to the output of said first amplifier (10) and having an output (22) for generating said amplified signal,
- a second control block (200) having an input receiving said control voltage (Vc) for controlling the gain of said second amplifier (20), said second control block (200) comprising a second register (110) being configured for storing a second control word (CW1) dedicated for determining the point of action of said second amplifier (10);

whereby the point of action of said first and said second amplifiers (10, 20) can be independently set.
摘要翻译：一种可变增益放大器（VGA），包括用于接收输入信号的输入端子（11），用于根据施加到控制端子（101,201）的控制电压（Vc）产生放大信号的输出端子（22）其特征在于它包括： - 第一级，包括： - 第一可变放大器（10），具有连接到所述输入端（11）的输入和输出（12）; - 第一控制块（100），具有输入接收用于控制所述第一放大器（10）的增益的所述控制电压（Vc），所述第一控制块（100）包括第一寄存器（110），所述第一寄存器被配置为存储专用于确定所述第一放大器（10）的动作; - 第二级，包括： - 第二可变放大器（20），其具有连接到所述第一放大器（10）的输出的输入并具有用于产生所述放大信号的输出（22）， - 第二控制块（200）（20）的增益的所述控制电压（Vc）的输入，所述第二控制块（200）包括第二寄存器（110），所述第二寄存器被配置用于存储专用于确定所述第二放大器所述第二放大器（10）的作用点; 由此可以独立地设置所述第一和所述第二放大器（10,20）的作用点。

3. 发明公开

EP3190708A1 MULTILOOP PLL STRUCTURE FOR GENERATING AN ACCURATE AND STABLE FREQUENCY OVER A WIDE RANGE OF FREQUENCIES 有权
标题翻译：用于在广泛的频率范围内生成精确稳定的频率的多PLL PLL结构
公开(公告)号：EP3190708A1
公开(公告)日：2017-07-12
申请号：EP16290004.7
申请日：2016-01-07
申请人： SDRF EURL
发明人： Bisanti, Biagio , Duvivier, Eric , Carpineto, Lorenzo , Cipriani, Stefano , Coppola, Francesco , Puccio, Gianni , Artinian, Rémi , Marot, Francois , Bodrero, Vanessa , Koechlin, Lysiane
IPC分类号： H03L7/23
摘要： A multiloop PLL circuit comprising :
- a first PLL loop comprising a first VCO, a first phase detector having a first input receiving a reference frequency (Fref) and a second input receiving the output of a first programmable divider, which input receives the signal generated by the first VCO and a first loop filter connected between said first phase detector and said first VCO;
- at least one auxiliary PLL loop comprising a second VCO, a second phase detector, a second (R1) and a third (N1) programmable dividers , and a second loop filter
- a main loop for generating a desired output frequency Fout comprising a third VCO, a third phase detector, a fourth (Rn) and a fifth (Nn) programmable divider, a main loop filter and a mixer
additional possible auxiliary PLL loop each comprising a forth VCO, a forth phase detector, a sixth (Ri) and a seventh (Ni) programmable divider, a third auxiliary loop filter and a mixer
whereby the desired output frequency Fout is generated in accordance with the relation: F out = N 1 / R 1 + … + Nn / Rn * F cro Where
N1 and R1 are the dividing values of the first auxiliary loop and Ni and Ri with i=2 ... n-1 being the dividing ratios of any possible further auxiliary loop;
Fcro is the frequency generated by VCO.
Wherein said multiloop circuit is configured with dividing values which optimizes a cost function F.
摘要翻译：一种多环PLL电路，包括： - 包括第一VCO的第一PLL环路，具有接收参考频率（Fref）的第一输入的第一相位检测器和接收第一可编程分频器的输出的第二输入，该输入接收所产生的信号由第一VCO和连接在所述第一鉴相器和所述第一VCO之间的第一环路滤波器; - 至少一个包括第二VCO，第二相位检测器，第二（R1）和第三（N1）可编程分频器的辅助PLL环路以及第二环路滤波器 - 用于产生期望输出频率Fout的主环路，该期望输出频率Fout包括第三 VCO，第三相位检测器，第四（Rn）和第五（Nn）可编程分频器，主环路滤波器和混频器附加可能的辅助PLL环路，每个包括第四VCO，第四相位检测器，第六（Ri）第七（Ni）可编程分频器，第三辅助环路滤波器和混频器，由此根据以下关系生成期望的输出频率Fout：Fout = N1 / R1 + ... + Nn / Rn * Fcro其中N1和R1是分频值第一个辅助回路以及Ni和Ri，i = 2 ... n-1是任何可能的辅助回路的分配比例; Fcro是由VCO产生的频率。其中所述多回路电路配置有优化成本函数F的分割值。

4. 发明授权

EP3190708B1 MULTILOOP PLL STRUCTURE FOR GENERATING AN ACCURATE AND STABLE FREQUENCY OVER A WIDE RANGE OF FREQUENCIES 有权
公开(公告)号：EP3190708B1
公开(公告)日：2020-05-06
申请号：EP16290004.7
申请日：2016-01-07
申请人： SDRF EURL
发明人： Bisanti, Biagio , Duvivier, Eric , Carpineto, Lorenzo , Cipriani, Stefano , Coppola, Francesco , Puccio, Gianni , Artinian, Rémi , Marot, Francois , Bodrero, Vanessa , Koechlin, Lysiane
IPC分类号： H03L7/23

5. 发明公开

EP3190707A1 VARIABLE FREQUENCY OSCILLATOR HAVING WIDE TUNING RANGE AND LOW PHASE NOISE 审中-公开
标题翻译：具有宽调谐范围和低相位噪声的变频振荡器
公开(公告)号：EP3190707A1
公开(公告)日：2017-07-12
申请号：EP17150384.0
申请日：2017-01-05
申请人： SDRF EURL
发明人： Bisanti, Biagio , Duvivier, Eric , Carpineto, Lorenzo , Cipriani, Stefano , Coppola, Francesco , Puccio, Gianni , Artinian, Rémi , Marot, Francois , Bodrero, Vanessa , Koechlin, Lysiane
IPC分类号： H03L7/099 , H03B5/12
CPC分类号： H03B5/04 , H03B5/1218 , H03B5/1231 , H03B5/124 , H03B5/1243 , H03B2200/0006 , H03B2200/0008 , H03B2200/004 , H03B2201/0208 , H03L7/099
摘要： A Variable Frequency oscillator comprising a first transistor (10) and a second transistor (20); wherein :
said first transistor (10) has a first terminal - collector - which is connected to a reference voltage, and a second terminal - emitter - which is connected to a first terminal of a first current source (13) which second terminal is connected to ground, and a third terminal - base - connected to a first terminal of a first inductor (14) and to a top terminal of a first capacitor (11), wherein said first capacitor (11) has a bottom terminal which is connected to said second terminal - emitter - of said first transistor (10) but also to a top terminal of a second capacitor (12) having a bottom terminal being connected to ground;
said second transistor (20) has a first terminal - collector -which is connected to a reference voltage, and a second terminal - emitter -which is connected to a first terminal of a second current source (23) which second terminal) is connected to ground, and a third terminal - base - connected to a first terminal of a second inductor (14) and to a top terminal of a third capacitor (21), wherein said third capacitor (21) has a bottom terminal which is connected to said second terminal - emitter - of said second transistor (20) and also to a top terminal of a fourth capacitor (22) having a bottom terminal being connected to ground
wherein said first and second inductors (14, 24) have a second terminal which are connected via a circuit (100) achieving variable capacitance, so as to form a circuit connecting in series all passive components composing the LC tank ,
so as to achieve a variable capacitance which can be used for performing a tuning of the oscillator.
Wherein said second capacitor (12) and said fourth capacitor (22) are both connected to the physical ground thereby avoiding a 2nd harmonic common mode oscillation that might dominate over the differential fundamental one and might destroy said first and said second transistors (10, 20)
摘要翻译：一种包括第一晶体管（10）和第二晶体管（20）的可变频率振荡器; 其中：所述第一晶体管（10）具有连接到参考电压的第一端子 - 集电极和连接到所述第二端子连接的第一电流源（13）的第一端子的第二端子 - 发射极以及第三端子 - 基极 - 连接到第一电感器（14）的第一端子和第一电容器（11）的顶端子，其中所述第一电容器（11）具有连接到第一电容器所述第一晶体管（10）的所述第二端子 - 发射极 - 也连接到第二电容器（12）的顶端子，所述第二电容器具有接地的底部端子; 所述第二晶体管（20）具有连接到参考电压的第一端子 - 集电极和连接到第二端子（第二端子）连接到的第二电流源（23）的第一端子的第二端子 - 发射极（14）的第一端子和第三电容器（21）的顶端子的第三端子 - 基极，其中所述第三电容器（21）具有与所述第二电感器所述第二晶体管的第二端子 - 发射极并且还连接到第四电容器的顶端，所述第四电容器的底部端子接地，其中所述第一和第二电感器具有第二端子，通过实现可变电容的电路（100）连接，从而形成将构成LC谐振回路的所有无源元件串联连接的电路，从而实现可用于执行振荡器调谐的可变电容。其中所述第二电容器（12）和所述第四电容器（22）都连接到物理接地，从而避免可能在差分基极之上占优势并可能破坏所述第一和所述第二晶体管（10,20）的二次谐波共模振荡）

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