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1. 发明申请

WO03039049A1 DIRECT CONVERSION RECEIVER 审中-公开
标题翻译：直接转换接收器
公开(公告)号：WO03039049A1
公开(公告)日：2003-05-08
申请号：PCT/JP0211119
申请日：2002-10-25
申请人： SANYO ELECTRIC CO , YUASA MASATOSHI , HIRAMATSU TATSUO , HANAFUSA SUMIO
发明人： YUASA MASATOSHI , HIRAMATSU TATSUO , HANAFUSA SUMIO
IPC分类号： H04B1/30 , H04L27/26 , H04J11/00
CPC分类号： H04B1/0032 , H04B1/0003 , H04B1/30 , H04L27/2647
摘要： A direct conversion receiver includes a down converter for frequency−converting an analog RF signal modulated by the OFDM method in such a manner that the center frequency of the occupied frequency of the reception object segment is frequency zero, AD conversion means for converting a down convert signal obtained by the down converter into a digital signal, FFT means for performing fast Fourier transform to the signal obtained by the AD conversion means and converting the time axis into a frequency axis, and unnecessary component removal means for removing unnecessary components other than the reception object segment from the output signal of the FFT means.
摘要翻译：直接转换接收机包括：下变频器，用于对以OFDM方式调制的模拟RF信号进行频率转换，使得接收对象段的占用频率的中心频率为频率零; AD转换装置，用于将下变频由下变频器获得的信号为数字信号的FFT装置，用于对由AD转换装置获得的信号进行快速傅里叶变换并将时间轴转换成频率轴的FFT装置，以及用于除去接收以外的不必要的分量的不必要的部件去除装置对象段从FFT装置的输出信号。

2. 发明专利

DE69718695T2 未知
公开(公告)号：DE69718695T2
公开(公告)日：2003-11-20
申请号：DE69718695
申请日：1997-03-18
申请人： SANYO ELECTRIC CO
发明人： MIHARA YOSHIKAZU , AWANO KIYOSHI , YUASA MASATOSHI
IPC分类号： H04H20/00 , H04N5/44 , H04N7/08 , H04N7/081 , H04N7/173
摘要： A digital broadcast receiver for realizing functions approximately corresponding to those of a VCR by utilizing a time shifting service broadcasting the same program on a plurality of channels which are time-shifted from one another in broadcasting the program by varying periods of delay time. For example in resuming viewing after an interruption of viewing on the desired one of the channels to realize the function of pause, the channel is determined the delay time of which relative to the channel initially viewed is greater than and most approximate to the interruption period, and the initial channel is automatically changed over to the channel thus determined.

3. 发明专利

DE69718695D1 未知
公开(公告)号：DE69718695D1
公开(公告)日：2003-03-06
申请号：DE69718695
申请日：1997-03-18
申请人： SANYO ELECTRIC CO
发明人： MIHARA YOSHIKAZU , AWANO KIYOSHI , YUASA MASATOSHI
IPC分类号： H04H20/00 , H04N5/44 , H04N7/08 , H04N7/081 , H04N7/173
摘要： A digital broadcast receiver for realizing functions approximately corresponding to those of a VCR by utilizing a time shifting service broadcasting the same program on a plurality of channels which are time-shifted from one another in broadcasting the program by varying periods of delay time. For example in resuming viewing after an interruption of viewing on the desired one of the channels to realize the function of pause, the channel is determined the delay time of which relative to the channel initially viewed is greater than and most approximate to the interruption period, and the initial channel is automatically changed over to the channel thus determined.

4. 发明公开

EP1441457A4 DIRECT CONVERSION RECEIVER 审中-公开
标题翻译：直接执行接收机
公开(公告)号：EP1441457A4
公开(公告)日：2010-10-20
申请号：EP02777966
申请日：2002-10-25
申请人： SANYO ELECTRIC CO
发明人： YUASA MASATOSHI , HIRAMATSU TATSUO , HANAFUSA SUMIO
IPC分类号： H04B1/30 , H04L27/26 , H04J11/00
CPC分类号： H04B1/0032 , H04B1/0003 , H04B1/30 , H04L27/2647

5. 发明专利

JP2003283458A Carrier discrimination method, carrier discrimination circuit, and automatic frequency tuning circuit capable of utilizing them 审中-公开
标题翻译：载波识别方法，载波分辨率电路和自动调频电路可以利用它们
公开(公告)号：JP2003283458A
公开(公告)日：2003-10-03
申请号：JP2002084265
申请日：2002-03-25
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： YOSHINAGA MASAYUKI , YUASA MASATOSHI , TANAKA GOJI
IPC分类号： H04J11/00 , H04L7/00
摘要： PROBLEM TO BE SOLVED: To provide a carrier discrimination method, a carrier discrimination circuit, and an automatic frequency tuning circuit capable of utilizing them for solving the prime tasks of developing a simplified and inexpensive OFDM receiver so that the terrestrial digital broadcasting adopting the OFDM system can be widespread. SOLUTION: A pilot signal extract section 46 in an automatic frequency tuning circuit 90 included in an OFDM demodulation section of an OFDM receiver extracts a pilot signal from each symbol, and a second AFC section 48 produces a control signal to suppress a frequency error on the basis of the pilot signal. A delay memory 108 stores the subcarriers to delay the data by one symbol. A discrimination section 106 places a limit on the frequency band of the subcarriers stored in the delay memory 108. A band storage section 112 stores the frequency band to be limited. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供载波识别方法，载波识别电路和自动频率调谐电路，其能够利用它们来解决开发简化且廉价的OFDM接收机的主要任务，从而采用地面数字广播 OFDM系统可以普及。解决方案：包括在OFDM接收器的OFDM解调部分中的自动频率调谐电路90中的导频信号提取部分46从每个符号提取导频信号，第二AFC部分48产生控制信号以抑制频率基于导频信号的误差。延迟存储器108存储子载波以将数据延迟一个符号。鉴别部分106对存储在延迟存储器108中的子载波的频带施加限制。频带存储部分112存储要限制的频带。版权所有（C）2004，JPO

6. 发明专利

JP2003264534A ERROR CORRECTION CIRCUIT 审中-公开
公开(公告)号：JP2003264534A
公开(公告)日：2003-09-19
申请号：JP2002062443
申请日：2002-03-07
申请人： SANYO ELECTRIC CO
发明人： YUASA MASATOSHI , KITA SACHIKAZU , SUZUKI SEIJI , TAMAI SEIJI
IPC分类号： H03M13/15 , H04L1/00
摘要： PROBLEM TO BE SOLVED: To provide an error correction circuit capable of performing prompt error correction processing with a relatively simple configuration in the case of partially receiving ground digital broadcasting. SOLUTION: This error correction circuit for decoding a difference set cyclic code used in both the partial receiving of ground digital broadcasting and the ground digital broadcasting and changing thresholds to perform correction processing n times (n is a natural number), is provided with a means for determining a threshold used for error correction and the number of correction processing times. COPYRIGHT: (C)2003,JPO

7. 发明专利

JP2001320345A OFDM-DEMODULATING DEVICE 失效
公开(公告)号：JP2001320345A
公开(公告)日：2001-11-16
申请号：JP2000141009
申请日：2000-05-12
申请人： SANYO ELECTRIC CO
发明人： YUASA MASATOSHI , IWASAKI TOSHIYA , UENO NOBUFUMI , SUZUKI SEIJI
IPC分类号： H04N5/455 , H03M13/25 , H03M13/27 , H03M13/29 , H03M13/41 , H04J11/00 , H04L1/00
摘要： PROBLEM TO BE SOLVED: To provide an OFDM-demodulating device in which memory capacity needed for deinterleaving is small. SOLUTION: Data subjected to Fourier transformation is first demapped, and the demapped data is subjected to the processing of frequency deinterleaving and time interleaving. Alternatively, the data subjected to Fourier transform is subjected to frequency deinterleaving, the data subjected to the frequency deinterleaving is demapped, and the demapped data is subjected to time deinterleaving. Information, showing the certainty of the value, is added to the data at the time of performing demapping and error correction is performed in later Viterbi decoding.

8. 发明专利

JP2001103025A DEVICE FOR CONVERTING DATA SEQUENCE 失效
公开(公告)号：JP2001103025A
公开(公告)日：2001-04-13
申请号：JP27992899
申请日：1999-09-30
申请人： SANYO ELECTRIC CO
发明人： FUJITA MASASHI , YUASA MASATOSHI , FUJINO NORIO
IPC分类号： H04N19/423 , H03M13/27 , H04J3/00 , H04L13/08 , H04N7/24 , H04N19/00 , H04N19/426 , H04N19/88 , H04N19/91
摘要： PROBLEM TO BE SOLVED: To provide a data sequence conversion device which needs only a small amount of memory capacity. SOLUTION: A deinterleaver 4 successively designates a read address found, according to a read address =(8 × write address MOD (-1624) +int (8 ×write address/1624) after writing the data code string of a 1st super frame with the same pattern as in the conventional manner in a memory 6, reads a data code from the memory area of the designated address in the first half period of one clock cycle period and writes a data code in the memory area in it latter half period. When there is a memory capacity for one super frame, it is sufficient that for the memory capacity this data sequence conversion device needs only half the memory capacity that is needed in the conventional cases.

9. 发明专利

JPH08289170A REMOTE CONTROL SYSTEM 失效
公开(公告)号：JPH08289170A
公开(公告)日：1996-11-01
申请号：JP11801895
申请日：1995-04-18
申请人： SANYO ELECTRIC CO
发明人： YUASA MASATOSHI
IPC分类号： H04N5/00
摘要： PURPOSE: To evade the collision of the remote control signal for a different equipment by transmitting the control code of a secondary remote control signal according to the no-code period between the plural control codes included in the remote control signal by the signal transmission unit of a CATV terminal equipment. CONSTITUTION: A CATV terminal equipment 2 receives the infrared ray rate control signal from a remote control transmitter by a light receiving part 21, an output signal is supplied from a light receiving block 51 to a signal transmission unit 5, a secondary remote control signal is prepared and the signal is transmitted as infrared ray from a module 4 to a VTR. After the waveform molding is performed for the remote control signal received by the light receiving part 21 in a block 51, digital signals are inputted in a control block 55 and a transmission block 56 via discriminating blocks 52, 53 and 54. When the control block 57 receiving the secondary remote control signal from the block 56 supplies the transmission code and the repeating code of the secondary remote control signal to the module 4, the control block 57 detects the no-code period between the repeating codes included in the remote control signal from a transmitter and controls transmission timing so as to transmit the transmission code and the repeating code of the secondary remote control signal for the no-code period.

10. 发明专利

JP2003264531A ERROR CORRECTION CIRCUIT 审中-公开
公开(公告)号：JP2003264531A
公开(公告)日：2003-09-19
申请号：JP2002062442
申请日：2002-03-07
申请人： SANYO ELECTRIC CO
发明人： YUASA MASATOSHI , KITA SACHIKAZU , SUZUKI SEIJI , TAMAI SEIJI
IPC分类号： H03M13/15 , H04L1/00
摘要： PROBLEM TO BE SOLVED: To provide an error correction circuit for reducing power consumption. SOLUTION: This error correction circuit for decoding a cyclic code and repeating error correction processing predetermined n times (n is a natural number of 2 or more) is provided with an operation stopping means for stopping (m+1)-th to n-th error correction processing operations when all errors are corrected by m-th (m is a natural number) error correction processing, which is less than the n times. As the operation stopping means, a means is used which stops the (m+1)-th to n-th error correction processing operations, for example, by stopping the supply of a clock to each circuit for performing error correction processing. COPYRIGHT: (C)2003,JPO

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