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1. 发明申请

WO2011075594A1 NON-VOLATILE MEMORY WITH MULTI-GEAR CONTROL USING ON-CHIP FOLDING OF DATA 审中-公开
标题翻译：使用片上数据折叠的多种控制的非易失性存储器
公开(公告)号：WO2011075594A1
公开(公告)日：2011-06-23
申请号：PCT/US2010/060844
申请日：2010-12-16
申请人： SANDISK CORPORATION , HUANG, Jianmin , AVILA, Chris , GAVENS, Lee M. , SPROUSE, Steven T. , GOROBETS, Sergey Anatolievich , HUTCHISON, Neil David
发明人： HUANG, Jianmin , AVILA, Chris , GAVENS, Lee M. , SPROUSE, Steven T. , GOROBETS, Sergey Anatolievich , HUTCHISON, Neil David
IPC分类号： G11C16/10 , G11C11/56
CPC分类号： G06F3/0608 , G06F3/0611 , G06F3/064 , G06F3/0679 , G06F12/0246 , G06F2212/7202 , G06F2212/7203 , G11C7/1042 , G11C11/5621 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C2211/5641 , G11C2211/5648
摘要： A memory system and methods of its operation are presented. The memory system includes a controller and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. The memory system receives data from the host and performs a binary write operation of the received data to the first section of the non-volatile memory circuit. The memory system subsequently folds portions of the data from the first section of the non-volatile memory to the second section of the non-volatile memory, wherein a folding operation includes reading the portions of the data from the first section rewriting it into the second section of the non-volatile memory using a multi-state programming operation. The controller determines to operate the memory system according to one of multiple modes. The modes include a first mode, where the binary write operations to the first section of the memory are interleaved with folding operations at a first rate, and a second mode, where the number of folding operations relative to the number of the binary write operations to the first section of the memory are performed at a higher than in the first mode. The memory system then operates according to determined mode. The memory system may also include a third mode, where folding operations are background operations executed when the memory system is not receiving data from the host.
摘要翻译：介绍了一种存储系统及其操作方法。存储器系统包括控制器和非易失性存储器电路，其中非易失性存储器电路具有数据以二进制格式存储的第一部分和第二部分，其中数据以多状态格式存储。存储器系统从主机接收数据，并且对所述非易失性存储器电路的第一部分执行所接收数据的二进制写操作。存储系统随后将数据的部分从非易失性存储器的第一部分折叠到非易失性存储器的第二部分，其中折叠操作包括从第一部分读取数据的部分，将数据重写成第二部分使用多状态编程操作的非易失性存储器的一部分。控制器根据多种模式之一确定操作存储器系统。这些模式包括第一模式，其中对存储器的第一部分的二进制写入操作以第一速率进行折叠操作和第二模式，其中相对于二进制写入操作的数量的折叠操作的数量存储器的第一部分在高于第一模式下执行。然后，存储器系统根据确定的模式进行操作。存储器系统还可以包括第三模式，其中折叠操作是当存储器系统未从主机接收数据时执行的背景操作。

2. 发明申请

WO2011075597A1 DATA TRANSFER FLOWS FOR ON-CHIP FOLDING 审中-公开
标题翻译：数据传输流程用于片上折叠
公开(公告)号：WO2011075597A1
公开(公告)日：2011-06-23
申请号：PCT/US2010/060855
申请日：2010-12-16
申请人： SANDISK CORPORATION , HUANG, Jianmin , AVILA, Chris , GAVENS, Lee M. , GOROBETS, Sergey Anatolievich , HUTCHISON, Neil David
发明人： HUANG, Jianmin , AVILA, Chris , GAVENS, Lee M. , GOROBETS, Sergey Anatolievich , HUTCHISON, Neil David
IPC分类号： G11C11/56 , G11C16/10 , G06F12/02
CPC分类号： G11C11/5628 , G06F12/0246 , G06F2212/7203 , G11C7/1042 , G11C16/10 , G11C2211/5641 , G11C2211/5643
摘要： A memory system and methods of its operation are presented. The memory system includes a volatile buffer memory and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. When writing data to the non-volatile memory, the data is received from a host, stored in the buffer memory, transferred from the buffer memory to into read/write registers of the non-volatile memory circuit, and then written from the read/write registers to the first section of the non-volatile memory circuit using a binary write operation. Portions of the data and then subsequently folded from the first section of the non-volatile memory to the second section of the non-volatile memory, where a folding operation includes reading the portions of the data from multiple locations in the first section into the read/write registers and performing a multi-state programming operation of the potions of the data from the read/write registers into a location the second section of the non-volatile memory. The multi-state programming operations include a first phase and a second phase and one or more of the binary write operations are performed between the phases of the multi-state programming operations.
摘要翻译：介绍了一种存储系统及其操作方法。存储器系统包括易失性缓冲存储器和非易失性存储器电路，其中非易失性存储器电路具有数据以二进制格式存储的第一部分，以及第二部分，状态格式。当将数据写入非易失性存储器时，将数据从存储在缓冲存储器中的主机接收，从缓冲存储器传送到非易失性存储器电路的读/写寄存器，然后从读/ 使用二进制写操作将寄存器写入非易失性存储器电路的第一部分。然后将数据的部分随后从非易失性存储器的第一部分折叠到非易失性存储器的第二部分，其中折叠操作包括将第一部分中的多个位置的数据的部分读入读取 /写入寄存器，并且将数据从读/写寄存器执行到多状态编程操作到非易失性存储器的第二部分的位置。多状态编程操作包括第一阶段和第二阶段，并且在多状态编程操作的阶段之间执行二进制写入操作中的一个或多个。

3. 发明申请

WO2011075572A1 MAINTAINING UPDATES OF MULTI-LEVEL NON-VOLATILE MEMORY IN BINARY NON-VOLATILE MEMORY 审中-公开
标题翻译：维持二级非易失性存储器中多级非易失性存储器的更新
公开(公告)号：WO2011075572A1
公开(公告)日：2011-06-23
申请号：PCT/US2010/060751
申请日：2010-12-16
申请人： SANDISK CORPORATION , GOROBETS, Sergey Anatolievich , WU, William S. , TRAISTER, Shai , LYASHUK, Alexander , SPROUSE, Steven, T.
发明人： GOROBETS, Sergey Anatolievich , WU, William S. , TRAISTER, Shai , LYASHUK, Alexander , SPROUSE, Steven, T.
IPC分类号： G11C11/56
CPC分类号： G11C11/5628 , G11C2211/5641 , G11C2211/5643
摘要： A method of operating a memory system is presented. The memory system includes a controller and a non-volatile memory circuit, where the non-volatile memory circuit has a first portion, where data is stored in a binary format, and a second portion, where data is stored in a multi-state format. The controller manages the transfer of data to and from the memory system and the storage of data on the non-volatile memory circuit. The method includes receiving a first set of data and storing this first set of data in a first location in the second portion of the non-volatile memory circuit. The memory system subsequently receives updated data for a first subset of the first data set. The updated data is stored in a second location in the first portion of the non-volatile memory circuit, where the controller maintains a logical correspondence between the second location and the first subset of the first set of data.
摘要翻译：提出了一种操作存储系统的方法。存储器系统包括控制器和非易失性存储器电路，其中非易失性存储器电路具有以二进制格式存储数据的第一部分和第二部分，其中数据以多状态格式存储。控制器管理到存储器系统和从存储器系统传送数据以及将数据存储在非易失性存储器电路上。该方法包括接收第一组数据并将该第一组数据存储在非易失性存储器电路的第二部分中的第一位置。存储器系统随后接收第一数据集的第一子集的更新数据。更新的数据被存储在非易失性存储器电路的第一部分中的第二位置，其中控制器维持第一组数据的第二位置和第一子集之间的逻辑对应关系。

4. 发明申请

WO2008045839A1 NON-VOLATILE MEMORY WITH WORST-CASE CONTROL DATA MANAGEMENT AND METHODS THEREFOR 审中-公开
标题翻译：具有恶劣情况控制数据管理的非易失性存储器及其方法
公开(公告)号：WO2008045839A1
公开(公告)日：2008-04-17
申请号：PCT/US2007/080725
申请日：2007-10-08
申请人： SANDISK CORPORATION , BENNETT, Alan David , HUTCHISON, Neil David , GOROBETS, Sergey Anatolievich
发明人： BENNETT, Alan David , HUTCHISON, Neil David , GOROBETS, Sergey Anatolievich
IPC分类号： G11C16/10 , G06F12/02
CPC分类号： G06F12/0246 , G06F12/0292 , G06F12/0866 , G06F2212/7202 , G06F2212/7205 , G11C16/105 , G11C16/349 , G11C16/3495 , Y02D10/13
摘要： In a nonvolatile memory with a block management system, data written to blocks include host write data and also system control data for managing the blocks. When a block is full or no longer accepting data, it is closed after valid versions of the data on it are relocated to another block in a rewrite operation. An improved pre-emptive rewrite scheme prevents a worst-case situation where multiple rewrites to occur at once when they happened to be full at the same time. Particularly, the scheduling of the pre-emptive rewrites for control data is based on a number of considerations including the time required for each control block rewrite and the time available for control block rewrites based on the configuration of the update blocks for storing host data, the time required in the foreground host operation and the host write latency.
摘要翻译：在具有块管理系统的非易失性存储器中，写入块的数据包括主机写入数据以及用于管理块的系统控制数据。当块已满或不再接受数据时，在重写操作中将其上的数据的有效版本重新定位到另一个块之后，它将被关闭。改进的优先重写方案可以防止在同时发生多次重写时立即发生多次重写的最坏情况。特别地，用于控制数据的优先重写的调度基于多个考虑因素，包括基于用于存储主机数据的更新块的配置，每个控制块重写所需的时间和可用于控制块重写的时间，前台主机操作所需的时间和主机写入延迟。

5. 发明申请

WO2012158341A1 NON-VOLATILE MEMORY AND METHOD WITH IMPROVED DATA SCRAMBLING 审中-公开
标题翻译：非易失性存储器和具有改进的数据扫描的方法
公开(公告)号：WO2012158341A1
公开(公告)日：2012-11-22
申请号：PCT/US2012/036015
申请日：2012-05-01
申请人： SANDISK TECHNOLOGIES INC. , HSU, Jonathan , AVILA, Chris Nga Yee , MAK, Alexander Kwok-Tung , GOROBETS, Sergey Anatolievich , KUO, Tien-chien , KOH, Yee Lih , WAN, Jun
发明人： HSU, Jonathan , AVILA, Chris Nga Yee , MAK, Alexander Kwok-Tung , GOROBETS, Sergey Anatolievich , KUO, Tien-chien , KOH, Yee Lih , WAN, Jun
IPC分类号： G11C16/34 , G06F12/14
CPC分类号： G11C16/3427 , G06F12/1408 , G11C7/1006 , G11C7/1012
摘要： A memory device cooperating with a memory controller scrambles each unit of data using a selected scrambling key before storing it in an array of nonvolatile memory cells. This helps to reduce program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. For a given page of data having a logical address and for storing at a physical address, the key is selected from a finite sequence thereof as a function of both the logical address and the physical address. In a block management scheme the memory array is organized into erase blocks, the physical address is the relative page number in each block. When logical address are grouped into logical groups and manipulated as a group and each group is storable into a sub-block, the physical address is the relative page number in the sub-block.
摘要翻译：与存储器控制器协作的存储器件在将其存储在非易失性存储器单元阵列之前，使用所选择的加密密钥对每个数据单元进行加扰。这有助于减少由特定数据模式的重复和长期存储引起的编程干扰，用户读取干扰和浮动栅极到浮动栅极耦合。对于具有逻辑地址并用于存储在物理地址的给定页面的数据，从作为逻辑地址和物理地址的函数的有限序列中选择密钥。在块管理方案中，存储器阵列被组织成擦除块，物理地址是每个块中的相对页号。当逻辑地址分组为逻辑组并作为组操作并且每个组可存储到子块中时，物理地址是子块中的相对页号。

6. 发明申请

WO2010078222A1 NON-VOLATILE MEMORY AND METHOD WITH WRITE CACHE PARTITIONING 审中-公开
标题翻译：非易失性存储器和写入缓存分区的方法
公开(公告)号：WO2010078222A1
公开(公告)日：2010-07-08
申请号：PCT/US2009/069535
申请日：2009-12-24
申请人： SANDISK CORPORATION , PALEY, Alexander , GOROBETS, Sergey Anatolievich , ZILBERMAN, Eugene , BENNETT, Alan David , TRAISTER, Shai , TOMLIN, Andrew , WU, William S. , SO, Bum Suck
发明人： PALEY, Alexander , GOROBETS, Sergey Anatolievich , ZILBERMAN, Eugene , BENNETT, Alan David , TRAISTER, Shai , TOMLIN, Andrew , WU, William S. , SO, Bum Suck
IPC分类号： G06F12/02 , G06F12/08
CPC分类号： G06F12/0246 , G06F12/0804 , G06F2212/1016 , G06F2212/7204 , G11C11/5628 , G11C2211/5641
摘要： A portion of a nonvolatile memory is partitioned from a main multi-level memory array to operate as a cache. The cache memory is configured to store at less capacity per memory cell and finer granularity of write units compared to the main memory. In a block-oriented memory architecture, the cache has multiple functions, not merely to improve access speed, but is an integral part of a sequential update block system. Decisions to write data to the cache memory or directly to the main memory or decisions to archive data from the cache memory to the main memory depend on the attributes and characteristics of the data to be written, the state of the blocks in the main memory portion and the state of the blocks in the cache portion. The cache memory has a capacity dynamically increased by allocation of blocks from the main memory in response to a demand to increase the capacity. Preferably, a block with an endurance count higher than average is allocated. The logical addresses of data are partitioned into zones to limit the size of the indices for the cache.
摘要翻译：将非易失性存储器的一部分从主多层存储器阵列分区以作为高速缓存进行操作。缓存存储器被配置为以比每个存储器单元更少的容量存储和与主存储器相比写入单元的更细粒度。在面向块的存储器架构中，缓存具有多个功能，而不仅仅是提高访问速度，而是顺序更新块系统的组成部分。将数据写入高速缓冲存储器或直接写入主存储器的决定或将数据从高速缓冲存储器归档到主存储器的决定取决于要写入的数据的属性和特性，主存储器部分中的块的状态以及高速缓存部分中的块的状态。响应于增加容量的需求，高速缓冲存储器具有通过从主存储器分配块而动态增加的容量。优选地，分配耐力计数高于平均值的块。数据的逻辑地址被划分为区域以限制高速缓存的索引的大小。

7. 发明申请

WO2008147752A1 MANAGING HOUSEKEEPING OPERATIONS IN FLASH MEMORY 审中-公开
标题翻译：管理闪存中的住宅操作
公开(公告)号：WO2008147752A1
公开(公告)日：2008-12-04
申请号：PCT/US2008/064123
申请日：2008-05-19
申请人： SANDISK CORPORATION , GOROBETS, Sergey Anatolievich
发明人： GOROBETS, Sergey Anatolievich
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/1016 , G06F2212/1036 , G06F2212/7211
摘要： A flash re-programmable, non-volatile memory system is operated to disable foreground execution of housekeeping operations, such as wear leveling and data scrub, in the when operation of the host would be excessively slowed as a result. One or more characteristics of patterns of activity of the host are monitored by the memory system in order to determine when housekeeping operations may be performed without significantly degrading the performance of the memory system, particularly during writing of data from the host into the memory.
摘要翻译：操作闪存可重新编程的非易失性存储器系统，以在主机的操作过程将会过慢时，禁止前端执行内务管理操作（例如损耗均衡和数据擦除）。主机的活动模式的一个或多个特征由存储器系统监视，以便确定何时可执行内部管理操作而不显着降低存储器系统的性能，特别是在将数据从主机写入存储器期间。

8. 发明申请

WO2005119693A3 CONFIGURABLE READY/BUSY CONTROL 审中-公开
公开(公告)号：WO2005119693A3
公开(公告)日：2005-12-15
申请号：PCT/US2005/017770
申请日：2005-05-20
申请人： SANDISK CORPORATION , SMITH, Peter John , GOROBETS, Sergey Anatolievich
发明人： SMITH, Peter John , GOROBETS, Sergey Anatolievich
IPC分类号： G11C16/10 , G06F13/16
摘要： A memory unit has a busy control system that includes a busy control register that may be written by a controller. The contents of the busy control register determine whether a signal is sent from the memory unit to the controller and, if so, which of a plurality of signals is sent. A signal may automatically be sent from a selected memory unit and masked from an unselected unit.

9. 发明申请

WO2005066964A2 NON-VOLATILE MEMORY AND METHOD WITH PHASED PROGRAM FAILURE HANDLING 审中-公开
标题翻译：非易失性存储器和具有相位程序故障处理的方法
公开(公告)号：WO2005066964A2
公开(公告)日：2005-07-21
申请号：PCT/US2004/043597
申请日：2004-12-22
申请人： SANDISK CORPORATION , GOROBETS, Sergey Anatolievich
发明人： GOROBETS, Sergey Anatolievich
IPC分类号： G11C
CPC分类号： G06F11/0793 , G06F11/073 , G06F12/0246 , G06F2212/7205
摘要： In a memory with block management system, program failure in a block during a time-critical memory operation is handled by continuing the programming operation in a breakout block. Later, at a less critical time, the data recorded in the failed block prior to the interruption is transferred to another block, which could also be the breakout block. The failed block can then be discarded. In this way, when a defective block is encountered during programming, it can be handled without loss of data and without exceeding a specified time limit by having to transfer the stored data in the defective block on the spot. This error handling is especially critical for a garbage collection operation so that the entire operation need not be repeated on a fresh block during a critical time. Subsequently, at an opportune time, the data from the defective block can be salvaged by relocation to another block.
摘要翻译：在具有块管理系统的存储器中，在时间要求严格的存储器操作期间，通过继续在突破块中编程操作来处理程序块中的程序故障。之后，在不太关键的时间，在中断之前记录在故障块中的数据被传送到另一个块，该块也可以是分支块。然后可以丢弃失败的块。通过这种方式，当在编程过程中遇到有缺陷的块时，可以在不丢失数据的情况下处理它，并且不会在超过规定的时间限制的情况下通过现场传送存储在有缺陷块中的数据。这种错误处理对于垃圾收集操作尤其重要，以便在关键时间内不需要在新块上重复整个操作。随后，在适当的时候，来自缺陷块的数据可以通过重新定位到另一个块来挽救。

10. 发明申请

WO2006065575A1 NON-VOLATILE MEMORY AND METHOD WITH MULTI-STREAM UPDATE TRACKING 审中-公开
标题翻译：非易失性存储器和方法与多流程更新跟踪
公开(公告)号：WO2006065575A1
公开(公告)日：2006-06-22
申请号：PCT/US2005/044001
申请日：2005-12-05
申请人： SANDISK CORPORATION , GOROBETS, Sergey Anatolievich , SMITH, Peter John , BENNETT, Alan David
发明人： GOROBETS, Sergey Anatolievich , SMITH, Peter John , BENNETT, Alan David
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/1032 , G06F2212/7203
摘要： Update data to a non-volatile memory may be recorded in at least two interleaving streams such as either into an update block or a scratch pad block depending on a predetermined condition. The scratch pad block is used to buffered update data that are ultimately destined for the update block. Synchronization information about the order recording of updates among the streams is saved with at least one of the streams. This will allow the most recently written version of data that may exist on multiple memory blocks to be identified. In one embodiment, the synchronization information is saved in a first block and is a write pointer that points to the next recording location in a second block. In another embodiment, the synchronization information is a time stamp.
摘要翻译：根据预定条件，将数据更新到非易失性存储器可以记录在至少两个交织流中，诸如更新块或便笺块块中。缓冲块块用于缓冲最终发往更新块的更新数据。与流中的更新的顺序记录的同步信息与至少一个流一起被保存。这将允许识别可能存在于多个内存块上的最新版本的数据。在一个实施例中，同步信息被保存在第一块中，并且是指向第二块中的下一个记录位置的写指针。在另一个实施例中，同步信息是时间戳。

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