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1. 发明申请

WO2010057842A1 PREPARING A SURFACE OF A SAPPHIRE SUBSTRATE FOR FABRICATING HETEROSTRUCTURES 审中-公开
标题翻译：制备SAPPHIRE底物的表面以制备异体结构
公开(公告)号：WO2010057842A1
公开(公告)日：2010-05-27
申请号：PCT/EP2009/065202
申请日：2009-11-16
申请人： S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES , GAUDIN, Gweltaz , KENNARD, Mark , PICCIN, Matteo , RADU, Ionut , VAUFREDAZ, Alexandre
发明人： GAUDIN, Gweltaz , KENNARD, Mark , PICCIN, Matteo , RADU, Ionut , VAUFREDAZ, Alexandre
IPC分类号： H01L21/18 , H01L21/762
CPC分类号： H01L21/76256 , H01L21/187
摘要： The invention relates to a method of fabricating a heterostructure comprising at least a first substrate (120) made of sapphire and a second substrate (110) made of a material having a coefficient of thermal expansion that is different from that of the first substrate, the method including a step (S6) of molecular bonding the second substrate (110) on the first substrate (120) made of sapphire. In accordance with the invention, the method includes, prior to bonding the two substrates together, a step (S1) of stoving the first substrate (120) at a temperature that lies in the range 100°C to 500°C.
摘要翻译：本发明涉及一种制造异质结构的方法，该方法至少包括由蓝宝石制成的第一衬底（120）和由具有不同于第一衬底的热膨胀系数的材料制成的第二衬底（110）方法包括在由蓝宝石制成的第一衬底（120）上分层结合第二衬底（110）的步骤（S6）。根据本发明，该方法包括在将两个基板结合在一起之前，将步骤（S1）在位于100℃至500℃范围内的温度下烘烤第一基板（120）。

2. 发明申请

WO2010057941A1 A METHOD OF PRODUCING A SILICON-ON-SAPPHIRE TYPE HETEROSTRUCTURE. 审中-公开
标题翻译：一种生产硅胶类型结构的方法。
公开(公告)号：WO2010057941A1
公开(公告)日：2010-05-27
申请号：PCT/EP2009/065440
申请日：2009-11-19
申请人： S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES , GAUDIN, Gweltaz , VAUFREDAZ, Alexandre , GUITTARD, Fleur
发明人： GAUDIN, Gweltaz , VAUFREDAZ, Alexandre , GUITTARD, Fleur
IPC分类号： H01L21/762
CPC分类号： H01L21/76256 , H01L21/2007
摘要： The invention provides a method of producing a heterostructure of the silicon-on-sapphire type, comprising bonding an SOI substrate (110) onto a sapphire substrate (120) and thinning the SOI substrate, thinning being carried out by grinding followed by etching of the SOI substrate (110). In accordance with the method, grinding is carried out using a wheel (210) with a grinding surface (211) that comprises abrasive particles having a mean dimension of more than 6.7 urn; further, after grinding and before etching, said method comprises a step of post-grinding annealing of the heterostructure carried out at a temperature in the range 150 °C to 170 °C.
摘要翻译：本发明提供了一种制造蓝宝石型的异质结构的方法，包括将SOI衬底（110）接合到蓝宝石衬底（120）上并使SOI衬底变薄，通过研磨进行稀化，然后蚀刻 SOI衬底（110）。根据该方法，使用具有包括平均尺寸大于6.7μm的磨料颗粒的研磨表面（211）的轮（210）进行研磨; 此外，在研磨之后和蚀刻之前，所述方法包括在150℃至170℃的温度范围内对异质结构进行后磨削退火的步骤。

3. 发明申请

WO2007060145A1 PROCESS AND EQUIPMENT FOR BONDING BY MOLECULAR ADHESION 审中-公开
标题翻译：通过分子粘合结合的方法和设备
公开(公告)号：WO2007060145A1
公开(公告)日：2007-05-31
申请号：PCT/EP2006/068647
申请日：2006-11-20
申请人： S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES , KERDILES, Sébastien , DURET, Carine , VAUFREDAZ, Alexandre
发明人： KERDILES, Sébastien , DURET, Carine , VAUFREDAZ, Alexandre
IPC分类号： H01L21/762
CPC分类号： C03C27/00 , C03C27/02 , C03C27/046 , C03C2204/08 , H01L21/2007 , H01L21/76251 , H01L2224/75251 , H01L2224/83002 , H01L2924/1461 , Y10T156/10 , Y10T156/17 , H01L2924/00
摘要： The invention relates in a first aspect to a process for bonding by molecular adhesion of two substrates to one another during which the surfaces of said substrates are placed in close contact and bonding occurs by propagation of a bonding front between said substrates, characterised in that it comprises prior to bonding a step consisting of modifying the surface state of one and/or the other of said substrates so as to regulate the propagation speed of the bonding front. The surface state is modified by locally or uniformly heating the surface of one and/or the other of the substrates to be bonded, or again by roughing the surface of one and/or the other of the substrates.
摘要翻译：本发明在第一方面涉及一种通过两个基板的分子粘合而彼此粘合的方法，在该方法中，所述基板的表面被紧密接触放置，并且通过在所述基板之间的接合前沿的传播而发生粘合，其特征在于，包括在结合由修改所述基板中的一个和/或另一个的表面状态组成的步骤，以调节接合前沿的传播速度。表面状态通过局部或均匀地加热待接合的一个和/或另一个基底的表面，或者再次通过粗糙化一个和/或另一个基底的表面来进行修饰。

4. 发明公开

EP2359391A1 PREPARING A SURFACE OF A SAPPHIRE SUBSTRATE FOR FABRICATING HETEROSTRUCTURES 审中-公开
标题翻译：准备SAPHIERSUBSTRATS的表面异质结构的生产
公开(公告)号：EP2359391A1
公开(公告)日：2011-08-24
申请号：EP09749151.8
申请日：2009-11-16
申请人： S.O.I.Tec Silicon on Insulator Technologies
发明人： GAUDIN, Gweltaz , KENNARD, Mark , PICCIN, Matteo , RADU, Ionut , VAUFREDAZ, Alexandre
IPC分类号： H01L21/18 , H01L21/762
CPC分类号： H01L21/76256 , H01L21/187
摘要： The invention relates to a method of fabricating a heterostructure comprising at least a first substrate (120) made of sapphire and a second substrate (110) made of a material having a coefficient of thermal expansion that is different from that of the first substrate, the method including a step (S6) of molecular bonding the second substrate (110) on the first substrate (120) made of sapphire. In accordance with the invention, the method includes, prior to bonding the two substrates together, a step (S1) of stoving the first substrate (120) at a temperature that lies in the range 100°C to 500°C.

5. 发明公开

EP1964166A1 PROCESS AND EQUIPMENT FOR BONDING BY MOLECULAR ADHESION 有权转让
标题翻译：受理并分子键合
公开(公告)号：EP1964166A1
公开(公告)日：2008-09-03
申请号：EP06819601.3
申请日：2006-11-20
申请人： S.O.I.Tec Silicon on Insulator Technologies
发明人： KERDILES, Sébastien , DURET, Carine , VAUFREDAZ, Alexandre
IPC分类号： H01L21/762
CPC分类号： C03C27/00 , C03C27/02 , C03C27/046 , C03C2204/08 , H01L21/2007 , H01L21/76251 , H01L2224/75251 , H01L2224/83002 , H01L2924/1461 , Y10T156/10 , Y10T156/17 , H01L2924/00
摘要： The invention relates in a first aspect to a process for bonding by molecular adhesion of two substrates to one another during which the surfaces of said substrates are placed in close contact and bonding occurs by propagation of a bonding front between said substrates, characterised in that it comprises prior to bonding a step consisting of modifying the surface state of one and/or the other of said substrates so as to regulate the propagation speed of the bonding front. The surface state is modified by locally or uniformly heating the surface of one and/or the other of the substrates to be bonded, or again by roughing the surface of one and/or the other of the substrates.

6. 发明申请

WO2012000907A1 A METHOD OF TREATING A MULTILAYER STRUCTURE WITH HYDROFLUORIC ACID 审中-公开
标题翻译：一种用氢氟酸处理多层结构的方法
公开(公告)号：WO2012000907A1
公开(公告)日：2012-01-05
申请号：PCT/EP2011/060643
申请日：2011-06-24
申请人： SOITEC , VAUFREDAZ, Alexandre , GUITTARD, Fleur
发明人： VAUFREDAZ, Alexandre , GUITTARD, Fleur
IPC分类号： H01L21/762
CPC分类号： H01L21/76256 , H01L21/30608 , H01L21/31111 , H01L21/76254
摘要： The invention provides a method of treating a multilayer structure (211), the multilayer structure (211) comprising a wafer (208) bonded to a substrate (210) at a bonding interface, a bonding oxide layer (206) being disposed between the wafer (208) and the substrate (210), the method comprising at least one step of chemically etching the wafer (208), the method further comprising, before the chemical etching step, a step of partially deoxidizing the bonding oxide layer (206) of the multilayer structure (211) by hydrofluoric acid chemical etching in order to eliminate a peripheral portion of the bonding oxide layer (206).
摘要翻译：本发明提供了一种处理多层结构（211）的方法，所述多层结构（211）包括在接合界面处与衬底（210）结合的晶片（208），接合氧化物层（206）设置在晶片（208）和衬底（210），所述方法包括化学蚀刻晶片（208）的至少一个步骤，所述方法还包括在所述化学蚀刻步骤之前，将所述接合氧化物层（206）部分地脱氧所述多层结构（211）通过氢氟酸化学蚀刻以消除所述接合氧化物层（206）的周边部分。

7. 发明申请

WO2011134896A2 TRIMMING THINNING 审中-公开
标题翻译：修剪薄
公开(公告)号：WO2011134896A2
公开(公告)日：2011-11-03
申请号：PCT/EP2011/056444
申请日：2011-04-21
申请人： S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES , VAUFREDAZ, Alexandre , BROEKAART, Marcel , CASTEX, Arnaud
发明人： VAUFREDAZ, Alexandre , BROEKAART, Marcel , CASTEX, Arnaud
IPC分类号： H01L21/304 , H01L27/146 , H01L21/762 , H01L21/86 , H01L21/98
CPC分类号： H01L21/304
摘要： A method of producing a heterostructure, the method comprising bonding a first wafer (110) to a second wafer (120) and a step of thinning the first wafer (110) carried out at least by grinding using a wheel (150) having its working surface (152) in contact with the exposed surface (113a) of the first wafer (110). The working surface (152) of the wheel (150) comprises abrasive particles with a mean dimension of 44 micrometers or less or 325 mesh or more. The rate of descent of the wheel (150) during the grinding step is reduced to at least 1 μm/sec when the working surface (152) of the wheel is at a distance of at least 250 μm from the bonding interface between the first and second wafers, the grinding step at 1 μm/sec being continued until the working surface (152) of the wheel (150) is at a distance from said bonding interface of 35 μm or less.
摘要翻译：一种制造异质结构的方法，所述方法包括将第一晶片（110）接合到第二晶片（120），以及至少通过使用具有其工作的轮（150）进行研磨而进行的第一晶片（110）的薄化步骤表面（152）与第一晶片（110）的暴露表面（113a）接触。轮（150）的工作表面（152）包括平均尺寸为44微米或更小或325目以上的磨料颗粒。当车轮的工作表面（152）距离第一和第二与第二和第二接合面之间的接合界面至少为250μm的距离时，研磨步骤期间车轮（150）的下降速率降低至少至少1微米/秒第二晶片，继续研磨步骤为1μm/ sec，直到车轮（150）的工作表面（152）距离所述接合界面一定距离为35μm或更小。

8. 发明申请

WO2012059350A2 A METHOD OF TREATING A MULTILAYER STRUCTURE 审中-公开
标题翻译：一种处理多层结构的方法
公开(公告)号：WO2012059350A2
公开(公告)日：2012-05-10
申请号：PCT/EP2011/068502
申请日：2011-10-24
申请人： SOITEC , VAUFREDAZ, Alexandre
发明人： VAUFREDAZ, Alexandre
IPC分类号： H01L21/302 , H01L21/762 , H01L21/463 , H01L21/465
CPC分类号： H01L21/302 , H01L21/304 , H01L21/30608 , H01L21/76256
摘要： The invention provides a method of treating a multilayer structure (211), comprising a wafer (208) bonded to a substrate (210), the wafer comprising at least one upper layer (202), a lower layer (201) and a buried oxide layer (204) disposed between the upper layer and the lower layer, a bonding oxide layer (206a) also being disposed between the wafer and the substrate, the method comprising a subsequent step of chemical etching of the wafer and, before said subsequent chemical etching step, the following steps in succession; • partial mechanical trimming of the upper layer; • a first preliminary chemical etch; • a first partial deoxidation using a chemical etch with hydrofluoric acid; and • a second preliminary chemical etch; and a second partial deoxidation using a chemical etch with hydrofluoric acid.
摘要翻译：本发明提供了一种处理多层结构（211）的方法，该方法包括结合到衬底（210）的晶片（208），该晶片包括至少一个上层（202），下层（201）以及设置在所述上层与所述下层之间的埋入氧化物层（204），还在所述晶片与所述衬底之间设置有键合氧化物层（206a），所述方法包括化学蚀刻在所述后续化学蚀刻步骤之前，依次进行以下步骤; •上层的部分机械修剪; •第一次初步化学蚀刻; •使用氢氟酸进行化学蚀刻的第一次部分脱氧; 和•第二次初步化学蚀刻; 并使用氢氟酸进行化学蚀刻进行第二次部分脱氧。

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