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    • 1. 发明授权
    • Testing apparatus for electrical characteristics of sheet-like
insulating materials
    • 板状绝缘材料的电气特性试验装置
    • US4583040A
    • 1986-04-15
    • US594625
    • 1984-03-22
    • Ryosuke HataMasayuki HiroseTakeshi NagaiKunitomo KatoKenjiro Osaki
    • Ryosuke HataMasayuki HiroseTakeshi NagaiKunitomo KatoKenjiro Osaki
    • G01R31/12G01R31/16G01R31/18H01B17/56
    • G01R31/1263G01R31/16
    • A testing chamber for electrically testing a sample of insulating material or materials in sheet form, under controllable conditions of pressure and temperature. The pressure resistant chamber is air and liquid tight to permit testing of oil impregnated samples unexposed to harmful air. A frame is positioned within the chamber. A supply reel storing a test sample of insulating material or materials and a takeup reel for receiving the test sample drawn from the supply reel are both rotatably mounted on the frame. The supply and takeup reels are separated from each other to form a testing station therebetween. A shaft with a handle is attached to the takeup reel and extends out of the chamber to facilitate rotation of the takeup reel whereby the test sample may be removed from the supply reel to the testing station and then to the takeup reel. First and second electrodes are connected, respectively, to the high and low voltage terminals of a power supply. Position and pressure producing means are operatively connected to at least one of the electrodes to control the spacing between the electrodes and the pressure applied to the test sample by the electrodes.
    • 用于在可控制的压力和温度条件下电绝缘材料样品或片状材料的试验室。 耐压室是空气和液体密封的,以允许对暴露于有害空气的油浸样品进行测试。 框架位于室内。 存储绝缘材料或材料的测试样品的供应卷轴和用于接收从供带盘抽出的测试样品的卷取卷轴都可旋转地安装在框架上。 供应卷取卷轴彼此分离以在它们之间形成测试台。 具有把手的轴连接到收紧卷轴并延伸出室以便于卷取卷轴的旋转,从而测试样品可以从供应卷轴移除到测试站,然后到卷绕卷轴。 第一和第二电极分别连接到电源的高低压端子。 位置和压力​​产生装置可操作地连接到至少一个电极以控制电极之间的间隔和通过电极施加到测试样品的压力。
    • 4. 发明授权
    • Semiconductor device and method of forming the same
    • 半导体器件及其形成方法
    • US08395197B2
    • 2013-03-12
    • US12961252
    • 2010-12-06
    • Takeshi Nagai
    • Takeshi Nagai
    • H01L27/108H01L29/76H01L29/94H01L31/119H01L31/062H01L31/113
    • H01L27/10894H01L21/823412H01L21/823418H01L27/10873H01L27/10876H01L29/4236H01L29/6659H01L29/66621H01L29/66628H01L29/7834
    • A semiconductor device includes a gate electrode on a gate insulating film over a semiconductor substrate, a first sidewall insulating film on a side surface of the gate electrode, and source and drain regions, each including a pocket diffusion layer of a first conductivity type, and first and second diffusion layers of a second conductivity type. The pocket diffusion layer is disposed in the semiconductor substrate. The first diffusion layer of a second conductivity type extends over the pocket diffusion layer. The first diffusion layer faces toward the gate electrode through the first sidewall insulating film. The second diffusion layer over the first diffusion layer is higher in impurity concentration than the first diffusion layer. The second diffusion layer is separated by the first diffusion layer from the pocket diffusion layer, and has a side surface which faces toward the first sidewall insulating film through the first diffusion layer.
    • 半导体器件包括在半导体衬底上的栅极绝缘膜上的栅电极,栅电极的侧表面上的第一侧壁绝缘膜,以及源极和漏极区,每个包括第一导电类型的穴扩散层,以及 第二导电类型的第一和第二扩散层。 该袋扩散层设置在半导体衬底中。 第二导电类型的第一扩散层在袋扩散层上延伸。 第一扩散层通过第一侧壁绝缘膜朝向栅电极。 第一扩散层上的第二扩散层的杂质浓度高于第一扩散层。 第二扩散层通过第一扩散层从袋扩散层分离,并且具有通过第一扩散层面向第一侧壁绝缘膜的侧表面。
    • 8. 发明授权
    • Semiconductor memory in which error correction is performed by on-chip error correction circuit
    • 半导体存储器,其中通过片上纠错电路进行纠错
    • US07610542B2
    • 2009-10-27
    • US11454007
    • 2006-06-16
    • Takeshi Nagai
    • Takeshi Nagai
    • G11C29/00
    • G11C7/1039G06F11/1008G11C7/1006G11C11/4096G11C2029/0411G11C2207/104
    • A synchronous semiconductor memory which performs a pipeline operation includes an error correction circuit, an output circuit, and first and second write circuits. The first write circuit is configured to overwrite at least a portion of externally input write data on data read out from a memory cell and corrected by the error correction circuit, and write the overwritten data in the memory cell. The output circuit is configured to output the overwritten data outside a chip. The second write circuit is configured to reoverwrite at least a portion of write data which is externally input at a different time on the overwritten data, encode the reoverwritten data, and write the encoded data in the memory cell.
    • 执行流水线操作的同步半导体存储器包括纠错电路,输出电路以及第一和第二写入电路。 第一写入电路被配置为覆盖从存储器单元读出并由纠错电路校正的数据的外部输入写入数据的至少一部分,并将重写的数据写入存储单元。 输出电路被配置为输出芯片外部的重写数据。 第二写入电路被配置为重新写入写入数据的至少一部分,该写入数据在重写的数据上以不同的时间被外部输入,对重写的数据进行编码,并将编码的数据写入存储单元。