专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08343813B2 Resistive-switching memory elements having improved switching characteristics 有权
公开(公告)号：US08343813B2
公开(公告)日：2013-01-01
申请号：US12705474
申请日：2010-02-12
申请人： Ronald John Kuse , Imran Hashim , Tony Chiang
发明人： Ronald John Kuse , Imran Hashim , Tony Chiang
IPC分类号： H01L21/332 , H01L45/00
CPC分类号： H01L45/146 , H01L27/2409 , H01L27/2481 , H01L45/085 , H01L45/10 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/1616 , H01L45/1641
摘要： Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode comprising hafnium oxide and having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a material including metal titanium and having a second thickness that is less than 25 percent of the first thickness.

2. 发明申请

US20100258782A1 RESISTIVE-SWITCHING MEMORY ELEMENTS HAVING IMPROVED SWITCHING CHARACTERISTICS 有权
标题翻译：具有改进的开关特性的电阻开关存储元件
公开(公告)号：US20100258782A1
公开(公告)日：2010-10-14
申请号：US12705474
申请日：2010-02-12
申请人： Ronald John Kuse , Imran Hashim , Tony Chiang
发明人： Ronald John Kuse , Imran Hashim , Tony Chiang
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L45/146 , H01L27/2409 , H01L27/2481 , H01L45/085 , H01L45/10 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/1616 , H01L45/1641
摘要： Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode comprising hafnium oxide and having a first thickness, and a coupling layer between the switching layer and the second electrode, the coupling layer comprising a material including metal titanium and having a second thickness that is less than 25 percent of the first thickness.
摘要翻译：描述了具有改进的开关特性的电阻式开关存储元件，包括具有第一电极和第二电极的存储元件，第一电极和第二电极之间的开关层，包括氧化铪并具有第一厚度，以及耦合层，所述开关层和所述第二电极，所述耦合层包括包含金属钛并且具有小于所述第一厚度的25％的第二厚度的材料。

3. 发明授权

US08681530B2 Nonvolatile memory device having a current limiting element 有权
标题翻译：具有限流元件的非易失性存储器件
公开(公告)号：US08681530B2
公开(公告)日：2014-03-25
申请号：US13353000
申请日：2012-01-18
申请人： Yun Wang , Imran Hashim , Tony Chiang
发明人： Yun Wang , Imran Hashim , Tony Chiang
IPC分类号： G11C11/00 , H01L29/02
CPC分类号： H01L45/1253 , G11C13/0007 , G11C13/003 , G11C2213/56 , G11C2213/76 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/08 , H01L45/12 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/148 , H01L45/1616
摘要： Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. In one embodiment, the current limiting component comprises at least one layer of resistive material that is configured to improve the switching performance and lifetime of the formed resistive switching memory element. The electrical properties of the formed current limiting layer, or resistive layer, are configured to lower the current flow through the variable resistance layer during the logic state programming steps (i.e., “set” and “reset” steps) by adding a fixed series resistance in the formed resistive switching memory element found in the nonvolatile memory device.
摘要翻译：本发明的实施例通常包括一种形成非易失性存储器件的方法，该非易失性存储器件包含由于添加限定在其中的限流部件而具有改进的器件切换性能和寿命的电阻式开关存储元件。在一个实施例中，限流部件包括至少一层电阻材料，其被配置为提高所形成的电阻式开关存储元件的开关性能和寿命。所形成的限流层或电阻层的电性能被配置为在逻辑状态编程步骤（即“设定”和“复位”步骤）期间通过添加固定的串联电阻来降低通过可变电阻层的电流在形成在非易失性存储器件中的电阻式开关存储元件中。

4. 发明申请

US20140078808A1 Embedded Nonvolatile Memory Elements Having Resistive Switching Characteristics 有权
标题翻译：具有电阻开关特性的嵌入式非易失性存储器元件
公开(公告)号：US20140078808A1
公开(公告)日：2014-03-20
申请号：US13621371
申请日：2012-09-17
申请人： Imran Hashim , Tony Chiang , Vidyut Gopal , Yun Wang
发明人： Imran Hashim , Tony Chiang , Vidyut Gopal , Yun Wang
IPC分类号： H01L27/24 , G11C11/21
CPC分类号： H01L45/1608 , G11C13/0007 , G11C13/0069 , G11C2213/32 , G11C2213/51 , G11C2213/52 , G11C2213/74 , G11C2213/79 , H01L27/2436 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/146
摘要： Provided are nonvolatile memory assemblies each including a resistive switching layer and current steering element. The steering element may be a transistor connected in series with the switching layer. Resistance control provided by the steering element allows using switching layers requiring low switching voltages and currents. Memory assemblies including such switching layers are easier to embed into integrated circuit chips having other low voltage components, such as logic and digital signal processing components, than, for example, flash memory requiring much higher switching voltages. In some embodiments, provided nonvolatile memory assemblies operate at switching voltages less than about 3.0V and corresponding currents less than 50 microamperes. A memory element may include a metal rich hafnium oxide disposed between a titanium nitride electrode and doped polysilicon electrode. One electrode may be connected to a drain or source of the transistor, while another electrode is connected to a signal line.
摘要翻译：提供了各自包括电阻式开关层和电流控制元件的非易失性存储器组件。转向元件可以是与开关层串联连接的晶体管。由转向元件提供的电阻控制允许使用需要低开关电压和电流的开关层。包括这种开关层的存储器组件比例如需要高得多的开关电压的闪速存储器更容易嵌入到具有其它低电压组件（例如逻辑和数字信号处理组件）的集成电路芯片中。在一些实施例中，所提供的非易失性存储器组件在小于约3.0V的开关电压和小于50微安的相应电流下工作。存储元件可以包括设置在氮化钛电极和掺杂多晶硅电极之间的富含金属的氧化铪。一个电极可以连接到晶体管的漏极或源极，而另一个电极连接到信号线。

5. 发明申请

US20130107604A1 Method for Forming Resistive Switching Memory Elements with Improved Switching Behavior 有权
标题翻译：用于形成具有改进的开关行为的电阻式开关存储元件的方法
公开(公告)号：US20130107604A1
公开(公告)日：2013-05-02
申请号：US13281777
申请日：2011-10-26
申请人： Yun Wang , Tony Chiang , Imran Hashim , Vidyut Gopal
发明人： Yun Wang , Tony Chiang , Imran Hashim , Vidyut Gopal
IPC分类号： G11C11/00 , G01N27/00 , H01L21/8239
CPC分类号： H01L45/06 , H01L45/065 , H01L45/1233 , H01L45/146 , H01L45/1641
摘要： Methods for producing RRAM resistive switching elements having optimal switching behavior include crystalline phase structural changes. Structural changes indicative of optimal switching behavior include hafnium oxide phases in an interfacial region between a resistive switching layer and an electrode.
摘要翻译：具有最佳切换行为的RRAM电阻式开关元件的制造方法包括晶相结构变化。指示最佳切换行为的结构变化包括在电阻式开关层和电极之间的界面区域中的氧化铪相。

6. 发明申请

US20120313069A1 WORK FUNCTION TAILORING FOR NONVOLATILE MEMORY APPLICATIONS 有权
标题翻译：用于非易失性存储器应用的工作功能定制
公开(公告)号：US20120313069A1
公开(公告)日：2012-12-13
申请号：US13156624
申请日：2011-06-09
申请人： Yun Wang , Tony Chiang , Imran Hashim
发明人： Yun Wang , Tony Chiang , Imran Hashim
IPC分类号： H01L47/00
CPC分类号： H01L45/1608 , H01L27/2463 , H01L45/04 , H01L45/065 , H01L45/10 , H01L45/12 , H01L45/1233 , H01L45/146 , H01L45/16 , H01L45/1616 , H01L45/1633 , H01L45/1641
摘要： Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.
摘要翻译：本发明的实施例一般涉及具有设置在至少一个电极和形成在非易失性存储器件中的可变电阻层之间的界面层结构的电阻式开关非易失性存储器件及其形成方法。通常，电阻式开关存储器元件可以形成为可用于各种电子设备（例如数码相机，移动电话，手持式计算机和音乐播放器）的大容量非易失性存储器集成电路的一部分。在电阻式开关非易失性存储器件的一种结构中，界面层结构包括钝化区域，界面耦合区域和/或可变电阻层接口区域，其被配置为调整非易失性存储器件的性能，例如降低形成器件的开关电流并降低器件的成型电压，并降低从一个成形器件到另一个器件的性能变化。

7. 发明申请

US20100001269A1 Methods of Combinatorial Processing for Screening Multiple Samples on a Semiconductor Substrate 有权
标题翻译：在半导体基板上筛选多个样品的组合处理方法
公开(公告)号：US20100001269A1
公开(公告)日：2010-01-07
申请号：US12167118
申请日：2008-07-02
申请人： Gaurav Verma , Kurt Weiner , Prashant Phatak , Imran Hashim , Sandra Malhotra , Tony Chiang
发明人： Gaurav Verma , Kurt Weiner , Prashant Phatak , Imran Hashim , Sandra Malhotra , Tony Chiang
IPC分类号： C23C16/00 , H01L21/66 , H01L23/58
CPC分类号： G01R31/2831 , G01R31/2834 , H01L22/34
摘要： In embodiments of the current invention, methods of combinatorial processing and a test chip for use in these methods are described. These methods and test chips enable the efficient development of materials, processes, and process sequence integration schemes for semiconductor manufacturing processes. In general, the methods simplify the processing sequence of forming devices or partially formed devices on a test chip such that the devices can be tested immediately after formation. The immediate testing allows for the high throughput testing of varied materials, processes, or process sequences on the test chip. The test chip has multiple site isolated regions where each of the regions is varied from one another and the test chip is designed to enable high throughput testing of the different regions.
摘要翻译：在本发明的实施例中，描述了用于这些方法的组合处理方法和测试芯片。这些方法和测试芯片能够有效地开发用于半导体制造工艺的材料，工艺和工艺顺序集成方案。通常，这些方法简化了在测试芯片上形成器件或部分形成的器件的处理顺序，使得器件可以在形成后立即进行测试。即时测试允许测试芯片上各种材料，工艺或工艺顺序的高通量测试。测试芯片具有多个位置隔离区域，其中每个区域彼此变化，并且测试芯片被设计为能够实现不同区域的高通量测试。

8. 发明授权

US06387805B2 Copper alloy seed layer for copper metallization 失效
标题翻译：铜合金种子层用于铜金属化
公开(公告)号：US06387805B2
公开(公告)日：2002-05-14
申请号：US08878143
申请日：1997-06-18
申请人： Peijun Ding , Tony Chiang , Imran Hashim , Bingxi Sun , Barry Chin
发明人： Peijun Ding , Tony Chiang , Imran Hashim , Bingxi Sun , Barry Chin
IPC分类号： H01L2144
CPC分类号： H01L21/76843 , C23C14/024 , C23C14/025 , C23C14/16 , C23C14/165 , C23C16/0281 , C23C16/06 , H01L21/2855 , H01L21/28556 , H01L21/76831 , H01L21/76834 , H01L21/76867 , H01L21/76871 , H01L21/76877 , H01L21/76888 , H01L23/53233 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A copper metallization structure and its method of formation in which a layer of a copper alloy, such as Cu—Mg or Cu—Al is deposited over a silicon oxide based dielectric layer and a substantially pure copper layer is deposited over the copper alloy layer. The copper alloy layer serves as a seed or wetting layer for subsequent filling of via holes and trenches with substantially pure copper. Preferably, the copper alloy is deposited cold in a sputter process, but, during the deposition of the pure copper layer or afterwards in a separate annealing step, the temperature is raised sufficiently high to cause the alloying element of the copper alloy to migrate to the dielectric layer and form a barrier there against diffusion of copper into and through the dielectric layer. This barrier also promotes adhesion of the alloy layer to the dielectric layer, thereby forming a superior wetting and seed layer for subsequent copper full-fill techniques. Filling of the alloy-lined feature can be accomplished using PVD, CVD, or electro/electroless plating.
摘要翻译：在铜合金层上沉积铜基金属化结构及其形成方法，其中在氧化硅基介电层和基本上纯的铜层上沉积诸如Cu-Mg或Cu-Al的铜合金层。铜合金层用作种子或润湿层，用于随后用基本上纯的铜填充通孔和沟槽。优选地，铜合金在溅射过程中冷沉积，但是在纯铜层沉积期间或之后在单独的退火步骤中，温度升高到足够高以使铜合金的合金元素迁移到电介质层，并形成阻挡铜，以扩散到介电层中并穿过介电层。该屏障还促进了合金层对电介质层的粘附，从而形成了用于随后的铜全填充技术的优异的润湿和种子层。可以使用PVD，CVD或电/无电镀来完成合金衬里特征的填充。

9. 发明授权

US09129894B2 Embedded nonvolatile memory elements having resistive switching characteristics 有权
标题翻译：具有电阻开关特性的嵌入式非易失性存储元件
公开(公告)号：US09129894B2
公开(公告)日：2015-09-08
申请号：US13621371
申请日：2012-09-17
申请人： Imran Hashim , Tony Chiang , Vidyut Gopal , Yun Wang
发明人： Imran Hashim , Tony Chiang , Vidyut Gopal , Yun Wang
IPC分类号： G11C11/21 , H01L27/24 , G11C13/00 , H01L45/00
CPC分类号： H01L45/1608 , G11C13/0007 , G11C13/0069 , G11C2213/32 , G11C2213/51 , G11C2213/52 , G11C2213/74 , G11C2213/79 , H01L27/2436 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/146
摘要： Provided are nonvolatile memory assemblies each including a resistive switching layer and current steering element. The steering element may be a transistor connected in series with the switching layer. Resistance control provided by the steering element allows using switching layers requiring low switching voltages and currents. Memory assemblies including such switching layers are easier to embed into integrated circuit chips having other low voltage components, such as logic and digital signal processing components, than, for example, flash memory requiring much higher switching voltages. In some embodiments, provided nonvolatile memory assemblies operate at switching voltages less than about 3.0V and corresponding currents less than 50 microamperes. A memory element may include a metal rich hafnium oxide disposed between a titanium nitride electrode and doped polysilicon electrode. One electrode may be connected to a drain or source of the transistor, while another electrode is connected to a signal line.
摘要翻译：提供了各自包括电阻式开关层和电流控制元件的非易失性存储器组件。转向元件可以是与开关层串联连接的晶体管。由转向元件提供的电阻控制允许使用需要低开关电压和电流的开关层。包括这种开关层的存储器组件比例如需要高得多的开关电压的闪速存储器更容易嵌入到具有其它低电压组件（例如逻辑和数字信号处理组件）的集成电路芯片中。在一些实施例中，所提供的非易失性存储器组件在小于约3.0V的开关电压和小于50微安的相应电流下工作。存储元件可以包括设置在氮化钛电极和掺杂多晶硅电极之间的富含金属的氧化铪。一个电极可以连接到晶体管的漏极或源极，而另一个电极连接到信号线。

10. 发明授权

US08900422B2 Yttrium and titanium high-K dielectric film 有权
标题翻译：钇和钛高K电介质膜
公开(公告)号：US08900422B2
公开(公告)日：2014-12-02
申请号：US12921776
申请日：2009-04-17
申请人： Imran Hashim , Indranil De , Tony Chiang , Edward Haywood , Hanhong Chen , Nobi Fuchigami , Pragati Kumar , Sandra Malhotra , Sunil Shanker
发明人： Imran Hashim , Indranil De , Tony Chiang , Edward Haywood , Hanhong Chen , Nobi Fuchigami , Pragati Kumar , Sandra Malhotra , Sunil Shanker
IPC分类号： B05D5/12 , C23C14/34 , H01L49/02 , C23C16/40 , C23C16/455 , H01L21/314 , H01L21/316 , H01L27/108 , H01L21/02
CPC分类号： H01L28/65 , C23C16/405 , C23C16/45529 , C23C16/45531 , H01L21/02697 , H01L21/3141 , H01L21/31604 , H01L27/10852 , H01L28/40
摘要： This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.
摘要翻译：本公开内容提供（a）制造基于钇和钛的氧化物层（例如，电介质层）的方法，以具有高介电常数和低泄漏特性，以及（b）相关的器件和结构。具有钇和钛的氧化物层可以制成无定形氧化物或交替的单层系列。在几个实施方案中，氧化物的特征在于对特定控制的总金属的钇贡献。如果需要，可以通过PVD工艺或者通过使用特定的前体材料以允许钛和钇的共同工艺温度窗口的原子层沉积工艺，作为反应过程的结果来生产氧化物层反应。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式