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1. 发明授权

US06941504B2 Method and apparatus for test case evaluation using a cyclic redundancy checker 失效
标题翻译：使用循环冗余校验器进行测试用例评估的方法和装置
公开(公告)号：US06941504B2
公开(公告)日：2005-09-06
申请号：US09998399
申请日：2001-11-15
申请人： Robert Walter Berry, Jr. , Michael Criscolo , Pedro Martin-de-Nicolas , Charles Leverett Meissner , Michael Timothy Saunders
发明人： Robert Walter Berry, Jr. , Michael Criscolo , Pedro Martin-de-Nicolas , Charles Leverett Meissner , Michael Timothy Saunders
IPC分类号： H03M13/09 , H03M13/00
CPC分类号： H03M13/09
摘要： The present invention provides an apparatus and a method for testing one or more electrical components. The apparatus and method provide a CRC function that is used to calculate a CRC value for a portion of memory. The CRC value is compared with an expected CRC value to determine if the electrical component passed or failed the test.
摘要翻译：本发明提供一种用于测试一个或多个电气部件的装置和方法。该装置和方法提供用于计算存储器的一部分的CRC值的CRC函数。将CRC值与预期的CRC值进行比较，以确定电气部件是否通过或失败。

2. 发明授权

US06973607B2 Method and apparatus for testing electronic components 失效
标题翻译：用于测试电子部件的方法和装置
公开(公告)号：US06973607B2
公开(公告)日：2005-12-06
申请号：US09998390
申请日：2001-11-29
申请人： Heinz Baier , Robert Francis Berry , Michael Criscolo , Pedro Martin-de-Nicolas , Michael Timothy Saunders , Kanti C. Shah
发明人： Heinz Baier , Robert Francis Berry , Michael Criscolo , Pedro Martin-de-Nicolas , Michael Timothy Saunders , Kanti C. Shah
IPC分类号： G06F11/267 , G01R31/28
CPC分类号： G06F11/2236
摘要： An apparatus and a method for testing one or more processors. The apparatus and method provide a host computer that issues test case information. The test case information is translated from the architecture used by a host computer to the architecture required by the electronic components. The processors are then able to perform the test case.
摘要翻译：一种用于测试一个或多个处理器的装置和方法。该装置和方法提供发布测试用例信息的主计算机。测试用例信息从主计算机使用的架构转换为电子组件所需的体系结构。处理器然后能够执行测试用例。

3. 发明授权

US08347022B2 Flash ROM programming 有权
标题翻译：闪存ROM编程
公开(公告)号：US08347022B2
公开(公告)日：2013-01-01
申请号：US12339018
申请日：2008-12-18
申请人： Robert W. Berry , Michael Criscolo , Michael T. Saunders
发明人： Robert W. Berry , Michael Criscolo , Michael T. Saunders
IPC分类号： G06F12/00
CPC分类号： G11C16/102 , G06F8/66
摘要： A method comprises providing a golden ROM unit comprising known good ROM code. The golden ROM is coupled to a ROM socket of a target system. The target system is booted, wherein booting comprises providing power to the target system and independently providing power to the ROM socket. The known good ROM code is loaded from the golden ROM to a system memory of the target system. Power is removed from the ROM socket and the golden ROM is decoupled from the ROM socket. A first subject ROM is coupled to the ROM socket. Power is provided to the ROM socket and the first subject ROM is programmed with the known good ROM code.
摘要翻译：一种方法包括提供包括已知的良好ROM码的金色ROM单元。金色ROM耦合到目标系统的ROM插槽。引导目标系统，其中引导包括向目标系统提供电力并且独立地向ROM插槽供电。已知的良好ROM代码从金色ROM加载到目标系统的系统内存。电源从ROM插槽中取出，金色ROM从ROM插槽中脱离。第一主题ROM耦合到ROM插槽。电源提供给ROM插槽，第一个对象ROM用已知的良好的ROM代码进行编程。

4. 发明申请

US20080312863A1 SYSTEM AND METHOD FOR IMPLEMENTING A PROGRAMMABLE DMA MASTER WITH DATE CHECKING UTILIZING A DRONE SYSTEM CONTROLLER 失效
标题翻译：用于执行可编程DMA主机的系统和方法，日期检查使用DRONE系统控制器
公开(公告)号：US20080312863A1
公开(公告)日：2008-12-18
申请号：US12187199
申请日：2008-08-06
申请人： Robert W. Berry, JR. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
发明人： Robert W. Berry, JR. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
IPC分类号： G11C29/00 , G06F19/00
CPC分类号： G11C29/48 , G06F11/26
摘要： A method, system, and computer-usable medium for implementing a programmable DMA master with data checking utilizing a drone system controller. According to an embodiment of the present invention, a drone processor generates a collection of random data and stores a first and second copy of the collection of random data in a first and second memory location in a drone memory. The drone processor writes a third copy of the collection of random data in a processor memory. When the drone processor retrieves the third copy from the processor memory, the drone processor writes the third copy in the second memory location in the drone memory. When the drone processor compares the first copy with the third copy, the results of the compare is written in a status location within the drone processor.
摘要翻译：一种用于使用无人机系统控制器实现具有数据检查的可编程DMA主机的方法，系统和计算机可用介质。根据本发明的实施例，无人机处理器生成随机数据的集合，并将随机数据的集合的第一和第二副本存储在无人机存储器中的第一和第二存储器位置中。无人机处理器将随机数据集合的第三副本写入处理器存储器。当无人机处理器从处理器存储器检索第三副本时，无人机处理器将第三副本写入无人机存储器中的第二存储器位置。当无人机处理器将第一副本与第三副本进行比较时，将比较结果写入无人机处理器内的状态位置。

5. 发明申请

US20120252357A1 System and Method for Monitoring and Managing the Communications of Remote Devices 审中-公开
标题翻译：用于监控和管理远程设备通信的系统和方法
公开(公告)号：US20120252357A1
公开(公告)日：2012-10-04
申请号：US13439199
申请日：2012-04-04
申请人： Bryan Tarleton , Michael Criscolo , Jeffrey O. Smith
发明人： Bryan Tarleton , Michael Criscolo , Jeffrey O. Smith
IPC分类号： H04W24/00 , H04W8/04
CPC分类号： H04W24/08 , H04W8/04
摘要： A system and method of monitoring the communications of remote devices is described. The system includes a plurality of remote devices, where each remote device has one or more sensors and a communications transceiver. A control center, which includes a historical usage database reflecting historical usage patterns for each of the plurality of remote units, analyzes the communications for each of the plurality of remote devices against the historical usage patterns for that remote device to determine when that remote device is malfunctioning or approaching a usage threshold. The control center is then operable to take appropriate corrective action in response to the analysis.
摘要翻译：描述了监视远程设备的通信的系统和方法。该系统包括多个远程设备，其中每个远程设备具有一个或多个传感器和通信收发器。包括反映多个远程单元中的每一个的历史使用模式的历史使用数据库的控制中心分析针对该远程设备的历史使用模式的多个远程设备中的每一个的通信，以确定该远程设备何时故障或接近使用阈值。然后，控制中心可操作以响应分析采取适当的纠正措施。

6. 发明授权

US08165847B2 Implementing a programmable DMA master with write inconsistency determination 失效
标题翻译：实现具有写入不一致性确定的可编程DMA主机
公开(公告)号：US08165847B2
公开(公告)日：2012-04-24
申请号：US12187199
申请日：2008-08-06
申请人： Robert W. Berry, Jr. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
发明人： Robert W. Berry, Jr. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
IPC分类号： G06F11/30 , G11C29/00
CPC分类号： G11C29/48 , G06F11/26
摘要： A method, system, and computer-usable medium for implementing a programmable DMA master with data checking utilizing a drone system controller. According to an embodiment of the present invention, a drone processor generates a collection of random data and stores a first and second copy of the collection of random data in a first and second memory location in a drone memory. The drone processor writes a third copy of the collection of random data in a processor memory. When the drone processor retrieves the third copy from the processor memory, the drone processor writes the third copy in the second memory location in the drone memory. When the drone processor compares the first copy with the third copy, the results of the compare is written in a status location within the drone processor.
摘要翻译：一种用于使用无人机系统控制器实现具有数据检查的可编程DMA主机的方法，系统和计算机可用介质。根据本发明的实施例，无人机处理器生成随机数据的集合，并将随机数据的集合的第一和第二副本存储在无人机存储器中的第一和第二存储器位置中。无人机处理器将随机数据集合的第三副本写入处理器存储器。当无人机处理器从处理器存储器检索第三副本时，无人机处理器将第三副本写入无人机存储器中的第二存储器位置。当无人机处理器将第一副本与第三副本进行比较时，将比较结果写入无人机处理器内的状态位置。

7. 发明申请

US20100161921A1 FLASH ROM PROGRAMMING 有权
标题翻译：闪存编程
公开(公告)号：US20100161921A1
公开(公告)日：2010-06-24
申请号：US12339018
申请日：2008-12-18
申请人： Robert W. Berry, JR. , Michael Criscolo , Michael T. Saunders
发明人： Robert W. Berry, JR. , Michael Criscolo , Michael T. Saunders
IPC分类号： G06F13/00
CPC分类号： G11C16/102 , G06F8/66
摘要： A method comprises providing a golden ROM unit comprising known good ROM code. The golden ROM is coupled to a ROM socket of a target system. The target system is booted, wherein booting comprises providing power to the target system and independently providing power to the ROM socket. The known good ROM code is loaded from the golden ROM to a system memory of the target system. Power is removed from the ROM socket and the golden ROM is decoupled from the ROM socket. A first subject ROM is coupled to the ROM socket. Power is provided to the ROM socket and the first subject ROM is programmed with the known good ROM code.
摘要翻译：一种方法包括提供包括已知的良好ROM码的金色ROM单元。金色ROM耦合到目标系统的ROM插槽。引导目标系统，其中引导包括向目标系统提供电力并且独立地向ROM插槽供电。已知的良好ROM代码从金色ROM加载到目标系统的系统内存。电源从ROM插槽中取出，金色ROM从ROM插槽中脱离。第一主题ROM耦合到ROM插槽。电源提供给ROM插槽，第一个对象ROM用已知的良好的ROM代码进行编程。

8. 发明申请

US20080294822A1 DYNAMICALLY CHANGING PCI CLOCKS 失效
标题翻译：动态更改PCI时钟
公开(公告)号：US20080294822A1
公开(公告)日：2008-11-27
申请号：US12187202
申请日：2008-08-06
申请人： CHRISTOPHER R. CONLEY , Michael Criscolo , Michael T. Saunders
发明人： CHRISTOPHER R. CONLEY , Michael Criscolo , Michael T. Saunders
IPC分类号： G06F13/40 , G06F1/08
CPC分类号： G06F1/3203 , G06F1/04 , G06F1/3237 , Y02D10/128
摘要： A method, apparatus and computer-usable medium are presented for dynamically selecting a clock signal used by a peripheral device that is coupled to a motherboard. When the motherboard is powered off, a clock selector sends the peripheral device an internal clock signal from the peripheral device's own internal clock controller. When the motherboard powers up, the clock selector sends the peripheral device an external clock signal from the motherboard.
摘要翻译：提出了一种方法，装置和计算机可用介质，用于动态地选择耦合到主板的外围设备使用的时钟信号。当主板关闭电源时，时钟选择器从外围设备自己的内部时钟控制器向外围设备发送内部时钟信号。当主板上电时，时钟选择器向外围设备发送来自主板的外部时钟信号。

9. 发明授权

US07457974B2 Dynamically changing PCI clocks 失效
标题翻译：动态更改PCI时钟
公开(公告)号：US07457974B2
公开(公告)日：2008-11-25
申请号：US11221552
申请日：2005-09-08
申请人： Christopher R. Conley , Michael Criscolo , Michael T. Saunders
发明人： Christopher R. Conley , Michael Criscolo , Michael T. Saunders
IPC分类号： G06F13/00
CPC分类号： G06F1/3203 , G06F1/04 , G06F1/3237 , Y02D10/128
摘要： A method, apparatus and computer-usable medium are presented for dynamically selecting a clock signal used by a peripheral device that is coupled to a motherboard. When the motherboard is powered off, a clock selector sends the peripheral device an internal clock signal from the peripheral device's own internal clock controller. When the motherboard powers up, the clock selector sends the peripheral device an external clock signal from the motherboard.
摘要翻译：提出了一种方法，装置和计算机可用介质，用于动态地选择耦合到主板的外围设备使用的时钟信号。当主板关闭电源时，时钟选择器从外围设备自己的内部时钟控制器向外围设备发送内部时钟信号。当主板上电时，时钟选择器向外围设备发送来自主板的外部时钟信号。

10. 发明授权

US07430487B2 System and method for implementing a programmable DMA master with data checking utilizing a drone system controller 失效
标题翻译：使用无人机系统控制器实现具有数据检查的可编程DMA主机的系统和方法
公开(公告)号：US07430487B2
公开(公告)日：2008-09-30
申请号：US11470282
申请日：2006-09-06
申请人： Robert W. Berry, Jr. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
发明人： Robert W. Berry, Jr. , Michael Criscolo , Christopher J. Kuruts , James P. Kuruts , Steven J. Smolski
IPC分类号： G11C29/00 , G06F19/00
CPC分类号： G11C29/48 , G06F11/26
摘要： A method, system, and computer-usable medium for implementing a programmable DMA master with data checking utilizing a drone system controller. According to an embodiment of the present invention, a drone processor generates a collection of random data and stores a first and second copy of the collection of random data in a first and second memory location in a drone memory. The drone processor writes a third copy of the collection of random data in a processor memory. When the drone processor retrieves the third copy from the processor memory, the drone processor writes the third copy in the second memory location in the drone memory. When the drone processor compares the first copy with the third copy, the results of the compare is written in a status location within the drone processor.
摘要翻译：一种用于使用无人机系统控制器实现具有数据检查的可编程DMA主机的方法，系统和计算机可用介质。根据本发明的实施例，无人机处理器生成随机数据的集合，并将随机数据的集合的第一和第二副本存储在无人机存储器中的第一和第二存储器位置中。无人机处理器将随机数据集合的第三副本写入处理器存储器。当无人机处理器从处理器存储器检索第三副本时，无人机处理器将第三副本写入无人机存储器中的第二存储器位置。当无人机处理器将第一副本与第三副本进行比较时，将比较结果写入无人机处理器内的状态位置。

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