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1. 发明授权

US08513111B2 Forming semiconductor structures 有权
标题翻译：形成半导体结构
公开(公告)号：US08513111B2
公开(公告)日：2013-08-20
申请号：US11485078
申请日：2006-07-12
申请人： Robert P. Meagley , Kevin P. O'Brien , Tian-An Chen , Michael D. Goodner , James Powers , Huey-Chiang Liou
发明人： Robert P. Meagley , Kevin P. O'Brien , Tian-An Chen , Michael D. Goodner , James Powers , Huey-Chiang Liou
IPC分类号： H01L23/58
CPC分类号： H01L23/5222 , H01L21/02118 , H01L21/02134 , H01L21/02137 , H01L21/02164 , H01L21/0234 , H01L21/02351 , H01L21/312 , H01L21/76224 , H01L21/7682 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76829 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure may be covered with a thermally decomposing film. That film may then be covered by a sealing cover. Subsequently, the thermally decomposing material may be decomposed, forming a cavity.
摘要翻译：半导体结构可以被热分解膜覆盖。然后该膜可以被密封盖覆盖。随后，热分解材料可能被分解，形成空腔。

2. 发明授权

US07071125B2 Precursors for film formation 失效
标题翻译：成膜前体
公开(公告)号：US07071125B2
公开(公告)日：2006-07-04
申请号：US10947820
申请日：2004-09-22
申请人： Michael L. McSwiney , Huey-Chiang Liou , Michael D. Goodner , Robert E. Leet , Robert P. Meagley
发明人： Michael L. McSwiney , Huey-Chiang Liou , Michael D. Goodner , Robert E. Leet , Robert P. Meagley
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/02222 , C23C16/22 , H01L21/02123 , H01L21/02203 , H01L21/02211 , H01L21/3125 , H01L21/3185
摘要： A method including introducing a precursor in the presence of a circuit substrate, and forming a film including a reaction product of the precursor on the substrate, wherein the precursor includes a molecule comprising a primary species of the film and a modifier. A method including introducing a precursor in the presence of a circuit substrate, the precursor including a primary species and a film modifier as a single source, and forming a film on the circuit substrate. An apparatus including a semiconductor substrate, and a film on a surface of the semiconductor substrate, the film including a reaction product of a precursor including a molecule comprising a primary species and a modifier.
摘要翻译：一种方法，包括在存在电路基板的情况下引入前体，以及形成包含所述前体在所述基底上的反应产物的膜，其中所述前体包括包含所述膜的主要种类和改性剂的分子。一种方法，包括在存在电路基板的情况下引入前体，所述前体包括作为单一源的主要物质和膜改性剂，以及在所述电路基底上形成膜。一种包括半导体衬底和半导体衬底的表面上的膜的设备，所述膜包括包含主要物质和改性剂的分子的前体的反应产物。

3. 发明申请

US20060255432A1 Forming semiconductor structures 有权
公开(公告)号：US20060255432A1
公开(公告)日：2006-11-16
申请号：US11485078
申请日：2006-07-12
申请人： Robert Meagley , Kevin O'Brien , Tian-An Chen , Michael Goodner , James Powers , Huey-Chiang Liou
发明人： Robert Meagley , Kevin O'Brien , Tian-An Chen , Michael Goodner , James Powers , Huey-Chiang Liou
IPC分类号： H01L23/58
CPC分类号： H01L23/5222 , H01L21/02118 , H01L21/02134 , H01L21/02137 , H01L21/02164 , H01L21/0234 , H01L21/02351 , H01L21/312 , H01L21/76224 , H01L21/7682 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76829 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure may be covered with a thermally decomposing film. That film may then be covered by a sealing cover. Subsequently, the thermally decomposing material may be decomposed, forming a cavity.

4. 发明申请

US20050133920A1 Method and materials for self-aligned dual damascene interconnect structure 有权
标题翻译：自对准双镶嵌互连结构的方法和材料
公开(公告)号：US20050133920A1
公开(公告)日：2005-06-23
申请号：US10746485
申请日：2003-12-23
申请人： Huey-Chiang Liou , Wang Yueh
发明人： Huey-Chiang Liou , Wang Yueh
IPC分类号： H01L21/312 , H01L21/768 , H01L23/532 , H01L21/4763 , H01L21/302 , H01L23/52 , H01L29/40
CPC分类号： H01L21/02137 , H01L21/02203 , H01L21/02282 , H01L21/02348 , H01L21/3122 , H01L21/3124 , H01L21/76802 , H01L21/7682 , H01L21/76825 , H01L21/76831 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： A method of forming an opening in a disclosed ILD is described. The ILD in one embodiment includes a matrix material and a photosensitive porogen. Hard sidewalls are formed in the ILD allowing a thin barrier layer to be used in a dual damascene copper and porous low-k without pore sealing steps.
摘要翻译：描述了在公开的ILD中形成开口的方法。在一个实施方案中，ILD包括基质材料和感光致孔剂。在ILD中形成硬的侧壁，允许在双镶嵌铜和多孔低k（无孔密封步骤）中使用薄的阻挡层。

5. 发明授权

US07867687B2 Methods and compositions for reducing line wide roughness 有权
标题翻译：减少线宽粗糙度的方法和组合物
公开(公告)号：US07867687B2
公开(公告)日：2011-01-11
申请号：US10687288
申请日：2003-10-15
申请人： Wang Yueh , Huey-Chiang Liou , Hai Deng , Hok-Kin Choi
发明人： Wang Yueh , Huey-Chiang Liou , Hai Deng , Hok-Kin Choi
IPC分类号： G03F7/004
CPC分类号： G03F7/022 , G03F7/023 , G03F7/0233
摘要： Embodiments of the invention provide a non-chemically amplified photoresist, which results in reduced line wide roughness (LWR). In accordance with one embodiment the photoresist includes a developer-soluble resin (DSR) and a photoactive compound (PAC). For one embodiment of the invention, the even distribution of the PAC within the DSR results in reduced acid diffusion thus reducing LWR. Prior to exposure to the light source, the PAC inhibits solubility of the DSR in the developer. Upon exposure the PAC converts to acid to promote solubility of the DSR. The even distribution of the PAC within the photoresist results in reduced LWR and a reduction in defects. For one embodiment the photoresist is applied in the EUV technology (e.g., wavelength is 13.4 nm). For such an embodiment the LWR may be reduced to less than 1.5 nm allowing for effective fabrication of devices having feature sizes of approximately 15 nm.
摘要翻译：本发明的实施例提供非化学放大的光致抗蚀剂，其导致线宽粗糙度（LWR）的降低。根据一个实施方案，光致抗蚀剂包括显影剂可溶性树脂（DSR）和光敏化合物（PAC）。对于本发明的一个实施例，PAC在DSR内的均匀分布导致酸扩散减少，从而减少LWR。在暴露于光源之前，PAC抑制DSR在显影剂中的溶解度。曝光后，PAC转化为酸，以促进DSR的溶解度。 PAC在光致抗蚀剂内的均匀分布导致LWR降低和缺陷减少。对于一个实施例，以EUV技术（例如，波长为13.4nm）施加光致抗蚀剂。对于这样的实施例，LWR可以减小到小于1.5nm，允许有效地制造具有大约15nm的特征尺寸的器件。

6. 发明授权

US07469443B2 Brush for cleaning wafer 失效
标题翻译：刷子清洗晶圆
公开(公告)号：US07469443B2
公开(公告)日：2008-12-30
申请号：US11032858
申请日：2005-01-10
申请人： Huey-Chiang Liou , Alexander Tregub , Mansour Moinpour
发明人： Huey-Chiang Liou , Alexander Tregub , Mansour Moinpour
IPC分类号： B08B1/04
CPC分类号： H01L21/67046 , B08B1/04 , B08B3/04
摘要： In a formulation of a wafer cleaning brush, forming a polymer solution with a plurality of nano-scale porogens or with a synthetic pore forming agent and curing the polymer solution to form a porous polymeric material.
摘要翻译：在晶片清洁刷的配方中，用多个纳米级致孔剂或合成成孔剂形成聚合物溶液并固化聚合物溶液以形成多孔聚合材料。

7. 发明授权

US07303985B2 Zeolite-carbon doped oxide composite low k dielectric 有权
标题翻译：沸石 - 碳掺杂氧化物复合低k电介质
公开(公告)号：US07303985B2
公开(公告)日：2007-12-04
申请号：US10716250
申请日：2003-11-17
申请人： Hai Deng , Huey-Chiang Liou
发明人： Hai Deng , Huey-Chiang Liou
IPC分类号： H01L21/31
CPC分类号： H01L21/02126 , H01L21/02203 , H01L21/02282 , H01L21/02304 , H01L21/02337 , H01L21/31695 , H01L23/5329 , H01L2924/0002 , Y10T428/24331 , H01L2924/00
摘要： A method for forming a zeolite-carbon doped oxide (CDO) composite dielectric material is herein described. Zeolite particles may be dispersed in a solvent. The zeolite solvent solution may then be deposited on an underlying layer, such as a wafer of other dielectric layer. At least some solvent may then be removed to form a zeolite film. A CDO may then be deposited in the zeolite film to form a zeolite-CDO composite film/dielectric. The zeolite-CDO composite film/dielectric may then be calcinated to form a solid phase zeolite-CDO composite dilectric.
摘要翻译：本文描述了形成沸石 - 碳掺杂氧化物（CDO）复合电介质材料的方法。沸石颗粒可以分散在溶剂中。然后可以将沸石溶剂溶液沉积在下层，例如其它介电层的晶片上。然后可以除去至少一些溶剂以形成沸石膜。然后可以将CDO沉积在沸石膜中以形成沸石-CDO复合膜/电介质。然后可以将沸石-CDO复合膜/电介质煅烧以形成固相沸石-CDO复合材料。

8. 发明申请

US20080220213A1 ZEOLITE - CARBON DOPED OXIDE COMPOSITE LOW K DIELECTRIC 审中-公开
标题翻译： ZEOLITE - 碳氧化物复合材料低K电介质
公开(公告)号：US20080220213A1
公开(公告)日：2008-09-11
申请号：US11924865
申请日：2007-10-26
申请人： Hai Deng , Huey-Chiang Liou
发明人： Hai Deng , Huey-Chiang Liou
IPC分类号： B32B3/10
CPC分类号： H01L21/02126 , H01L21/02203 , H01L21/02282 , H01L21/02304 , H01L21/02337 , H01L21/31695 , H01L23/5329 , H01L2924/0002 , Y10T428/24331 , H01L2924/00
摘要： A method for forming a zeolite-carbon doped oxide (CDO) composite dielectric material is herein described. Zeolite particles may be dispersed in a solvent. The zeolite solvent solution may then be deposited on an underlying layer, such as a wafer or other dielectric layer. At least some solvent may then be removed to form a zeolite film. A CDO may then be deposited in the zeolite film to form a zeolite-CDO composite film/dielectric. The Zeolite-CDO composite film/dielectric may then be calcinated to form a solid phase zeolite-CDO composite dielectric.
摘要翻译：本文描述了形成沸石 - 碳掺杂氧化物（CDO）复合电介质材料的方法。沸石颗粒可以分散在溶剂中。然后可以将沸石溶剂溶液沉积在下面的层上，例如晶片或其它电介质层。然后可以除去至少一些溶剂以形成沸石膜。然后可以将CDO沉积在沸石膜中以形成沸石-CDO复合膜/电介质。然后可以将沸石-CDO复合膜/电介质煅烧以形成固相沸石-CDO复合电介质。

9. 发明申请

US20060063394A1 Precursors for film formation 失效
公开(公告)号：US20060063394A1
公开(公告)日：2006-03-23
申请号：US10947820
申请日：2004-09-22
申请人： Michael McSwiney , Huey-Chiang Liou , Michael Goodner , Robert Leet , Robert Meagley
发明人： Michael McSwiney , Huey-Chiang Liou , Michael Goodner , Robert Leet , Robert Meagley
IPC分类号： H01L21/31
CPC分类号： H01L21/02222 , C23C16/22 , H01L21/02123 , H01L21/02203 , H01L21/02211 , H01L21/3125 , H01L21/3185
摘要： A method including introducing a precursor in the presence of a circuit substrate, and forming a film including a reaction product of the precursor on the substrate, wherein the precursor includes a molecule comprising a primary species of the film and a modifier. A method including introducing a precursor in the presence of a circuit substrate, the precursor including a primary species and a film modifier as a single source, and forming a film on the circuit substrate. An apparatus including a semiconductor substrate, and a film on a surface of the semiconductor substrate, the film including a reaction product of a precursor including a molecule comprising a primary species and a modifier.

10. 发明授权

US06995073B2 Air gap integration 有权
标题翻译：气隙整合
公开(公告)号：US06995073B2
公开(公告)日：2006-02-07
申请号：US10621696
申请日：2003-07-16
申请人： Huey-Chiang Liou
发明人： Huey-Chiang Liou
IPC分类号： H01L21/76 , H01L21/4763 , H01L29/00 , H01L23/48 , H01L23/52
CPC分类号： H01L21/76831 , H01L21/76801 , H01L21/76807 , H01L21/7682 , H01L21/76829 , H01L23/5222 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Method and structure for integrating conductive and dielectric materials in a microelectronic structure having air gaps are disclosed. Certain embodiments of the invention comprise isolating dielectric layers from conductive layers using an etch stop layer to facilitate controlled removal of portions of the dielectric layers and formation of air gaps or voids. Capping and peripheral structural layers may be incorporated to increase the structural integrity of the integration subsequent to removal of sacrificial material.
摘要翻译：公开了在具有气隙的微电子结构中集成导电和介电材料的方法和结构。本发明的某些实施例包括使用蚀刻停止层将电介质层与导电层隔离，以便于控制去除电介质层的部分并形成气隙或空隙。可以引入封盖和外围结构层，以在除去牺牲材料之后增加整合的结构完整性。

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