专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US4485319A Bubble memory sense amplifier 失效
标题翻译：气泡存储读出放大器
公开(公告)号：US4485319A
公开(公告)日：1984-11-27
申请号：US352989
申请日：1982-02-26
申请人： Robert B. Davies , Robert N. Dotson , Ira Miller
发明人： Robert B. Davies , Robert N. Dotson , Ira Miller
IPC分类号： G11C11/14 , G11C7/06 , G11C19/08 , H03K5/02 , H03K5/24 , H03K5/159 , H03K17/00
CPC分类号： G11C19/0866 , G11C7/06 , H03K5/02 , H03K5/24
摘要： A sense amplifier which is fully integrated has an on-chip voltage regulator to provide essentially error free operation. The sense amplifier provides peak-to-peak signal detection for comparison to a threshold voltage by a comparator. The output of the comparator is coupled to an RS flip-flop. The output of the RS flip-flop is coupled to a D flip-flop. The use of an RS flip-flop as well as a D flip-flop eliminates clocking problems caused by skewing and keeps a stored detected signal from changing prematurely.
摘要翻译：完全集成的读出放大器具有片上稳压器，可实质提供无差错的操作。读出放大器提供峰 - 峰信号检测，以便通过比较器与阈值电压进行比较。比较器的输出耦合到RS触发器。 RS触发器的输出耦合到D触发器。使用RS触发器和D触发器可以消除由偏移引起的时钟问题，并保持存储的检测信号过早变化。

2. 发明授权

US4476429A High voltage bubble memory pulse generator output stage 失效
标题翻译：高电压气泡记忆脉冲发生器输出级
公开(公告)号：US4476429A
公开(公告)日：1984-10-09
申请号：US412070
申请日：1982-08-27
申请人： Ira Miller , Robert N. Dotson , Robert B. Davies
发明人： Ira Miller , Robert N. Dotson , Robert B. Davies
IPC分类号： G11C19/08 , H03K5/08 , H03K17/64 , G05F5/00
CPC分类号： G11C19/0858 , G11C19/085 , H03K17/64 , H03K5/08
摘要： A circuit for providing the gate of a bubble memory with a precision current pulse at a high voltage is manufactured using a low voltage process; i.e. BV.sub.ceo is approximately 18 volts. In order to accomplish this, first and second voltage level shifting stages are cascoded and the output transistors thereof are used as Zener level shifters each level shifting downward by a BV.sub.ceo when only a small voltage is dropped across the load. If the voltage drop across the load increases, the cascoded output transistors may enter their active region and are prevented from going into saturation by saturation clamps so as to not introduce unwanted delays in the rise or fall times of the current pulse.
摘要翻译：使用低电压工艺制造用于以高电压提供具有精密电流脉冲的气泡存储器的栅极的电路; 即BVceo约为18伏特。为了实现这一点，第一和第二电压电平移位级被级联，并且其输出晶体管被用作齐纳电平移位器，当只有小的电压在负载上下降时，每个电平向下移位BVceo。如果跨越负载的电压降增加，则级联输出晶体管可能进入其有源区，并且通过饱和钳位阻止其进入饱和，从而不会在电流脉冲的上升或下降时间引入不必要的延迟。

3. 发明授权

US4554464A Propagation delay generator 失效
标题翻译：传播延迟发生器
公开(公告)号：US4554464A
公开(公告)日：1985-11-19
申请号：US413051
申请日：1982-08-30
申请人： Robert B. Davies , Ira Miller , Robert N. Dotson
发明人： Robert B. Davies , Ira Miller , Robert N. Dotson
IPC分类号： H03K5/13 , H03K17/28 , H03K3/017 , H03K5/04 , H03K17/56
CPC分类号： H03K17/28 , H03K5/13
摘要： A propagation delay generator is provided for controlling the duration of a bubble generate waveform of a bubble memory system. A first means is responsive to a digital input signal and provides an initializing signal to a current source. A capacitor is charged, responsive to an R-C time constant, by an increased voltage level prompted by the initializing signal. A second means is responsive to the charging signal in excess of that required to charge the capacitor. The second means thereby provides a digital output that is delayed from the digital input signal.
摘要翻译：提供传播延迟发生器用于控制气泡存储系统的气泡产生波形的持续时间。第一装置响应于数字输入信号并且向当前源提供初始化信号。响应于R-C时间常数，电容器被由初始化信号提示的增加的电压电平充电。第二装置响应于超过对电容器充电所需的充电信号。因此，第二装置提供从数字输入信号延迟的数字输出。

4. 发明授权

US4514648A Current sense circuit for a bubble memory voltage booster 失效
标题翻译：用于气泡存储器电压增强器的电流检测电路
公开(公告)号：US4514648A
公开(公告)日：1985-04-30
申请号：US412057
申请日：1982-08-27
申请人： Robert N. Dotson , Robert B. Davies , Ira Miller
发明人： Robert N. Dotson , Robert B. Davies , Ira Miller
IPC分类号： H03K17/082 , H03K17/64 , H03K5/153 , H03K5/24 , H03K17/08
CPC分类号： H03K17/0826 , H03K17/64
摘要： In a voltage boost circuit for use in conjunction with a bubble memory operational driver, an output transistor is alternately turned on and off. When turned on, current flows through an inductor. When turned off, a high voltage is built up across the inductor which causes charge to be transferred to and stored in a capacitor. When the output transistor is turned on so as to permit current to flow through the inductor, a .DELTA.V.sub.BE /R current representative of the current flowing through the output transistor is compared with a .DELTA.V.sub.BE /R reference current. When the first current reaches and exceeds the reference current, the output transistor is turned off.
摘要翻译：在与气泡存储器操作驱动器一起使用的升压电路中，输出晶体管交替地导通和截止。导通时，电流流经电感。当关闭时，在电感器上建立高电压，这将导致电荷被转移并存储在电容器中。当输出晶体管导通以允许电流流过电感器时，将代表流过输出晶体管的电流的DELTA VBE / R电流与DELTA VBE / R参考电流进行比较。当第一电流达到并超过参考电流时，输出晶体管截止。

5. 发明授权

US4504928A Current ramp generator 失效
标题翻译：电流斜坡发生器
公开(公告)号：US4504928A
公开(公告)日：1985-03-12
申请号：US413050
申请日：1982-08-30
申请人： Robert B. Davies , Ira Miller , Robert N. Dotson
发明人： Robert B. Davies , Ira Miller , Robert N. Dotson
IPC分类号： G11C19/08 , H03K4/08
CPC分类号： G11C19/0858
摘要： A current ramp generator is provided for controlling the fall time of a bubble generate waveform of a bubble memory system. Gate circuitry is responsive to a digital input signal and provides an initializing signal to a current source. The current source charges a capacitor and thereby provides an increasing signal to a current mirror whose output sinks current from a control amplifier of the bubble memory system.
摘要翻译：提供电流斜坡发生器用于控制气泡存储系统的气泡产生波形的下降时间。门电路响应于数字输入信号并向电流源提供初始化信号。电流源对电容器充电，从而向电流镜提供增加的信号，电流镜的输出从气泡存储器系统的控制放大器吸收电流。

6. 发明授权

US4461989A Voltage sense circuit for a bubble memory voltage booster 失效
标题翻译：用于气泡存储器电压增压器的电压检测电路
公开(公告)号：US4461989A
公开(公告)日：1984-07-24
申请号：US412069
申请日：1982-08-27
申请人： Robert N. Dotson , Robert B. Davies , Ira Miller
发明人： Robert N. Dotson , Robert B. Davies , Ira Miller
IPC分类号： G11C5/14 , G05F1/10 , G05F3/20
CPC分类号： G11C5/145
摘要： In a voltage boost circuit for use in conjunction with a bubble memory operational driver, an output transistor alternately turns on and off so as to permit current to flow through an inductor which, when terminated by turning off the output transistor, causes a high voltage to be built up across the inductor which causes charge to be transferred to and stored in a capacitor. The output transistor is not turned on again until the voltage across the inductor falls below a predetermined value. A current mirror circuit is coupled to the comparator input and includes a buffer transistor which, when the voltage at the comparator input exceeds the break-down voltage of the buffer transistor, acts as a BV.sub.ceo level shifter.
摘要翻译：在与气泡存储器操作驱动器结合使用的升压电路中，输出晶体管交替地导通和截止，以允许电流流过电感器，当通过关断输出晶体管而终止时，电感引起高电压在整个电感上形成电荷，使电荷转移并存储在电容器中。直到电感两端的电压下降到预定值以下，输出晶体管才再次导通。电流镜电路耦合到比较器输入，并且包括缓冲晶体管，当比较器输入端的电压超过缓冲晶体管的击穿电压时，缓冲晶体管充当BVceo电平移位器。

7. 发明授权

US4485352A Current amplifier 失效
标题翻译：电流放大器
公开(公告)号：US4485352A
公开(公告)日：1984-11-27
申请号：US413052
申请日：1982-08-30
申请人： Robert B. Davies , Robert N. Dotson , Michael W. Null
发明人： Robert B. Davies , Robert N. Dotson , Michael W. Null
IPC分类号： H03F3/343 , H03F3/04
CPC分类号： H03F3/343
摘要： A current amplifier uses a current mirror arrangement as an operational amplifier whose output has limited swing. The limited swing is achieved through a plurality of series connected diodes connected to a control input of the amplifier and to the output of the operational amplifier. The control input is coupled through a transistor to inhibit the output of the current mirror arrangement. The output node is coupled to an output for the current amplifier through a Darlington arrangement which provides high current gain.
摘要翻译：电流放大器使用电流镜布置作为输出具有有限摆幅的运算放大器。通过连接到放大器的控制输入和运算放大器的输出的多个串联连接的二极管实现有限的摆幅。控制输入通过晶体管耦合以阻止电流镜布置的输出。输出节点通过提供高电流增益的达林顿配置耦合到电流放大器的输出端。

8. 发明授权

US4501974A Pulse stretching and level shifting circuit 失效
标题翻译：脉冲拉伸和电平移位电路
公开(公告)号：US4501974A
公开(公告)日：1985-02-26
申请号：US449035
申请日：1982-12-13
申请人： Ira Miller , Michael W. Null , Robert N. Dotson
发明人： Ira Miller , Michael W. Null , Robert N. Dotson
IPC分类号： H03K5/003 , H03K5/04 , H03K17/56 , H03K3/017
CPC分类号： H03K5/003 , H03K5/04
摘要： A pulse stretching integrated circuit includes an on-chip capacitor. A first transistor means including an input transistor and an emitter follower transistor supplies a charging current to the capacitor so as to charge it to a first voltage when an input signal pulse is in a first logical state. A differential transistor pair has a first input coupled to the emitter follower transistor and to the capacitor and has a second input coupled to a reference voltage for generating a first output when the capacitor voltage is less than the reference voltage and for generating a second output when the capacitive voltage is greater than the reference voltage. An additional transistor is coupled to the capacitor for discharging the capacitor when the input signal pulse is in a second logical state causing the voltage at the first input of the differential pair to fall below the reference voltage.
摘要翻译：脉冲拉伸集成电路包括片上电容器。包括输入晶体管和射极跟随器晶体管的第一晶体管装置向电容器提供充电电流，以便当输入信号脉冲处于第一逻辑状态时将其充电到第一电压。差分晶体管对具有耦合到射极跟随器晶体管和电容器的第一输入，并且具有耦合到参考电压的第二输入，用于当电容器电压小于参考电压时产生第一输出，并且当第电容电压大于参考电压。当输入信号脉冲处于第二逻辑状态时，附加晶体管耦合到电容器，用于对电容器进行放电，导致差分对的第一输入处的电压低于参考电压。

9. 发明授权

US5726597A Method and circuit for reducing offset voltages for a differential input stage 失效
标题翻译：用于降低差分输入级的失调电压的方法和电路
公开(公告)号：US5726597A
公开(公告)日：1998-03-10
申请号：US706095
申请日：1996-08-30
申请人： Thomas D. Petty , Richard S. Griffith , Robert L. Vyne , Robert N. Dotson
发明人： Thomas D. Petty , Richard S. Griffith , Robert L. Vyne , Robert N. Dotson
IPC分类号： H03F3/45 , H03K5/24 , H03K5/22
CPC分类号： H03K5/2481 , H03F3/45762 , H03F2203/45342
摘要： A trim circuit (10) and method of reducing offset voltages in a differential input stage. The differential input transistors (32 and 42) have separate bulk terminals for receiving a voltage to compensate for the input offset voltage. A current source (60) supplies a static current to the offset compensation circuit for generating a bias voltage at node (55). The transistors (64 and 66) receive a voltage at input terminals (30 and 40) and supply an additional current to an offset compensation circuit (20). A switch circuit (50) has switch pairs (52, 56, and 54, 58) for transferring a voltage to the bulk terminal of one of the differential transistors (32 and 42) while grounding the bulk terminal of the other transistor. The differential voltage supplied across the bulk terminals of transistors (32 and 42) changes the threshold voltage of the transistors reducing the offset voltage of the input stage.
摘要翻译：一种微调电路（10）和减小差分输入级中的偏移电压的方法。差分输入晶体管（32和42）具有单独的体积端子，用于接收电压以补偿输入偏移电压。电流源（60）将静态电流提供给偏移补偿电路，用于在节点（55）处产生偏置电压。晶体管（64和66）在输入端（30和40）处接收电压，并向偏移补偿电路（20）提供附加电流。开关电路（50）具有用于将电压传送到差分晶体管（32和42）中的一个的体电极的开关对（52,56和54,58），同时接地另一个晶体管的体端子。在晶体管（32和42）的批量端子之间提供的差分电压改变了晶体管的阈值电压，从而降低了输入级的偏移电压。

10. 发明授权

US5734296A Low voltage operational amplifier input stage and method 失效
标题翻译：低压运算放大器输入级和方法
公开(公告)号：US5734296A
公开(公告)日：1998-03-31
申请号：US618671
申请日：1996-03-19
申请人： Robert N. Dotson , Richard S. Griffith , Robert L. Vyne
发明人： Robert N. Dotson , Richard S. Griffith , Robert L. Vyne
IPC分类号： H03F3/30 , H03F3/343 , H03F3/45 , H03F3/16
CPC分类号： H03F3/4508 , H03F3/3067 , H03F3/343 , H03F3/45076 , H03F2203/45028 , H03F2203/45182
摘要： Low voltage operational amplifier (10) operates in a voltage range of one to eight volts over a temperature range of 0.degree. to 70.degree. centigrade. Op amp input stage (12) uses N-channel depletion-mode MOSFETs to provide amplification of the differential input and maintain constant transconductance. Source follower MOSFET (13) provides unity gain in transferring the AC signal, STAGE-1 OUTPUT, to the base of current sinking transistor (18). Sink control circuit (14) and source control circuit (22) generate the base drive currents for transistors (18) and (24). The signal at the output of MOSFET (13) either causes the sink transistor (18) to sink current or the signal to be transposed by means of a translinear loop (16) and causes the source transistor (24) to source current. An output stage provides approximately fifty milliamps of current drive and is quiescent until the output driver is selected.
摘要翻译：低压运算放大器（10）在0至70℃的温度范围内工作在1-8伏特的电压范围内。运算放大器输入级（12）使用N沟道耗尽型MOSFET来提供差分输入的放大并保持恒定的跨导。源极跟随器MOSFET（13）在将AC信号STAGE-1 OUTPUT传送到电流吸收晶体管（18）的基极时提供单位增益。漏极控制电路（14）和源极控制电路（22）产生用于晶体管（18）和（24）的基极驱动电流。 MOSFET（13）的输出处的信号或者使得宿晶体管（18）通过一个跨线性环路（16）吸收电流或者被转置的信号，并且使源极晶体管（24）产生电流。输出级提供大约五十毫安的电流驱动器，并且静止，直到选择输出驱动器为止。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式