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    • 6. 发明授权
    • Voltage sense circuit for a bubble memory voltage booster
    • 用于气泡存储器电压增压器的电压检测电路
    • US4461989A
    • 1984-07-24
    • US412069
    • 1982-08-27
    • Robert N. DotsonRobert B. DaviesIra Miller
    • Robert N. DotsonRobert B. DaviesIra Miller
    • G11C5/14G05F1/10G05F3/20
    • G11C5/145
    • In a voltage boost circuit for use in conjunction with a bubble memory operational driver, an output transistor alternately turns on and off so as to permit current to flow through an inductor which, when terminated by turning off the output transistor, causes a high voltage to be built up across the inductor which causes charge to be transferred to and stored in a capacitor. The output transistor is not turned on again until the voltage across the inductor falls below a predetermined value. A current mirror circuit is coupled to the comparator input and includes a buffer transistor which, when the voltage at the comparator input exceeds the break-down voltage of the buffer transistor, acts as a BV.sub.ceo level shifter.
    • 在与气泡存储器操作驱动器结合使用的升压电路中,输出晶体管交替地导通和截止,以允许电流流过电感器,当通过关断输出晶体管而终止时,电感引起高电压 在整个电感上形成电荷,使电荷转移并存储在电容器中。 直到电感两端的电压下降到预定值以下,输出晶体管才再次导通。 电流镜电路耦合到比较器输入,并且包括缓冲晶体管,当比较器输入端的电压超过缓冲晶体管的击穿电压时,缓冲晶体管充当BVceo电平移位器。
    • 7. 发明授权
    • Pulse stretching and level shifting circuit
    • 脉冲拉伸和电平移位电路
    • US4501974A
    • 1985-02-26
    • US449035
    • 1982-12-13
    • Ira MillerMichael W. NullRobert N. Dotson
    • Ira MillerMichael W. NullRobert N. Dotson
    • H03K5/003H03K5/04H03K17/56H03K3/017
    • H03K5/003H03K5/04
    • A pulse stretching integrated circuit includes an on-chip capacitor. A first transistor means including an input transistor and an emitter follower transistor supplies a charging current to the capacitor so as to charge it to a first voltage when an input signal pulse is in a first logical state. A differential transistor pair has a first input coupled to the emitter follower transistor and to the capacitor and has a second input coupled to a reference voltage for generating a first output when the capacitor voltage is less than the reference voltage and for generating a second output when the capacitive voltage is greater than the reference voltage. An additional transistor is coupled to the capacitor for discharging the capacitor when the input signal pulse is in a second logical state causing the voltage at the first input of the differential pair to fall below the reference voltage.
    • 脉冲拉伸集成电路包括片上电容器。 包括输入晶体管和射极跟随器晶体管的第一晶体管装置向电容器提供充电电流,以便当输入信号脉冲处于第一逻辑状态时将其充电到第一电压。 差分晶体管对具有耦合到射极跟随器晶体管和电容器的第一输入,并且具有耦合到参考电压的第二输入,用于当电容器电压小于参考电压时产生第一输出,并且当第 电容电压大于参考电压。 当输入信号脉冲处于第二逻辑状态时,附加晶体管耦合到电容器,用于对电容器进行放电,导致差分对的第一输入处的电压低于参考电压。
    • 8. 发明授权
    • Peak storage amplifier
    • 峰值存储放大器
    • US4533844A
    • 1985-08-06
    • US694895
    • 1985-01-24
    • Ira MillerRobert B. Davies
    • Ira MillerRobert B. Davies
    • G01R19/04G11C27/02H03F3/72H03F3/45
    • H03F3/72G01R19/04G11C27/026
    • A peak storage amplifier for storing successive peaks of a waveform for a sufficient period of time to insure accurate data transmittal is provided. A differential amplifier is responsive to the waveform and drives a PNP transistor that provides an output. A capacitor stores the peaks of the output waveform as long as a clamp signal is received by a current source that inhibits the current source from sinking the output to ground. Since the PNP transistor is continually reversed biased and the base-collector capacitance is small, the storage capacitor's discharge due to the amplifiers inherent turn-off characteristics is minimized. A compensation capacitor coupled to the differential amplifier prevents the collapse of a Wilson mirror serving as a load to the differential amplifier.
    • 提供一种峰值存储放大器,用于在足够的时间段内存储波形的连续峰值以确保准确的数据传输。 差分放大器响应波形并驱动提供输出的PNP晶体管。 一个电容器存储输出波形的峰值,只要钳位信号被电流源接收,阻止电流源将输出端接地。 由于PNP晶体管被连续反向偏置并且基极 - 集电极电容小,所以存储电容器由放大器固有的关断特性引起的放电最小化。 耦合到差分放大器的补偿电容器防止作为负载的威尔逊反射镜的塌陷到差分放大器。
    • 9. 发明授权
    • Amplifier with independent quiescent output voltage control
    • 具有独立静态输出电压控制的放大器
    • US4433302A
    • 1984-02-21
    • US352903
    • 1982-02-26
    • Robert B. DaviesIra Miller
    • Robert B. DaviesIra Miller
    • H03F1/30H03F3/30H03F3/45
    • H03F3/3066H03F1/302
    • A circuit for providing a quiescent output voltage having a load resistor, a current means for establishing a load current through the load resistor, and a mirror means for summing a mirror current with the load current at an output terminal. The current means comprises a differential amplifier driving a multiplying mirror. The mirror means comprises a Wilson mirror for providing one of its tail currents as the additional current to be summed at the output terminal. The circuit provides a quiescent output voltage that is independent of the reference voltage supplying the differential amplifier or the tail current through the differential amplifier.
    • 用于提供具有负载电阻器的静态输出电压的电路,用于建立通过负载电阻器的负载电流的电流装置,以及用于将镜电流与输出端子处的负载电流相加的反射镜装置。 电流装置包括驱动倍增镜的差动放大器。 反射镜装置包括威尔逊反射镜,用于将其尾部电流中的一个作为在输出端子处相加的附加电流。 电路提供静态输出电压,独立于通过差分放大器提供差分放大器的参考电压或尾电流。