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1. 发明申请

US20110023007A1 Associating Workflows With Code Sections In A Document Control System 有权
标题翻译：将工作流与文档控制系统中的代码段相关联
公开(公告)号：US20110023007A1
公开(公告)日：2011-01-27
申请号：US12507992
申请日：2009-07-23
申请人： Robert B. Chumbley , Jacob D. Eisinger , Travis M. Grigsby , Christopher M. Laffoon , Rohan U. Mandrekar
发明人： Robert B. Chumbley , Jacob D. Eisinger , Travis M. Grigsby , Christopher M. Laffoon , Rohan U. Mandrekar
IPC分类号： G06F9/44
CPC分类号： G06F8/71 , G06F8/73
摘要： Systems, methods, and articles of manufacture for facilitating workflow control for a document. In one embodiment, a portion of computer program source code is associated with a workflow. The computer program is monitored for reference to or by the portion of the computer program source code. In response to a reference to or by the computer program source code, the workflow is fired off.
摘要翻译：用于促进文档的工作流控制的系统，方法和制品。在一个实施例中，计算机程序源代码的一部分与工作流相关联。监视计算机程序以引用计算机程序源代码或由计算机程序源代码的一部分引用。响应于对计算机程序源代码的引用或响应，工作流被关闭。

2. 发明授权

US09146735B2 Associating workflows with code sections in a document control system 有权
标题翻译：将工作流与文档控制系统中的代码段相关联
公开(公告)号：US09146735B2
公开(公告)日：2015-09-29
申请号：US12507992
申请日：2009-07-23
申请人： Robert B. Chumbley , Jacob D. Eisinger , Travis M. Grigsby , Christopher M. Laffoon , Rohan U. Mandrekar
发明人： Robert B. Chumbley , Jacob D. Eisinger , Travis M. Grigsby , Christopher M. Laffoon , Rohan U. Mandrekar
IPC分类号： G06F9/44
CPC分类号： G06F8/71 , G06F8/73
摘要： Systems, methods, and articles of manufacture for facilitating workflow control for a document. In one embodiment, a portion of computer program source code is associated with a workflow. The computer program is monitored for reference to or by the portion of the computer program source code. In response to a reference to or by the computer program source code, the workflow is fired off.
摘要翻译：用于促进文档的工作流控制的系统，方法和制品。在一个实施例中，计算机程序源代码的一部分与工作流相关联。监视计算机程序以引用计算机程序源代码或由计算机程序源代码的一部分引用。响应于对计算机程序源代码的引用或响应，工作流被关闭。

3. 发明授权

US08257092B2 Redundant clock channel for high reliability connectors 失效
标题翻译：冗余时钟通道，用于高可靠性连接器
公开(公告)号：US08257092B2
公开(公告)日：2012-09-04
申请号：US12946328
申请日：2010-11-15
申请人： Sungjun Chun , Daniel M. Dreps , Dierk Kaller , Rohan U. Mandrekar , Lei Shan
发明人： Sungjun Chun , Daniel M. Dreps , Dierk Kaller , Rohan U. Mandrekar , Lei Shan
IPC分类号： H01R12/00
CPC分类号： G06F1/185 , G06F1/10
摘要： A memory module configured to connect to a slot of a data processing system. A set of tabs is connected to the module and configured to electrically connect the module to the slot and to electrically connect the module to a clock of the data processing system. The set of tabs includes a first tab, a second tab, a third tab, and a fourth tab. The first tab and the second tab are opposite the third tab and the fourth tab. The first tab comprises a positive type tab, the second tab comprises a negative type tab, the third tab comprises a positive type tab, and the fourth tab comprises a negative type tab. The first and third tabs are configured to provide a first electrical connection to the clock. The second and fourth tabs are configured to provide a second electrical connection to the clock. Together, the first, second, third, and fourth tabs comprise two dual tabs.
摘要翻译：配置为连接到数据处理系统的时隙的存储器模块。一组标签连接到模块并且被配置为将模块电连接到插槽并且将模块电连接到数据处理系统的时钟。该组标签包括第一标签，第二标签，第三标签和第四标签。第一个选项卡和第二个选项卡与第三个选项卡和第四个选项卡相对。第一标签包括一个正型标签，该第二标签包括一个负型标签，该第三标签包括一个正型标签，该第四标签包括一个负型标签。第一和第三选项卡被配置为提供到时钟的第一电连接。第二和第四选项卡被配置为提供与时钟的第二电连接。一起，第一，第二，第三和第四标签包括两个双标签。

4. 发明申请

US20120200346A1 Through-Hole-Vias In Multi-Layer Printed Circuit Boards 有权
公开(公告)号：US20120200346A1
公开(公告)日：2012-08-09
申请号：US13448787
申请日：2012-04-17
申请人： Moises Cases , Tae Hong Kim , Rohan U. Mandrekar , Nusrat I. Sherali
发明人： Moises Cases , Tae Hong Kim , Rohan U. Mandrekar , Nusrat I. Sherali
IPC分类号： H02J3/10 , H05K3/00
CPC分类号： H05K3/0094 , H05K1/0234 , H05K1/0242 , H05K1/0251 , H05K1/09 , H05K1/167 , H05K3/0047 , H05K3/244 , H05K3/429 , H05K2201/0391 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , Y10T156/1057 , Y10T428/12528
摘要： Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.

5. 发明申请

US20120081873A1 IMPLEMENTING HIGH-SPEED SIGNALING VIA DEDICATED PRINTED CIRCUIT-BOARD MEDIA 失效
标题翻译：通过专用印刷电路板实现高速信号
公开(公告)号：US20120081873A1
公开(公告)日：2012-04-05
申请号：US12895251
申请日：2010-09-30
申请人： Douglas A. Baska , Daniel M. Dreps , Rohan U. Mandrekar , Roger D. Weekly
发明人： Douglas A. Baska , Daniel M. Dreps , Rohan U. Mandrekar , Roger D. Weekly
IPC分类号： H05K1/11 , H05K3/10
CPC分类号： H05K3/4623 , H05K1/0216 , H05K1/141 , H05K3/368 , H05K2201/10189 , Y10T29/49126 , Y10T29/49162 , Y10T29/53004
摘要： Some embodiments of the inventive subject matter are directed to a first circuit board configured to include an electronic component. The electronic component includes a plurality of leads. The first circuit board includes first wires configured to connect to a first portion of the plurality of leads. The second circuit board is affixed to the first circuit board. The second circuit board includes second wires. The second circuit board is smaller in size than the first circuit board. A plurality of electrical connectors extend through a thickness of the first circuit board and are configured to connect a second portion of the plurality of leads to the second wires.
摘要翻译：本发明的一些实施例涉及被配置为包括电子部件的第一电路板。电子部件包括多个引线。第一电路板包括被配置为连接到多个引线的第一部分的第一布线。第二电路板固定在第一电路板上。第二电路板包括第二导线。第二个电路板的尺寸比第一个电路板小。多个电连接器延伸穿过第一电路板的厚度，并且被配置为将多个引线的第二部分连接到第二导线。

6. 发明申请

US20120193135A1 Through-Hole-Vias In Multi-Layer Printed Circuit Boards 有权
标题翻译：多层印刷电路板中的通孔
公开(公告)号：US20120193135A1
公开(公告)日：2012-08-02
申请号：US13446727
申请日：2012-04-13
申请人： Moises Cases , Tae Hong Kim , Rohan U. Mandrekar , Nusrat I. Sherali
发明人： Moises Cases , Tae Hong Kim , Rohan U. Mandrekar , Nusrat I. Sherali
IPC分类号： H05K1/11
CPC分类号： H05K3/0094 , H05K1/0234 , H05K1/0242 , H05K1/0251 , H05K1/09 , H05K1/167 , H05K3/0047 , H05K3/244 , H05K3/429 , H05K2201/0391 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , Y10T156/1057 , Y10T428/12528
摘要： Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.
摘要翻译：描述了例如多层印刷电路板（“PCB”），以及制造和使用这种包括层压层的PCB的方法; 穿过层压体层的至少一个通孔，以及包含在通孔内的通孔导体，所述通孔导体包括使用部分和未使用部分，所述通孔导体包括涂覆有电导率低于铜。

7. 发明申请

US20120120577A1 REDUNDANT CLOCK CHANNEL FOR HIGH RELIABILITY CONNECTORS 失效
标题翻译：用于高可靠性连接器的冗余时钟通道
公开(公告)号：US20120120577A1
公开(公告)日：2012-05-17
申请号：US12946328
申请日：2010-11-15
申请人： Sungjun Chun , Daniel M. Dreps , Dierk Kaller , Rohan U. Mandrekar , Lei Shan
发明人： Sungjun Chun , Daniel M. Dreps , Dierk Kaller , Rohan U. Mandrekar , Lei Shan
IPC分类号： G06F1/16
CPC分类号： G06F1/185 , G06F1/10
摘要： A memory module configured to connect to a slot of a data processing system. A set of tabs is connected to the module and configured to electrically connect the module to the slot and to electrically connect the module to a clock of the data processing system. The set of tabs includes a first tab, a second tab, a third tab, and a fourth tab. The first tab and the second tab are opposite the third tab and the fourth tab. The first tab comprises a positive type tab, the second tab comprises a negative type tab, the third tab comprises a positive type tab, and the fourth tab comprises a negative type tab. The first and third tabs are configured to provide a first electrical connection to the clock. The second and fourth tabs are configured to provide a second electrical connection to the clock. Together, the first, second, third, and fourth tabs comprise two dual tabs.
摘要翻译：配置为连接到数据处理系统的时隙的存储器模块。一组标签连接到模块并且被配置为将模块电连接到插槽并且将模块电连接到数据处理系统的时钟。该组标签包括第一标签，第二标签，第三标签和第四标签。第一个选项卡和第二个选项卡与第三个选项卡和第四个选项卡相对。第一标签包括一个正型标签，该第二标签包括一个负型标签，该第三标签包括一个正型标签，该第四标签包括一个负型标签。第一和第三选项卡被配置为提供到时钟的第一电连接。第二和第四选项卡被配置为提供与时钟的第二电连接。一起，第一，第二，第三和第四标签包括两个双标签。

8. 发明授权

US08766107B2 Through-hole-vias in multi-layer printed circuit boards 有权
标题翻译：多层印刷电路板中的通孔
公开(公告)号：US08766107B2
公开(公告)日：2014-07-01
申请号：US13446727
申请日：2012-04-13
申请人： Moises Cases , Tae Hong Kim , Rohan U. Mandrekar , Nusrat I. Sherali
发明人： Moises Cases , Tae Hong Kim , Rohan U. Mandrekar , Nusrat I. Sherali
IPC分类号： H05K1/11
CPC分类号： H05K3/0094 , H05K1/0234 , H05K1/0242 , H05K1/0251 , H05K1/09 , H05K1/167 , H05K3/0047 , H05K3/244 , H05K3/429 , H05K2201/0391 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , Y10T156/1057 , Y10T428/12528
摘要： Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.
摘要翻译：描述了例如多层印刷电路板（“PCB”），以及制造和使用这种包括层压层的PCB的方法; 穿过层压体层的至少一个通孔，以及包含在通孔内的通孔导体，所述通孔导体包括使用部分和未使用部分，所述通孔导体包括涂覆有电导率低于铜。

9. 发明授权

US08593621B2 Testing an optical fiber connection 失效
标题翻译：测试光纤连接
公开(公告)号：US08593621B2
公开(公告)日：2013-11-26
申请号：US12771245
申请日：2010-04-30
申请人： Kevin J. Bills , Mahesh Bohra , Hong T. Dang , Rohan U. Mandrekar , Roger D. Weekly
发明人： Kevin J. Bills , Mahesh Bohra , Hong T. Dang , Rohan U. Mandrekar , Roger D. Weekly
IPC分类号： G01N21/00
CPC分类号： G01M11/3154
摘要： For testing whether an optical fiber is properly connected to a device, a beam of light is output to the optical fiber. An intensity is detected of light reflected by the device back through the optical fiber in response to the beam of light. In response to the detected intensity, a determination is made of whether the optical fiber is properly connected to the device.
摘要翻译：为了测试光纤是否正确连接到设备，光束被输出到光纤。通过响应于光束，通过光纤反射的装置反射的光的强度被检测。响应于检测到的强度，确定光纤是否正确连接到设备。

10. 发明申请

US20110267602A1 Testing An Optical Fiber Connection 失效
标题翻译：测试光纤连接
公开(公告)号：US20110267602A1
公开(公告)日：2011-11-03
申请号：US12771245
申请日：2010-04-30
申请人： Kevin J. Bills , Mahesh Bohra , Hong T. Dang , Rohan U. Mandrekar , Roger D. Weekly
发明人： Kevin J. Bills , Mahesh Bohra , Hong T. Dang , Rohan U. Mandrekar , Roger D. Weekly
IPC分类号： G01N21/84
CPC分类号： G01M11/3154
摘要： For testing whether an optical fiber is properly connected to a device, a beam of light is output to the optical fiber. An intensity is detected of light reflected by the device back through the optical fiber in response to the beam of light. In response to the detected intensity, a determination is made of whether the optical fiber is properly connected to the device.
摘要翻译：为了测试光纤是否正确连接到设备，光束被输出到光纤。通过响应于光束，通过光纤反射的装置反射的光的强度被检测。响应于检测到的强度，确定光纤是否正确连接到设备。

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