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    • 1. 发明授权
    • Vertical coffee-stain method for forming self-organized line structures
    • 用于形成自组织线结构的垂直咖啡染色方法
    • US08158465B2
    • 2012-04-17
    • US12484992
    • 2009-06-15
    • Sanjiv SambandanRobert A. StreetAna Claudia Arias
    • Sanjiv SambandanRobert A. StreetAna Claudia Arias
    • H01L21/336
    • B82Y40/00B05D1/185H01L21/288H01L21/76838H01L51/0022H01L51/0508
    • A “vertical” coffee-stain method for producing self-organized line structures and other very fine features that involves disposing a target structure in a solution made up of a fine particle solute dispersed in a liquid solvent such that a “waterline” is formed by the upper (liquid/air) surface of the solution on a targeted linear surface region of the substrate. The solvent is then caused to evaporate at a predetermined rate such that a portion of the solute forms a self-organized “coffee-stain” line structure on the straight-line portion of the substrate surface contacted by the receding waterline. The substrate and staining solution are selected such that the liquid solvent has a stronger attraction to the substrate surface than to itself to produce the required pinning and upward curving waterline. The target structure is optionally periodically raised to generate parallel lines that are subsequently processed to form, e.g., TFTs for large-area electronic devices.
    • 用于生产自组织线结构的“垂直”咖啡染色方法和其它非常细小的特征,其包括将目标结构设置在由分散在液体溶剂中的细颗粒溶质构成的溶液中,使得“水线”由 溶液的上(液/空)表面在基材的目标线性表面区域上。 然后使溶剂以预定的速率蒸发,使得一部分溶质在由后退水线接触的基底表面的直线部分上形成自组织的“咖啡污渍”线结构。 选择底物和染色溶液使得液体溶剂对基底表面的吸引力比其本身具有更强的吸引力以产生所需的钉扎和向上弯曲的水线。 目标结构可选地周期性地升高以产生随后被处理以形成例如用于大面积电子器件的TFT的平行线。
    • 3. 发明申请
    • ELECTRONIC DEVICE WITH UNIQUE ENCODING
    • 具有独特编码的电子设备
    • US20100099220A1
    • 2010-04-22
    • US12645987
    • 2009-12-23
    • Robert A. StreetAna Claudia Arias
    • Robert A. StreetAna Claudia Arias
    • H01L21/50
    • H01L51/0005H01L27/1285H01L27/1288H01L27/1292H01L27/283H01L51/0545
    • An electronic device comprising a thin film transistor (TFT) array and manufacturing methods thereof according to various embodiments. Jet-printed material is deposited on selected partially formed transistors to form completed transistors. Thus, a selected number of the TFTs are connected into the circuit while the remainder of the TFTs are not connected. An electronic read-out of the array identifies the specific array by distinguishing the connected TFTs from the unconnected ones. For a TFT array with n elements there are 2n alternative configurations; therefore, a relatively small number of TFTs can uniquely identify a huge number of devices. Such uniquely encoded devices have applications for encryption, identification and personalization of electronic systems.
    • 一种包括薄膜晶体管(TFT)阵列的电子器件及其制造方法。 喷射印刷材料沉积在选定的部分形成的晶体管上以形成完整的晶体管。 因此,选择数量的TFT连接到电路中,而其余TFT不连接。 阵列的电子读出通过将连接的TFT与未连接的TFT区分开来识别特定的阵列。 对于具有n个元件的TFT阵列,有2n个备选配置; 因此,相对较少的TFT可以唯一地识别大量的设备。 这种唯一编码的设备具有用于电子系统的加密,识别和个性化的应用。
    • 4. 发明授权
    • Electronic device with unique encoding
    • 电子设备具有独特的编码
    • US07897439B2
    • 2011-03-01
    • US12645987
    • 2009-12-23
    • Robert A. StreetAna Claudia Arias
    • Robert A. StreetAna Claudia Arias
    • H01L21/82
    • H01L51/0005H01L27/1285H01L27/1288H01L27/1292H01L27/283H01L51/0545
    • An electronic device comprising a thin film transistor (TFT) array and manufacturing methods thereof according to various embodiments. Jet-printed material is deposited on selected partially formed transistors to form completed transistors. Thus, a selected number of the TFTs are connected into the circuit while the remainder of the TFTs are not connected. An electronic read-out of the array identifies the specific array by distinguishing the connected TFTs from the unconnected ones. For a TFT array with n elements there are 2n alternative configurations; therefore, a relatively small number of TFTs can uniquely identify a huge number of devices. Such uniquely encoded devices have applications for encryption, identification and personalization of electronic systems.
    • 一种包括薄膜晶体管(TFT)阵列的电子器件及其制造方法。 喷射印刷材料沉积在选定的部分形成的晶体管上以形成完整的晶体管。 因此,选择数量的TFT连接到电路中,而其余TFT不连接。 阵列的电子读出通过将连接的TFT与未连接的TFT区分开来识别特定的阵列。 对于具有n个元件的TFT阵列,有2n个备选配置; 因此,相对较少的TFT可以唯一地识别大量的设备。 这种唯一编码的设备具有用于电子系统的加密,识别和个性化的应用。
    • 5. 发明申请
    • Vertical Coffee-Stain Method For Forming Self-Organized Line Structures
    • 用于形成自组织线结构的垂直咖啡 - 污渍方法
    • US20100317159A1
    • 2010-12-16
    • US12484992
    • 2009-06-15
    • Sanjiv SambandanRobert A. StreetAna Claudia Arias
    • Sanjiv SambandanRobert A. StreetAna Claudia Arias
    • H01L21/336B05D5/12
    • B82Y40/00B05D1/185H01L21/288H01L21/76838H01L51/0022H01L51/0508
    • A “vertical” coffee-stain method for producing self-organized line structures and other very fine features that involves disposing a target structure in a solution made up of a fine particle solute dispersed in a liquid solvent such that a “waterline” is formed by the upper (liquid/air) surface of the solution on a targeted linear surface region of the substrate. The solvent is then caused to evaporate at a predetermined rate such that a portion of the solute forms a self-organized “coffee-stain” line structure on the straight-line portion of the substrate surface contacted by the receding waterline. The substrate and staining solution are selected such that the liquid solvent has a stronger attraction to the substrate surface than to itself to produce the required pinning and upward curving waterline. The target structure is optionally periodically raised to generate parallel lines that are subsequently processed to form, e.g., TFTs for large-area electronic devices.
    • 用于生产自组织线结构的“垂直”咖啡染色方法和其它非常细小的特征,其包括将目标结构设置在由分散在液体溶剂中的细颗粒溶质构成的溶液中,使得“水线”由 溶液的上(液/空)表面在基材的目标线性表面区域上。 然后使溶剂以预定的速率蒸发,使得一部分溶质在由后退水线接触的基底表面的直线部分上形成自组织的“咖啡污渍”线结构。 选择底物和染色溶液使得液体溶剂对基底表面的吸引力比其本身具有更强的吸引力以产生所需的钉扎和向上弯曲的水线。 目标结构可选地周期性地升高以产生随后被处理以形成例如用于大面积电子器件的TFT的平行线。
    • 10. 发明申请
    • Thin Film Field Effect Transistor with Dual Semiconductor Layers
    • 具有双半导体层的薄膜场效应晶体管
    • US20120007079A1
    • 2012-01-12
    • US13239078
    • 2011-09-21
    • Sanjiv SambandanAna Claudia AriasGregory Lewis Whiting
    • Sanjiv SambandanAna Claudia AriasGregory Lewis Whiting
    • H01L29/04H01L29/786
    • H01L29/78696H01L29/42384H01L29/78606H01L29/78645
    • A thin film field effect transistor is disclosed which provides improved time-based channel stability. The field effect transistor includes first and second disordered semiconductor layers separated by an insulator. In an embodiment a carrier injection terminal is provided in a thin semiconductor layer closest to the gate terminal. An electric field is established in the thin semiconductor layer. At sufficient field strength, the electric field extends into the second semiconductor layer, which is in contact with the source and drain terminals. At sufficient field strength a channel is established in the second semiconductor layer, permitting current to flow between source and drain terminals. Above a certain gate voltage, there is sufficient free charge is induced in the first semiconductor layer so that the field does not extend into the second semiconductor, effectively shutting off current between source and drain. Single-device transition detection (as well as other applications) may be obtained.
    • 公开了薄膜场效应晶体管,其提供改进的基于时间的信道稳定性。 场效应晶体管包括由绝缘体隔开的第一和第二无序半导体层。 在一个实施例中,载流子注入端子设置在最靠近栅极端子的薄半导体层中。 在薄半导体层中形成电场。 在足够的场强下,电场延伸到与源极和漏极端子接触的第二半导体层。 在足够的场强下,在第二半导体层中建立通道,允许电流在源极和漏极端子之间流动。 在一定的栅极电压之上,在第一半导体层中感应出足够的自由电荷,使得场不延伸到第二半导体中,有效地关闭源极和漏极之间的电流。 可以获得单器件转换检测(以及其他应用)。