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    • 3. 发明申请
    • Electrophysiologic Testing Simulation For Medical Condition Determination
    • 用于医疗状况测定的电生理测试模拟
    • US20110224962A1
    • 2011-09-15
    • US12972718
    • 2010-12-20
    • Jeffrey GoldbergerJason Ng
    • Jeffrey GoldbergerJason Ng
    • G06G7/60
    • G06T7/0012G06F19/321G06T2207/10088G06T2207/30048G16H50/50
    • A system simulates stimulation of scar tissue identified as hyper-enhanced areas in a medical image with variable luminance thresholds and categorizes partially-viable myocardium as distinct from non-viable scar tissue. A cardiac function analysis system includes a repository of imaging data representing a 3D volume comprising a patient heart. A model processor provides a model of the patient heart using the imaging data said model being for use in allocating electrical properties to model parameters determining electrical conductivity associated with image data classified as, (a) scar tissue, (b) impaired tissue and (c) normal heart tissue. The electrical properties allocated to scar tissue are different to electrical properties allocated to normal tissue. A stimulation processor simulates electrical stimulation of the patient heart using the model to identify risk of heart impairment.
    • 系统模拟在具有可变亮度阈值的医学图像中被鉴定为超增强区域的瘢痕组织的刺激,并将部分存活的心肌分类为不可存活的瘢痕组织。 心脏功能分析系统包括代表包括患者心脏的3D体积的成像数据的储存库。 模型处理器使用成像数据提供患者心脏的模型,所述模型用于分配电性质以模拟确定与分类为(a)瘢痕组织,(b)受损组织和(c)的图像数据相关的电导率的参数) )正常心脏组织。 分配给瘢痕组织的电气性质与分配给正常组织的电气性质不同。 刺激处理器使用模型模拟患者心脏的电刺激,以识别心脏损伤的风险。
    • 5. 发明申请
    • Combinatorial at-speed scan testing
    • 组合式高速扫描测试
    • US20060107145A1
    • 2006-05-18
    • US11166432
    • 2005-06-23
    • Atul AthavaleJason Ng
    • Atul AthavaleJason Ng
    • G01R31/28
    • G01R31/318594
    • A processor including a first distributed shift generator associated with a first time domain, wherein the first distributed shift generator is coupled to a first group of scan chains, the first distributed shift generator to send a shift-enable-flop signal to be received by the first group of scan chains. The processor including a second distributed shift generator associated with a second time domain, wherein the second distributed shift generator is coupled to a second group of scan chains, the second distributed shift generator to send a shift-enable-flop signal to be received by the second group of scan chains. The processor including a scan test controller coupled to the first and second distributed shift generators, the scan test controller to provide clocking signals for the first time domain and the second time domain for performing an at-speed test of circuits coupled to the first group of scan chains.
    • 一种处理器,包括与第一时域相关联的第一分布式移位发生器,其中所述第一分布式移位发生器耦合到第一组扫描链,所述第一分布式移位发生器发送要由所述第一时域接收的移位使能触发器信号 第一组扫描链。 所述处理器包括与第二时域相关联的第二分布式移位发生器,其中所述第二分布式移位发生器耦合到第二组扫描链,所述第二分布式移位发生器发送移位使能触发器信号以由 第二组扫描链。 所述处理器包括耦合到所述第一和第二分布式移位发生器的扫描测试控制器,所述扫描测试控制器提供用于所述第一时域的时钟信号和所述第二时域,用于执行耦合到所述第一组的电路的电路的速度测试 扫描链。
    • 7. 发明申请
    • Combinatorial at-speed scan testing
    • 组合式高速扫描测试
    • US20060069973A1
    • 2006-03-30
    • US10955615
    • 2004-09-30
    • Atul AthavaleJason Ng
    • Atul AthavaleJason Ng
    • G01R31/28
    • G01R31/318594
    • A combinatorial at-speed scan testing. A processor including a plurality of distributed slave counters. Each distributed slave counter coupled to a group of scan chains, each distributed slave counter to generate shift-enable-flop signals to be received by the group of scan chains coupled to each distributed slave counter, the shift-enable-flop signals based at least in part on an external shift-enable signal received by the processor. A scan test controller coupled to the plurality of distributed slave counters to provide control signals to the plurality of distributed slave counters to perform an at-speed test of the processor.
    • 组合式高速扫描测试。 一种处理器,包括多个分布式从属计数器。 每个分布式从计数器耦合到一组扫描链,每个分布式从计数器产生要由耦合到每个分布式从计数器的扫描链组接收的移位使能触发器信号,至少移位使能触发信号 部分地由处理器接收到的外部移位使能信号。 耦合到所述多个分布式从属计数器的扫描测试控制器,以向多个分布式从计数器提供控制信号,以执行处理器的速度测试。