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1. 发明授权

US08238362B2 Burst processing modem and related methods 有权
标题翻译：突发处理调制解调器及相关方法
公开(公告)号：US08238362B2
公开(公告)日：2012-08-07
申请号：US12641096
申请日：2009-12-17
申请人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
发明人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
IPC分类号： H04J3/00 , H04B1/38
CPC分类号： H04L1/0071 , H04L1/0045
摘要： A burst processing modem and related methods. Implementations of a first method of demodulating bursts from a plurality of channels may include receiving a plurality of channels from a received beam and separating the plurality of channels and storing a plurality of frames in a random access memory (RAM) array with a channelizer where each frame of the plurality of frames includes one or more bursts. The method may include serially reading, using a demodulator in response to receiving a timing signal, a desired burst from a frame stored in the RAM array wherein a burst time plan identifying the desired burst is used by a receive frame state machine to generate the timing signal. The method may include demodulating and decoding the desired burst using a demodulator and a decoder to produce a quantity of packet data, and sending the quantity of packet data to a specified destination.
摘要翻译：突发处理调制解调器及相关方法。解调来自多个信道的突发的第一种方法的实现可以包括从接收的波束接收多个信道，并且分离多个信道并且在随机存取存储器（RAM）阵列中存储多个帧，其中每个信道多个帧的帧包括一个或多个突发。该方法可以包括串行读取，响应于接收定时信号使用解调器从存储在RAM阵列中的帧中的期望脉冲串，其中标识期望脉冲串的突发时间计划由接收帧状态机使用以产生定时信号。该方法可以包括使用解调器和解码器解调和解码期望的突发，以产生一定数量的分组数据，并将分组数据的数量发送到指定的目的地。

2. 发明申请

US20100091825A1 BURST PROCESSING MODEM 有权
标题翻译： BURST处理调制解调器
公开(公告)号：US20100091825A1
公开(公告)日：2010-04-15
申请号：US12640887
申请日：2009-12-17
申请人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
发明人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
IPC分类号： H04L5/16
CPC分类号： H04L1/0071 , H04L1/0045
摘要： A burst processing modem. Implementations may include a receive side including a channelizer adapted to process a plurality of channels and write a plurality of frames to a receive RAM array. A receive frame state machine may be adapted to generate a timing signal using a burst time plan for the plurality of frames. A demodulator may be coupled with the receive RAM array and adapted to read from the receive RAM array only the one or more bursts from the plurality of frames indicated by the timing signal. A transmit side may include a modulator coupled with a transmit frame state machine, with a transmit RAM array, and a combiner bank. The combiner bank may read the modulated plurality of channels from the transmit RAM array and assemble a plurality of frames using a timing signal generated from a burst time plan by the transmit frame state machine.
摘要翻译：突发处理调制解调器实现可以包括接收侧，包括适于处理多个信道并且将多个帧写入接收RAM阵列的信道化器。接收帧状态机可以适于使用针对所述多个帧的突发时间计划来生成定时信号。解调器可以与接收RAM阵列耦合，并且适于仅从接收RAM阵列读取来自由定时信号指示的多个帧中的一个或多个突发。发送侧可以包括与发送帧状态机耦合的调制器，发送RAM阵列和组合器组。组合器组可以从发送RAM阵列读取经调制的多个信道，并使用由发送帧状态机从突发时间计划生成的定时信号来组合多个帧。

3. 发明申请

US20120128047A1 BURST PROCESSING MODEM 有权
标题翻译： BURST处理调制解调器
公开(公告)号：US20120128047A1
公开(公告)日：2012-05-24
申请号：US13363254
申请日：2012-01-31
申请人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
发明人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
IPC分类号： H04B1/38
CPC分类号： H04L1/0071 , H04L1/0045
摘要： A burst processing modem. Implementations may include a receive side including a channelizer adapted to process a plurality of channels and write a plurality of frames to a receive RAM array. A receive frame state machine may be adapted to generate a timing signal using a burst time plan for the plurality of frames. A demodulator may be coupled with the receive RAM array and adapted to read from the receive RAM array only the one or more bursts from the plurality of frames indicated by the timing signal. A transmit side may include a modulator coupled with a transmit frame state machine, with a transmit RAM array, and a combiner bank. The combiner bank may read the modulated plurality of channels from the transmit RAM array and assemble a plurality of frames using a timing signal generated from a burst time plan by the transmit frame state machine.
摘要翻译：突发处理调制解调器实现可以包括接收侧，包括适于处理多个信道并且将多个帧写入接收RAM阵列的信道化器。接收帧状态机可以适于使用针对所述多个帧的突发时间计划来生成定时信号。解调器可以与接收RAM阵列耦合，并且适于仅从接收RAM阵列读取来自由定时信号指示的多个帧中的一个或多个突发。发送侧可以包括与发送帧状态机耦合的调制器，发送RAM阵列和组合器组。组合器组可以从发送RAM阵列读取经调制的多个信道，并使用由发送帧状态机从突发时间计划生成的定时信号来组合多个帧。

4. 发明授权

US08107515B2 Burst processing modem 有权
标题翻译：突发处理调制解调器
公开(公告)号：US08107515B2
公开(公告)日：2012-01-31
申请号：US12640887
申请日：2009-12-17
申请人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
发明人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
IPC分类号： H04B1/38 , H04L5/16
CPC分类号： H04L1/0071 , H04L1/0045
摘要： A burst processing modem. Implementations may include a receive side including a channelizer adapted to process a plurality of channels and write a plurality of frames to a receive RAM array. A receive frame state machine may be adapted to generate a timing signal using a burst time plan for the plurality of frames. A demodulator may be coupled with the receive RAM array and adapted to read from the receive RAM array only the one or more bursts from the plurality of frames indicated by the timing signal. A transmit side may include a modulator coupled with a transmit frame state machine, with a transmit RAM array, and a combiner bank. The combiner bank may read the modulated plurality of channels from the transmit RAM array and assemble a plurality of frames using a timing signal generated from a burst time plan by the transmit frame state machine.
摘要翻译：突发处理调制解调器实现可以包括接收侧，包括适于处理多个信道并且将多个帧写入接收RAM阵列的信道化器。接收帧状态机可以适于使用针对所述多个帧的突发时间计划来生成定时信号。解调器可以与接收RAM阵列耦合，并且适于仅从接收RAM阵列读取来自由定时信号指示的多个帧中的一个或多个突发。发送侧可以包括与发送帧状态机耦合的调制器，发送RAM阵列和组合器组。组合器组可以从发送RAM阵列读取经调制的多个信道，并使用由发送帧状态机从突发时间计划生成的定时信号来组合多个帧。

5. 发明授权

US08811460B2 Burst processing modem 有权
标题翻译：突发处理调制解调器
公开(公告)号：US08811460B2
公开(公告)日：2014-08-19
申请号：US13363254
申请日：2012-01-31
申请人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
发明人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
IPC分类号： H04B1/38 , H04L5/16 , H04L1/00
CPC分类号： H04L1/0071 , H04L1/0045
摘要： A burst processing modem. Implementations may include a receive side including a channelizer adapted to process a plurality of channels and write a plurality of frames to a receive RAM array. A receive frame state machine may be adapted to generate a timing signal using a burst time plan for the plurality of frames. A demodulator may be coupled with the receive RAM array and adapted to read from the receive RAM array only the one or more bursts from the plurality of frames indicated by the timing signal. A transmit side may include a modulator coupled with a transmit frame state machine, with a transmit RAM array, and a combiner bank. The combiner bank may read the modulated plurality of channels from the transmit RAM array and assemble a plurality of frames using a timing signal generated from a burst time plan by the transmit frame state machine.
摘要翻译：突发处理调制解调器实现可以包括接收侧，包括适于处理多个信道并且将多个帧写入接收RAM阵列的信道化器。接收帧状态机可以适于使用针对所述多个帧的突发时间计划来生成定时信号。解调器可以与接收RAM阵列耦合，并且适于仅从接收RAM阵列读取来自由定时信号指示的多个帧中的一个或多个突发。发送侧可以包括与发送帧状态机耦合的调制器，发送RAM阵列和组合器组。组合器组可以从发送RAM阵列读取经调制的多个信道，并使用由发送帧状态机从突发时间计划生成的定时信号来组合多个帧。

6. 发明申请

US20100091777A1 BURST PROCESSING MODEM AND RELATED METHODS 有权
标题翻译： BURST处理调制解调器及相关方法
公开(公告)号：US20100091777A1
公开(公告)日：2010-04-15
申请号：US12641096
申请日：2009-12-17
申请人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
发明人： Richard Hollingsworth Cannon , John Scott Crockett , Cris M. Mamaril , Mark Dale
IPC分类号： H04L12/56 , H04J3/24
CPC分类号： H04L1/0071 , H04L1/0045
摘要： A burst processing modem and related methods. Implementations of a first method of demodulating bursts from a plurality of channels may include receiving a plurality of channels from a received beam and separating the plurality of channels and storing a plurality of frames in a random access memory (RAM) array with a channelizer where each frame of the plurality of frames includes one or more bursts. The method may include serially reading, using a demodulator in response to receiving a timing signal, a desired burst from a frame stored in the RAM array wherein a burst time plan identifying the desired burst is used by a receive frame state machine to generate the timing signal. The method may include demodulating and decoding the desired burst using a demodulator and a decoder to produce a quantity of packet data, and sending the quantity of packet data to a specified destination.
摘要翻译：突发处理调制解调器及相关方法。解调来自多个信道的突发的第一种方法的实现可以包括从接收的波束接收多个信道，并且分离多个信道并且在随机存取存储器（RAM）阵列中存储多个帧，其中每个信道多个帧的帧包括一个或多个突发。该方法可以包括串行读取，响应于接收定时信号使用解调器从存储在RAM阵列中的帧中的期望脉冲串，其中标识期望脉冲串的突发时间计划由接收帧状态机使用以产生定时信号。该方法可以包括使用解调器和解码器解调和解码期望的突发，以产生一定数量的分组数据，并将分组数据的数量发送到指定的目的地。

7. 发明授权

US08374564B2 Signal filtering system and related methods 有权
标题翻译：信号滤波系统及相关方法
公开(公告)号：US08374564B2
公开(公告)日：2013-02-12
申请号：US13196800
申请日：2011-08-02
申请人： Richard M. Miller , Cris M. Mamaril
发明人： Richard M. Miller , Cris M. Mamaril
IPC分类号： H04B1/06
CPC分类号： H04B1/123 , Y10S430/111 , Y10S430/122 , Y10S430/126
摘要： A burst demodulator and method of obtaining a signal of interest from many signals of interest within a composite signal. Implementations may include receiving a composite signal, centering a replica of the interfering signal relative to the composite signal, reducing the composite signal to the bandwidth of a desired signal of interest, and canceling the remaining portion of the interfering signal.
摘要翻译：一种突发解调器和从复合信号中的许多感兴趣的信号获得感兴趣的信号的方法。实现可以包括接收复合信号，使干扰信号的副本相对于复合信号居中，将复合信号减小到期望的感兴趣信号的带宽，并且消除干扰信号的剩余部分。

8. 发明申请

US20120082185A1 Embedded Meta-Carrier with Spread Spectrum for Periodic-Burst Carriers via Overlaid Carriers 有权
标题翻译：通过覆盖载体的周期性突发载波的扩频嵌入式元载波
公开(公告)号：US20120082185A1
公开(公告)日：2012-04-05
申请号：US13044446
申请日：2011-03-09
申请人： Michael Beeler , Cris M. Mamaril , Jeffery Harig
发明人： Michael Beeler , Cris M. Mamaril , Jeffery Harig
IPC分类号： H04B1/69
CPC分类号： H04B1/7103 , H04L27/0006
摘要： A method for identifying the presence of an electronic transmission comprising detecting, by a detecting device, the presence of a burst of electromagnetic energy that results from the presence of an original carrier signal and transmitting, by a transmitting device, a spread spectrum meta-carrier signal within a portion of a bandwidth of the original carrier signal, wherein the meta-carrier signal contains information about the original carrier signal and is transmitted such that the meta-carrier signal occupies at least a portion of a bandwidth of the original carrier signal during the presence of the burst of electromagnetic energy.
摘要翻译：一种用于识别电子传输的存在的方法，包括由检测装置检测由原始载波信号的存在产生的电磁能量的突发的存在，并由发射装置发射扩频元载波信号在原始载波信号的带宽的一部分内，其中元载波信号包含关于原始载波信号的信息，并且被传输，使得元载波信号占据原载波信号的带宽的至少一部分存在电磁能量的爆发。

9. 发明申请

US20110287730A1 SIGNAL FILTERING SYSTEM AND RELATED METHODS 有权
标题翻译：信号滤波系统及相关方法
公开(公告)号：US20110287730A1
公开(公告)日：2011-11-24
申请号：US13196800
申请日：2011-08-02
申请人： Richard M. Miller , Cris M. Mamaril
发明人： Richard M. Miller , Cris M. Mamaril
IPC分类号： H04W4/00
CPC分类号： H04B1/123 , Y10S430/111 , Y10S430/122 , Y10S430/126
摘要： A signal filtering system for a frequency reuse system. A first implementation may include a downlink baseband signal, coupled to a downlink bandwidth filter, including a composite received signal including at least an interfering signal and a signal of interest, each having a composite bandwidth, a first bandwidth, and a second bandwidth, respectively. An uplink baseband signal may be included, coupled to an uplink bandwidth filter, having a replica of the interfering signal corresponding with the interfering signal and having an interference bandwidth. A baseband processing module may be coupled with the downlink bandwidth filter and the uplink bandwidth filter and may be configured to cancel the interfering signal from the composite received signal using the replica of the interfering signal. The downlink bandwidth filter may be configured to reduce the composite bandwidth and the uplink bandwidth filter may be configured to reduce the interference bandwidth.
摘要翻译：一种用于频率复用系统的信号滤波系统。第一实现可以包括耦合到下行链路带宽滤波器的下行链路基带信号，其包括分别包括至少干扰信号和感兴趣的信号的复合接收信号，每个具有复合带宽，第一带宽和第二带宽。可以包括耦合到上行链路带宽滤波器的上行链路基带信号，其具有与干扰信号对应的干扰信号的副本并具有干扰带宽。基带处理模块可以与下行链路带宽滤波器和上行链路带宽滤波器耦合，并且可以被配置为使用干扰信号的副本从复合接收信号中消除干扰信号。下行链路带宽过滤器可以被配置为减少复合带宽，并且可以配置上行链路带宽过滤器以减少干扰带宽。

10. 发明授权

US09178605B2 Method and system for controlling a communications carrier's power spectral density (PSD) using spread spectrum for matched spectral allocation 有权
标题翻译：用于使用扩展频谱控制通信载波的功率谱密度（PSD）的方法和系统用于匹配的频谱分配
公开(公告)号：US09178605B2
公开(公告)日：2015-11-03
申请号：US13406969
申请日：2012-02-28
申请人： Cris M. Mamaril , Michael Beeler , Wallace Davis
发明人： Cris M. Mamaril , Michael Beeler , Wallace Davis
IPC分类号： H04B1/10 , H04B1/00 , H04B7/00 , H04B7/185
CPC分类号： H04W52/36 , H04B7/0678 , H04B7/18513 , H04L1/0003 , H04L1/0041 , H04W52/243 , H04W76/20
摘要： A method of reducing adjacent satellite interference, the method comprising monitoring, by a processor, a power spectral density (PSD) of a signal transmitted by a remote transmitter, determining, by the processor, that the PSD of the signal transmitted by the remote transmitter is above a predetermined level, and reducing the PSD of the signal transmitted by the remote transmitter by adjusting at least one of a spread spectrum spreading factor, a power level, a modulation factor, and a forward error correction (FEC) rate using a modulator while maintaining a constant spectral allocation and center frequency of the signal.
摘要翻译：一种减少相邻卫星干扰的方法，所述方法包括由处理器监视由远程发射机发送的信号的功率谱密度（PSD），由所述处理器确定由所述远程发射机发射的信号的PSD 超过预定电平，并且通过使用调制器调整扩展频谱扩展因子，功率电平，调制因子和前向纠错（FEC）速率中的至少一个来减少由远程发射机发送的信号的PSD 同时保持信号的恒定频谱分配和中心频率。

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