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1. 发明授权

US5607566A Batch deposition of polymeric ion sensor membranes 失效
标题翻译：聚合离子传感器膜的分批沉积
公开(公告)号：US5607566A
公开(公告)日：1997-03-04
申请号：US196105
申请日：1994-10-03
申请人： Richard B. Brown , Guen-Sig Cha , Howard D. Goldberg
发明人： Richard B. Brown , Guen-Sig Cha , Howard D. Goldberg
IPC分类号： G01N27/333 , G01N27/414 , G01N27/26
CPC分类号： G01N27/3335
摘要： Screen printing technology is employed in the batch fabrication of the contacts and polymeric membranes of solid-state ion-selective sensors. The process achieves high yield with very reproducible results. Moreover, membrane thickness can easily be predetermined, as it is directly related to the thickness of the screen or stencil. The process of the present invention is compatible with many integrated circuit manufacturing technologies, including CMOS fabrication. Advantageous polymeric membrane paste compositions include a polyurethane/hydroxylated poly(vinyl chloride) compound and a silicone-based compound in appropriate solvent systems to provide screen-printable pastes of the appropriate viscosity and thixotropy.
摘要翻译： PCT No.PCT / US92 / 07037 Sec。 371日期：1994年10月3日 102（e）日期1994年10月3日PCT 1992年8月20日提交印刷技术用于批量制造固态离子选择传感器的接触和聚合物膜。该方法获得高产量，结果非常可重现。此外，膜厚度可以容易地被预先确定，因为其与丝网或模板的厚度直接相关。本发明的方法与许多集成电路制造技术相兼容，包括CMOS制造。有利的聚合物膜糊组合物包括在合适的溶剂体系中的聚氨酯/羟基化聚（氯乙烯）化合物和硅氧烷基化合物，以提供具有适当粘度和触变性的可印刷丝网的浆料。

2. 发明授权

US07132874B2 Linearizing apparatus and method 有权
标题翻译：线性化装置和方法
公开(公告)号：US07132874B2
公开(公告)日：2006-11-07
申请号：US10829575
申请日：2004-04-22
申请人： Michael S. McCorquodale , Richard B. Brown , Mei Kim Ding
发明人： Michael S. McCorquodale , Richard B. Brown , Mei Kim Ding
IPC分类号： G06F7/556
CPC分类号： G06G7/122
摘要： An apparatus and method are disclosed which provide a substantially linear relationship between an input signal, such as an input voltage or current, and a predetermined parameter, such as a frequency response or capacitance of a parallel plate capacitor or varactor. The apparatus comprises a square root converter and a logarithmic generator. The square root converter is adapted to provide a square root signal which is substantially proportional to a square root of the input signal. In the various embodiments, the logarithmic generator is adapted to provide an applied signal which is substantially proportional to a sum of a logarithm of the input signal plus the square root of the input signal. The applied signal is a pre-distorted signal which generally has a non-linear relation to the predetermined parameter and which, when applied, allows the predetermined parameter to vary substantially linearly with the input signal.
摘要翻译：公开了一种在输入信号（例如输入电压或电流）与预定参数（诸如平行板电容器或变容二极管的频率响应或电容）之间提供基本线性关系的装置和方法。该装置包括平方根转换器和对数发生器。平方根转换器适于提供与输入信号的平方根成正比的平方根信号。在各种实施例中，对数发生器适于提供基本上与输入信号的对数加上输入信号的平方根的和成正比的施加信号。施加的信号是预失真信号，其通常与预定参数具有非线性关系，并且当被施加时，允许预定参数与输入信号基本上线性地变化。

3. 发明授权

US07113048B2 Ultra high frequency ring oscillator with voltage controlled frequency capabilities 失效
标题翻译：具有电压控制频率功能的超高频环形振荡器
公开(公告)号：US07113048B2
公开(公告)日：2006-09-26
申请号：US10988463
申请日：2004-11-12
申请人： Richard B. Brown , Gary D. Carpenter , Fadi H. Gebara
发明人： Richard B. Brown , Gary D. Carpenter , Fadi H. Gebara
IPC分类号： H03B5/24 , H03K3/03 , H03L7/099
CPC分类号： H03K3/0315 , H03K3/356139 , H03K5/133 , H03L7/0995
摘要： A pseudo Set/Reset latch circuit is configured with modified NOR or NAND gates wherein one of the series pull-up devices or pull-down devices is removed. A minimum of three pseudo Set/Reset latches may be coupled as a ring oscillator generating an output and a non-skewed complementary output. Additionally, feed-forward inverting stages may be coupled in parallel with inverting paths in the ring oscillator primary path to further increase the frequency range of the ring oscillator. The pseudo Set/Reset latch circuits and the feed-forward inverting stages may be configured with voltage controlled devices that alter the delay of the stages as a means for varying the frequency of the ring oscillator either by varying the current drive of the circuitry driving the output of the latch stages or by varying the conductance of devices coupling between the latch stages. Feedforward inverting stages may comprise pseudo latches or inverter gates.
摘要翻译：伪置位/复位锁存电路配置有修改的NOR或NAND门，其中串联上拉器件或下拉器件中的一个被去除。可以将至少三个伪设置/复位锁存器耦合作为产生输出和非偏斜互补输出的环形振荡器。此外，前馈反相级可以与环形振荡器主路径中的反相路径并联耦合，以进一步增加环形振荡器的频率范围。伪设置/复位锁存电路和前馈反相级可以配置有电压控制的装置，其通过改变驱动电路的电路的电流驱动来改变级的延迟，作为改变环形振荡器的频率的手段锁存级的输出或通过改变耦合在锁存级之间的器件的电导。前馈反相级可以包括伪锁存器或反相器门。

4. 发明授权

US5102526A Solid state ion sensor with silicon membrane 失效
标题翻译：具有硅膜的固态离子传感器
公开(公告)号：US5102526A
公开(公告)日：1992-04-07
申请号：US517636
申请日：1990-05-02
申请人： Richard B. Brown , Geun-Sig Cha
发明人： Richard B. Brown , Geun-Sig Cha
IPC分类号： G01N27/327 , G01N27/333 , G01N27/414
CPC分类号： G01N27/333
摘要： A silicone matrix is employed to form a substance-sensitive membrane which is particularly suited for installation on a solid state sensor. The ionophore may be a potassium ionophore, an ammonium ionophore or any other ionophore. The membrane may be coupled to the molecule of interest through a bioactive agent, such as an enzyme, an immunochemical, bacteria, antibody, virus, or antigen. The resulting substance-sensitive membrane has electrochemical properties which compare favorably to those of conventional PVC membranes, and exhibit significantly greater adhesion to glasses and semiconductor substrate materials. The improved adhesion will prolong the life of the sensors and prevent the formation of electrolyte shunts which have been known to render solid state sensors inoperative.
摘要翻译：使用有机硅基体形成特别适合于安装在固态传感器上的物质敏感膜。离子载体可以是钾离子载体，铵离子载体或任何其它离子载体。膜可以通过生物活性剂（例如酶，免疫化学，细菌，抗体，病毒或抗原）与感兴趣的分子偶联。所得到的物质敏感膜具有与常规PVC膜相当的电化学性能，并且对玻璃和半导体衬底材料表现出显着更大的粘合性。改善的粘合力将延长传感器的使用寿命，并防止已知使固态传感器不起作用的电解液分流器的形成。

5. 发明授权

US06952113B2 Method of reducing leakage current in sub one volt SOI circuits 有权
标题翻译：降低亚一伏SOI电路漏电流的方法
公开(公告)号：US06952113B2
公开(公告)日：2005-10-04
申请号：US10644211
申请日：2003-08-20
申请人： Richard B. Brown , Ching-Te K. Chuang , Peter W. Cook , Koushik K. Das , Rajiv V. Joshi
发明人： Richard B. Brown , Ching-Te K. Chuang , Peter W. Cook , Koushik K. Das , Rajiv V. Joshi
IPC分类号： H03K19/00 , A03K19/003
CPC分类号： H03K19/0016
摘要： A multi-threshold integrated circuit (IC) with reduced subthreshold leakage and method of reducing leakage. Selectable supply switching devices (NFETs and/or PFETs) between a logic circuit and supply connections (Vdd and Ground) for the circuit have higher thresholds than normal circuit devices. Some devices may have thresholds lowered when the supply switching devices are on. Header/footer devices with further higher threshold voltages and widths may be used to further increase off resistance and maintain/reduce on resistance. Alternatively, high threshold devices may be stacked to further reduce leakage to a point achieved for an even higher threshold. Intermediate supply connects at the devices may have decoupling capacitance and devices may be tapered for optimum stack height and an optimum taper ratio to minimize circuit leakage and circuit delay.
摘要翻译：具有降低的亚阈值泄漏的多阈值集成电路（IC）和减少泄漏的方法。电路逻辑电路和电源连接（V SUB）和GND之间的可选供电开关器件（NFET和/或PFET）的电路具有比正常电路器件更高的阈值。当供电开关装置打开时，一些装置可能具有降低的阈值。具有更高阈值电压和宽度的标题/页脚装置可用于进一步降低电阻和保持/降低电阻。或者，可以堆叠高阈值装置以进一步将泄漏减少到达到甚至更高阈值所达到的点。中间电源连接在器件上可能具有去耦电容，器件可以锥形化，以获得最佳堆叠高度和最佳锥度比，以最大限度地减少电路泄漏和电路延迟。

6. 发明申请

US20100038243A1 NANOPORE BASED ION-SELECTIVE ELECTRODES 有权
标题翻译：基于NANOPORE的离子选择性电极
公开(公告)号：US20100038243A1
公开(公告)日：2010-02-18
申请号：US11852061
申请日：2007-09-07
申请人： Henry S. White , Ryan J. White , Richard B. Brown , Hakhyun Nam , Jun Ho Shim
发明人： Henry S. White , Ryan J. White , Richard B. Brown , Hakhyun Nam , Jun Ho Shim
IPC分类号： G01N27/26 , B29C65/00 , H01B13/00
CPC分类号： G01N27/333 , Y10T156/10
摘要： Nanopore based ion-selective electrodes and methods of their manufacture as well as methods for their use are disclosed and described. The nanopore based ion-selective electrode can include a pore being present in a solid material and having a nanosize opening in the solid material, a metal conductor disposed inside the pore opposite the opening in the solid material, a reference electrode material contacting said metal conductor and disposed inside the pore, a conductive composition in contact with the reference electrode and disposed in the pore, and an ion-selective membrane. The ion-selective membrane can be configured to isolate the metal conductor, reference electrode material, and conductive composition together within the pore.
摘要翻译：公开和描述了基于纳米孔的离子选择性电极及其制造方法及其使用方法。基于纳米孔的离子选择性电极可以包括存在于固体材料中并在固体材料中具有纳米尺寸开口的孔，设置在与固体材料中的开口相对的孔内的金属导体，与金属导体接触的参考电极材料并且设置在孔内，与参考电极接触并设置在孔中的导电组合物和离子选择性膜。离子选择性膜可以被配置为在孔内将金属导体，参比电极材料和导电组合物隔离在一起。

7. 发明授权

US06972635B2 MEMS-based, computer systems, clock generation and oscillator circuits and LC-tank apparatus for use therein 失效
标题翻译：基于MEMS的计算机系统，时钟生成和振荡器电路以及用于其中的LC-储罐装置
公开(公告)号：US06972635B2
公开(公告)日：2005-12-06
申请号：US10374446
申请日：2003-02-26
申请人： Michael S. McCorquodale , Richard B. Brown
发明人： Michael S. McCorquodale , Richard B. Brown
IPC分类号： H03K21/00 , H01F17/00 , H01L23/522 , H03B5/02 , H03B5/12 , H03B5/18 , H03B5/32 , H03H7/01 , H03K12/00 , H03B5/08
CPC分类号： H01F17/0006 , H01G5/40 , H01L23/5227 , H01L2924/0002 , H01L2924/3011 , H03B5/1212 , H03B5/1228 , H03B5/124 , H03B5/18 , H03B5/32 , H03H7/0115 , H03H2007/006 , H01L2924/00
摘要： MEMS-based, computer system, clock generation and oscillator circuits and LC-tank apparatus for use therein are provided and which are fabricated using a CMOS-compatible process. A micromachined inductor (L) and a pair of varactors (C) are developed in metal layers on a silicon substrate to realize the high quality factor LC-tank apparatus. This micromachined LC-tank apparatus is incorporated with CMOS transistor circuitry in order to realize a digital, tunable, low phase jitter, and low power clock, or time base, for synchronous integrated circuits. The synthesized clock signal can be divided down with digital circuitry from several GHz to tens of MHz—a systemic approach that substantially improves stability as compared to the state of the art. Advanced circuit design techniques have been utilized to minimize power consumption and mitigate transistor flicker noise upconversion, thus enhancing clock stability.
摘要翻译：提供了基于MEMS的计算机系统，时钟生成和振荡器电路以及用于其中的LC容器装置，并且其使用CMOS兼容工艺制造。在硅基板上的金属层中开发出微加工电感器（L）和一对变容二极管（C），以实现高品质因数LC槽式设备。该微加工LC液箱装置与CMOS晶体管电路结合，以实现用于同步集成电路的数字，可调谐，低相位抖动和低功率时钟或时基。合成的时钟信号可以与几GHz到几十MHz的数字电路分开，这是与现有技术相比大大提高了稳定性的系统方法。已经采用先进的电路设计技术来最小化功耗并减轻晶体管闪烁噪声上变频，从而提高时钟稳定性。

8. 发明授权

US06786708B2 Laminated devices and methods of making same 有权
公开(公告)号：US06786708B2
公开(公告)日：2004-09-07
申请号：US10198540
申请日：2002-07-18
申请人： Richard B. Brown , Steve M. Martin
发明人： Richard B. Brown , Steve M. Martin
IPC分类号： F04B1700
CPC分类号： F16K99/0001 , F04B43/043 , F15C5/00 , F16K99/0015 , F16K99/0036 , F16K99/0046 , F16K2099/0074 , F16K2099/008 , H05K1/0272 , Y10T156/1064
摘要： Laminated devices and methods of making same are provided. A fluidic channel is formed in the inner layers of a laminate such as multilayer printed circuit board (PCB) and a hole is opened to the outer layers to allow fluid's access to a chip which contains chemical sensors. Several diaphragms are formed on each side of the chip access hole using the PCB as their substrate. Electromagnetic actuation of these diaphragms by solenoids housed inside the PCB drives or pumps fluid through the channel in a peristaltic fashion. By employing various channel geometries and/or the deposition of hydrophobic/hydrophillic layers, valves are provided in the channels.

9. 发明授权

US5132657A Temperature limiting control for an electric heating device 失效
标题翻译：电加热装置的温度限制控制
公开(公告)号：US5132657A
公开(公告)日：1992-07-21
申请号：US654500
申请日：1991-02-13
申请人： John C. Taylor , Vincent J. Garvey , Richard B. Brown
发明人： John C. Taylor , Vincent J. Garvey , Richard B. Brown
IPC分类号： F24C15/10 , H01H37/48 , H05B1/02
CPC分类号： H05B1/0216 , F24C15/105 , H01H37/48
摘要： A temperature limiting control for an electrical heating appliance such as a ceramic hob comprises switch means (11) and a temperature sensor (10) connnected thereto. The temperature sensor comprises an elongate reference member (12) of ceramic or other low expansion material and an elongate expansion member (13), for example a tape of high chrome steel, relative expansion of the two members operating the switch. The switch (11) and reference member (13) lie to one side of the expansion member (12) so that the latter may be placed closely adjacent the top (2) of the appliance.

10. 发明授权

US07157984B2 MEMS-based, computer systems, clock generation and oscillator circuits and LC-tank apparatus for use therein 有权
标题翻译：基于MEMS的计算机系统，时钟生成和振荡器电路以及用于其中的LC-储罐装置
公开(公告)号：US07157984B2
公开(公告)日：2007-01-02
申请号：US11261093
申请日：2005-10-28
申请人： Michael S. McCorquodale , Richard B. Brown
发明人： Michael S. McCorquodale , Richard B. Brown
IPC分类号： H03B5/08
CPC分类号： H01F17/0006 , H01G5/40 , H01L23/5227 , H01L2924/0002 , H01L2924/3011 , H03B5/1212 , H03B5/1228 , H03B5/124 , H03B5/18 , H03B5/32 , H03H7/0115 , H03H2007/006 , H01L2924/00
摘要： MEMS-based, computer system, clock generation and oscillator circuits and LC-tank apparatus for use therein are provided and which are fabricated using a CMOS-compatible process. A micromachined inductor (L) and a pair of varactors (C) are developed in metal layers on a silicon substrate to realize the high quality factor LC-tank apparatus. This micromachined LC-tank apparatus is incorporated with CMOS transistor circuitry in order to realize a digital, tunable, low phase jitter, and low power clock, or time base, for synchronous integrated circuits. The synthesized clock signal can be divided down with digital circuitry from several GHz to tens of MHZ—a systemic approach that substantially improves stability as compared to the state of the art. Advanced circuit design techniques have been utilized to minimize power consumption and mitigate transistor flicker noise upconversion, thus enhancing clock stability.
摘要翻译：提供了基于MEMS的计算机系统，时钟生成和振荡器电路以及用于其中的LC容器装置，并且其使用CMOS兼容工艺制造。在硅基板上的金属层中开发出微加工电感器（L）和一对变容二极管（C），以实现高品质因数LC槽式设备。该微加工LC液箱装置与CMOS晶体管电路结合，以实现用于同步集成电路的数字，可调谐，低相位抖动和低功率时钟或时基。合成的时钟信号可以与数字电路从几GHz分割成几十MHz，这是与现有技术相比大大提高了稳定性的系统方法。已经采用先进的电路设计技术来最小化功耗并减轻晶体管闪烁噪声上变频，从而提高时钟稳定性。

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