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1. 发明授权

US07064846B1 Non-lithographic shrink techniques for improving line edge roughness and using imperfect (but simpler) BARCs 有权
标题翻译：非光刻收缩技术，用于改善线边缘粗糙度并使用不完美（但更简单）的BARC
公开(公告)号：US07064846B1
公开(公告)日：2006-06-20
申请号：US10646190
申请日：2003-08-22
申请人： Gilles Amblard , Bhanwar Singh , Khoi A. Phan , Ramkumar Subramanian
发明人： Gilles Amblard , Bhanwar Singh , Khoi A. Phan , Ramkumar Subramanian
IPC分类号： G01B11/04
CPC分类号： G03F7/40
摘要： The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate the reduction of line-edge roughness (LER) and/or standing wave expression during pattern line formation in an integrated circuit. Systems and methods are disclosed for retaining a target critical dimension (CD) of photoresist lines, comprising a non-lithographic shrink component that facilitates mitigating LER and/or standing wave expression, wherein the shrink component is employed to heat a particular resist to the glass transition temperature of the resist to effectuate mitigation of LER and/or standing wave expression. Additionally, by heating the resist to its glass transition temperature, the systems and methods of the present invention effectively impede deviation from a desired target critical dimension.
摘要翻译：本发明一般涉及光刻系统和方法，更具体地涉及有助于在集成电路中的图案线形成期间减少线边缘粗糙度（LER）和/或驻波表达的系统和方法。公开了用于保持光致抗蚀剂线的目标临界尺寸（CD）的系统和方法，其包括有助于减轻LER和/或驻波表达的非光刻收缩组分，其中采用收缩组分将特定抗蚀剂加热到玻璃抗蚀剂的转变温度来实现LER和/或驻波表达的缓解。此外，通过将抗蚀剂加热至其玻璃化转变温度，本发明的系统和方法有效地阻止了偏离所需目标临界尺寸。

2. 发明授权

US07799514B1 Surface treatment with an acidic composition to prevent substrate and environmental contamination 有权
标题翻译：用酸性组合物进行表面处理，以防止底物和环境污染
公开(公告)号：US07799514B1
公开(公告)日：2010-09-21
申请号：US10957367
申请日：2004-10-01
申请人： Ramkumar Subramanian , Bhanwar Singh , Gilles Amblard
发明人： Ramkumar Subramanian , Bhanwar Singh , Gilles Amblard
IPC分类号： G03F7/26
CPC分类号： G03F7/265
摘要： Disclosed are methods for eliminating and/or mitigating the formation of footing and/or T-tops in a resist pattern. A substrate with or without an antireflective coating layer may be treated with an acidic composition prior to the formation of a resist layer. The acid treatment prevents the loss of photo generated acid from the resist by either quenching and/or neutralizing the bases, and thereby reduces the formation of footing. The surface of a resist layer which has been irradiated may be treated with an acidic composition prior to post-exposure bake. The acid treatment prevents the loss of photo generated acid from the resist by either compensating for the evaporation and/or neutralization of the bases and thereby prevents the formation of T-tops.
摘要翻译：公开了用于消除和/或减轻抗蚀剂图案中的基脚和/或T形顶部的形成的方法。具有或不具有抗反射涂层的基底可以在形成抗蚀剂层之前用酸性组合物处理。酸处理通过淬灭和/或中和碱来防止光阻产生的酸的损失，从而减少基底的形成。已经照射的抗蚀剂层的表面可以在曝光前烘烤之前用酸性组合物处理。酸处理通过补偿基底的蒸发和/或中和来防止光致抗蚀剂产生的光的损失，从而防止形成T形顶部。

3. 发明授权

US07262138B1 Organic BARC with adjustable etch rate 失效
标题翻译：有机BARC具有可调蚀刻速率
公开(公告)号：US07262138B1
公开(公告)日：2007-08-28
申请号：US10957111
申请日：2004-10-01
申请人： Bhanwar Singh , Ramkumar Subramanian , Gilles Amblard
发明人： Bhanwar Singh , Ramkumar Subramanian , Gilles Amblard
IPC分类号： H01L21/302
CPC分类号： H01L21/0276
摘要： Systems and method for adjusting an etch rate of an organic bottom antireflective coating (BARC) layer on a wafer. The BARC layer can be exposed to an energy source at varied intensities to determine a relationship between bake temperature and solubility of the BARC after baking, which correlates to a rate at which the BARC can be etched. The BARC can be a cross-linking BARC, which becomes more cross-linked as bake temperature is increased, resulting in decreased etch rate, or can be a cleaving BARC, which is subject to removal of etch-resistant monomers as bake temperature is increased, resulting in increased etch rate. Thus, the invention provides for adjustable BARC etch rates that can be aligned to an etch rate of a photoresist deposited over the BARC to permit concurrent etching of both layers while mitigating structural defects that can occur if etch rates of the respective layers differ.
摘要翻译：用于调整晶片上的有机底部抗反射涂层（BARC）层的蚀刻速率的系统和方法。 BARC层可以以不同的强度暴露于能量源，以确定烘烤温度和烘烤后BARC的溶解度之间的关系，这与BARC可被蚀刻的速率相关。 BARC可以是交联的BARC，其随着烘烤温度的升高而变得更加交联，导致蚀刻速率降低，或者可以是裂解BARC，其随着烘烤温度的升高而被去除耐蚀刻单体，导致蚀刻速率增加。因此，本发明提供可调节的BARC蚀刻速率，其可以与沉积在BARC上的光致抗蚀剂的蚀刻速率对准，以允许同时蚀刻两层，同时减轻如果各层的蚀刻速率不同时可能发生的结构缺陷。

4. 发明授权

US08007631B2 System and method for imprint lithography to facilitate dual damascene integration with two imprint acts 有权
标题翻译：用于压印光刻的系统和方法，以促进双重镶嵌与两个印记动作的整合
公开(公告)号：US08007631B2
公开(公告)日：2011-08-30
申请号：US11741991
申请日：2007-04-30
申请人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian
发明人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： C23C10/00 , C29C59/02 , C03C17/22
CPC分类号： H01L21/76817 , B82Y10/00 , B82Y40/00 , G03F7/0002 , H01L21/31144 , H01L21/76811
摘要： A system and method are provided to facilitate dual damascene interconnect integration with two imprint acts. The method provides for creation of a pair of translucent imprint molds containing the dual damascene pattern to be imprinted. The first imprint mold of the pair contains the via features of the dual damascene pattern and the second imprint mold of the pair contains the trench features. The via feature imprint mold is brought into contact with a first imaging layer deposited upon a first transfer layer which is deposited upon a dielectric layer of a substrate. The trench feature imprint mold is brought into contact with a second imaging layer deposited upon a second transfer layer which is deposited upon the first imaging layer of the substrate. When each imaging layer is exposed to a source of illumination, it cures with a structure matching the features of the corresponding imprint mold. A sequence of etches transfer and combine the via features from the first imaging layer with the trenches from the second imaging layer to create the dual damascene openings within the dielectric layer.
摘要翻译：提供了一种系统和方法来促进与两个印记动作的双镶嵌互连集成。该方法提供了一对包含要印制的双镶嵌图案的半透明压印模具。该对的第一压印模具包含双镶嵌图案的通孔特征，并且该对的第二压印模具包含沟槽特征。通孔特征压印模具与沉积在沉积在基板的电介质层上的第一转印层上的第一成像层接触。沟槽特征压印模具与沉积在沉积在基板的第一成像层上的第二转印层上的第二成像层接触。当每个成像层暴露于照明源时，它将以匹配相应压印模具的特征的结构固化。一系列蚀刻将来自第一成像层的通孔特征与来自第二成像层的沟槽结合，以在介电层内形成双镶嵌开口。

5. 发明授权

US07384569B1 Imprint lithography mask trimming for imprint mask using etch 有权
标题翻译：使用蚀刻的压印掩模的压印光刻掩模修剪
公开(公告)号：US07384569B1
公开(公告)日：2008-06-10
申请号：US10909464
申请日：2004-08-02
申请人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian
发明人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： G01L21/30 , H01L21/00
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： Disclosed are photolithographic systems and methods, and more particularly systems and methodologies that enhance imprint mask feature resolution. An aspect generates feedback information that facilitates control of imprint mask feature size and resolution via employing a scatterometry system to detect resolution enhancement need, and decreasing imprint mask feature size and increasing resolution of the imprint mask via a trim etch procedure.
摘要翻译：公开了光刻系统和方法，更具体地说，增强了印迹掩模特征分辨率的系统和方法。方面产生反馈信息，其通过采用散射测量系统来检测分辨率增强需求，以及通过修剪蚀刻程序减小压印掩模特征尺寸并增加印迹掩模的分辨率，从而有助于控制印迹掩模特征尺寸和分辨率。

6. 发明申请

US20070283883A1 SYSTEM AND METHOD FOR IMPRINT LITHOGRAPHY TO FACILITATE DUAL DAMASCENE INTEGRATION WITH TWO IMPRINT ACTS 有权
标题翻译：系统和方法，用于绘制两幅印刷动画的双重增强整合
公开(公告)号：US20070283883A1
公开(公告)日：2007-12-13
申请号：US11741991
申请日：2007-04-30
申请人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian
发明人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： C23C10/00
CPC分类号： H01L21/76817 , B82Y10/00 , B82Y40/00 , G03F7/0002 , H01L21/31144 , H01L21/76811
摘要： A system and method are provided to facilitate dual damascene interconnect integration with two imprint acts. The method provides for creation of a pair of translucent imprint molds containing the dual damascene pattern to be imprinted. The first imprint mold of the pair contains the via features of the dual damascene pattern and the second imprint mold of the pair contains the trench features. The via feature imprint mold is brought into contact with a first imaging layer deposited upon a first transfer layer which is deposited upon a dielectric layer of a substrate. The trench feature imprint mold is brought into contact with a second imaging layer deposited upon a second transfer layer which is deposited upon the first imaging layer of the substrate. When each imaging layer is exposed to a source of illumination, it cures with a structure matching the features of the corresponding imprint mold. A sequence of etches transfer and combine the via features from the first imaging layer with the trenches from the second imaging layer to create the dual damascene openings within the dielectric layer.
摘要翻译：提供了一种系统和方法来促进与两个印记动作的双镶嵌互连集成。该方法提供了一对包含要印制的双镶嵌图案的半透明压印模具。该对的第一压印模具包含双镶嵌图案的通孔特征，并且该对的第二压印模具包含沟槽特征。通孔特征压印模具与沉积在沉积在基板的电介质层上的第一转印层上的第一成像层接触。沟槽特征压印模具与沉积在沉积在基板的第一成像层上的第二转印层上的第二成像层接触。当每个成像层暴露于照明源时，它将以匹配相应压印模具的特征的结构固化。一系列蚀刻将来自第一成像层的通孔特征与来自第二成像层的沟槽结合，以在介电层内形成双镶嵌开口。

7. 发明授权

US07295288B1 Systems and methods of imprint lithography with adjustable mask 有权
标题翻译：带可调面罩的压印光刻系统和方法
公开(公告)号：US07295288B1
公开(公告)日：2007-11-13
申请号：US11000869
申请日：2004-12-01
申请人： Ramkumar Subramanian , Bhanwar Singh , Khoi A. Phan
发明人： Ramkumar Subramanian , Bhanwar Singh , Khoi A. Phan
IPC分类号： G03B27/62 , G03B27/02 , G03B27/20
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： Systems and methodologies are provided that account for surface variations of a wafer by adjusting grating features of an imprint lithography mask. Such adjustment employs piezoelectric elements as part of the mask, which can change dimensions (e.g., a height change) and/or move when subjected to an electric voltage. Accordingly, by regulating the amount of electric voltage applied to the piezoelectric elements a controlled expansion for such elements can be obtained, to accommodate for topography variations of the wafer surface.
摘要翻译：提供了通过调节压印光刻掩模的光栅特征来考虑晶片的表面变化的系统和方法。这种调节使用压电元件作为掩模的一部分，其可以在经受电压时改变尺寸（例如，高度变化）和/或移动。因此，通过调节施加到压电元件的电压量，可以获得这些元件的受控膨胀，以适应晶片表面的形貌变化。

8. 发明授权

US07235474B1 System and method for imprint lithography to facilitate dual damascene integration with two imprint acts 有权
标题翻译：用于压印光刻的系统和方法，以促进双重镶嵌与两个印记动作的整合
公开(公告)号：US07235474B1
公开(公告)日：2007-06-26
申请号：US10838612
申请日：2004-05-04
申请人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian
发明人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： H01L21/44
CPC分类号： H01L21/76817 , B82Y10/00 , B82Y40/00 , G03F7/0002 , H01L21/31144 , H01L21/76811
摘要： A system and method are provided to facilitate dual damascene interconnect integration with two imprint acts. The method provides for creation of a pair of translucent imprint molds containing the dual damascene pattern to be imprinted. The first imprint mold of the pair contains the via features of the dual damascene pattern and the second imprint mold of the pair contains the trench features. The via feature imprint mold is brought into contact with a first imaging layer deposited upon a first transfer layer which is deposited upon a dielectric layer of a substrate. The trench feature imprint mold is brought into contact with a second imaging layer deposited upon a second transfer layer which is deposited upon the first imaging layer of the substrate. When each imaging layer is exposed to a source of illumination, it cures with a structure matching the features of the corresponding imprint mold. A sequence of etches transfer and combine the via features from the first imaging layer with the trenches from the second imaging layer to create the dual damascene openings within the dielectric layer.
摘要翻译：提供了一种系统和方法来促进与两个印记动作的双镶嵌互连集成。该方法提供了一对包含要印制的双镶嵌图案的半透明压印模具。该对的第一压印模具包含双镶嵌图案的通孔特征，并且该对的第二压印模具包含沟槽特征。通孔特征压印模具与沉积在沉积在基板的电介质层上的第一转印层上的第一成像层接触。沟槽特征压印模具与沉积在沉积在基板的第一成像层上的第二转印层上的第二成像层接触。当每个成像层暴露于照明源时，它将以匹配相应压印模具的特征的结构固化。一系列蚀刻将来自第一成像层的通孔特征与来自第二成像层的沟槽结合，以在介电层内形成双镶嵌开口。

9. 发明授权

US07158896B1 Real time immersion medium control using scatterometry 失效
标题翻译：实时浸入介质控制采用散射法
公开(公告)号：US07158896B1
公开(公告)日：2007-01-02
申请号：US10978604
申请日：2004-11-01
申请人： Bhanwar Singh , Srikanteswara Dakshina-Murthy , Khoi A. Phan , Ramkumar Subramanian , Bharath Rangarajan , Iraj Emami
发明人： Bhanwar Singh , Srikanteswara Dakshina-Murthy , Khoi A. Phan , Ramkumar Subramanian , Bharath Rangarajan , Iraj Emami
IPC分类号： G06F19/00
CPC分类号： G03F7/70916 , G03F7/2041 , G03F7/70341
摘要： Systems and/or methods are disclosed for measuring and/or controlling an amount of impurity that is dissolved within an immersion medium employed with immersion lithography. The impurity can be photoresist from a photoresist layer coated upon a substrate surface. A known grating structure is built upon the substrate. A real time immersion medium monitoring component facilitates measuring and/or controlling the amount of impurities dissolved within the immersion medium by utilizing light scattered from the known grating structure.
摘要翻译：公开了用于测量和/或控制溶解在浸入式光刻中使用的浸渍介质中的杂质量的系统和/或方法。杂质可以是来自涂覆在基材表面上的光致抗蚀剂层的光致抗蚀剂。已知的光栅结构被构建在衬底上。实时浸没介质监测部件通过利用从已知光栅结构散射的光来便于测量和/或控制溶解在浸没介质中的杂质的量。

10. 发明授权

US07079975B1 Scatterometry and acoustic based active control of thin film deposition process 失效
标题翻译：薄膜沉积工艺的散射和声学主动控制
公开(公告)号：US07079975B1
公开(公告)日：2006-07-18
申请号：US09845231
申请日：2001-04-30
申请人： Arvind Halliyal , Bhanwar Singh , Ramkumar Subramanian
发明人： Arvind Halliyal , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： G01B11/02 , G01B15/02
CPC分类号： G01B11/0683 , G01B11/0625 , G01B17/025 , G01N21/47 , G01N21/8422 , G01N21/88 , G01N21/94
摘要： A system for monitoring and controlling the deposition of thin films employed in semiconductor fabrication is provided. The system includes one or more acoustic and/or ultrasonic wave sources, each source directing waves onto one or more thin films deposited on a wafer. Waves reflected from the thin film is collected by a monitoring system, which processes the collected waves. Waves passing through the thin film may similarly be collected by the monitoring system, which processes the collected waves. The collected waves are indicative of the presence of impurities and/or defects in the deposited thin film. The monitoring system analyzes and provides the collected wave data to a processor, which determines whether adjustments to thin film deposition parameters are needed. The system also includes a plurality of thin film deposition devices associated with depositing thin films on the wafer. The processor selectively controls thin film deposition parameters and devices to facilitate regulating deposition.
摘要翻译：提供了用于监测和控制用于半导体制造中的薄膜沉积的系统。该系统包括一个或多个声波和/或超声波波束，每个源将波束引导到沉积在晶片上的一个或多个薄膜上。从薄膜反射的波浪由监测系统收集，监测系统处理收集的波。通过薄膜的波浪可以类似地由监测系统收集，监测系统处理所收集的波。收集的波表示沉积的薄膜中存在杂质和/或缺陷。监测系统分析并将收集的波数据提供给处理器，其确定是否需要对薄膜沉积参数进行调整。该系统还包括与在晶片上沉积薄膜相关联的多个薄膜沉积装置。处理器选择性地控制薄膜沉积参数和装置以便于调节沉积。

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