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1. 发明授权

US08097873B2 Phase change memory structures 有权
标题翻译：相变记忆结构
公开(公告)号：US08097873B2
公开(公告)日：2012-01-17
申请号：US12881678
申请日：2010-09-14
申请人： Ramachandran Muralidhar , Tushar P. Merchant , Rajesh A. Rao
发明人： Ramachandran Muralidhar , Tushar P. Merchant , Rajesh A. Rao
IPC分类号： H01L29/04 , H01L45/00
CPC分类号： H01L45/1233 , H01L45/06 , H01L45/126 , H01L45/1273 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1675
摘要： A phase change memory cell has a first electrode, a plurality of pillars, and a second electrode. The plurality of pillars are electrically coupled with the first electrode. Each of the pillars comprises a phase change material portion and a heater material portion. The second electrode is electrically coupled to each of the pillars. In some examples, the pillars have a width less than 20 nanometers.
摘要翻译：相变存储单元具有第一电极，多个柱和第二电极。多个柱与第一电极电耦合。每个支柱包括相变材料部分和加热器材料部分。第二电极电耦合到每个支柱。在一些示例中，支柱具有小于20纳米的宽度。

2. 发明申请

US20070202645A1 METHOD FOR FORMING A DEPOSITED OXIDE LAYER 审中-公开
标题翻译：形成沉积氧化层的方法
公开(公告)号：US20070202645A1
公开(公告)日：2007-08-30
申请号：US11680121
申请日：2007-02-28
申请人： Tien Ying Luo , Lakshmanna Vishnubhotla , Tushar P. Merchant , Rajesh A. Rao , Ramachandran Muralidhar
发明人： Tien Ying Luo , Lakshmanna Vishnubhotla , Tushar P. Merchant , Rajesh A. Rao , Ramachandran Muralidhar
IPC分类号： H01L21/8242
CPC分类号： H01L29/7885 , B82Y10/00 , H01L21/02164 , H01L21/02271 , H01L21/02304 , H01L21/02337 , H01L21/31612 , H01L29/40117 , H01L29/42332 , H01L29/7883
摘要： An oxide layer formed by deposition is subject to a treatment process to repair bond defects of the oxide layer. In one embodiment, the layer is treated with nitric oxide. In one embodiment, a nitric oxide gas is flowed over the dielectric layer at an elevated temperature. In still another embodiment, the oxide layer is treated with fluorine. A layer is deposited over the oxide layer and a species containing fluorine is ion implanted into the layer. The wafer is heated where the species is driven to the oxide layer.
摘要翻译：通过沉积形成的氧化物层经受处理工艺以修复氧化物层的结合缺陷。在一个实施方案中，该层用一氧化氮处理。在一个实施方案中，一氧化氮气体在升高的温度下流过电介质层。在另一个实施方案中，用氟处理氧化物层。在氧化物层上沉积一层，并且将含氟物质离子注入到该层中。加热晶片，将物质驱动到氧化物层。

3. 发明授权

US07932189B2 Process of forming an electronic device including a layer of discontinuous storage elements 有权
标题翻译：形成包括不连续存储元件层的电子器件的工艺
公开(公告)号：US07932189B2
公开(公告)日：2011-04-26
申请号：US11627817
申请日：2007-01-26
申请人： Tushar P. Merchant , Chun-Li Liu , Ramachandran Muralidhar , Marius K. Orlowski , Rajesh A. Rao , Matthew Stoker
发明人： Tushar P. Merchant , Chun-Li Liu , Ramachandran Muralidhar , Marius K. Orlowski , Rajesh A. Rao , Matthew Stoker
IPC分类号： H01L21/31
CPC分类号： H01L21/28273 , B82Y10/00 , H01L27/11524 , H01L29/7887 , Y10S977/932 , Y10S977/943
摘要： An electronic device can include a layer of discontinuous storage elements. A dielectric layer overlying the discontinuous storage elements can be substantially hydrogen-free. A process of forming the electronic device can include forming a layer including silicon over the discontinuous storage elements. In one embodiment, the process includes oxidizing at least substantially all of the layer. In another embodiment, the process includes forming the layer using a substantially hydrogen-free silicon precursor material and oxidizing at least substantially all of the layer.
摘要翻译：电子设备可以包括不连续的存储元件层。覆盖不连续存储元件的电介质层可以是基本上无氢的。形成电子器件的工艺可以包括在不连续的存储元件上形成包括硅的层。在一个实施方案中，该方法包括至少基本上氧化所有该层。在另一个实施方案中，该方法包括使用基本上无氢的硅前体材料形成层并至少基本上全部氧化。

4. 发明申请

US20090085024A1 PHASE CHANGE MEMORY STRUCTURES 有权
标题翻译：相变记忆结构
公开(公告)号：US20090085024A1
公开(公告)日：2009-04-02
申请号：US11864246
申请日：2007-09-28
申请人： Ramachandran Muralidhar , Tushar P. Merchant , Rajesh A. Rao
发明人： Ramachandran Muralidhar , Tushar P. Merchant , Rajesh A. Rao
IPC分类号： H01L47/00 , B05D5/12
CPC分类号： H01L45/1233 , H01L45/06 , H01L45/126 , H01L45/1273 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1675
摘要： A phase change memory cell has a first electrode, a plurality of pillars, and a second electrode. The plurality of pillars are electrically coupled with the first electrode. Each of the pillars comprises a phase change material portion and a heater material portion. The second electrode is electrically coupled to each of the pillars. In some examples, the pillars have a width less than 20 nanometers.
摘要翻译：相变存储单元具有第一电极，多个柱和第二电极。多个柱与第一电极电耦合。每个支柱包括相变材料部分和加热器材料部分。第二电极电耦合到每个支柱。在一些示例中，支柱具有小于20纳米的宽度。

5. 发明申请

US20080182428A1 ELECTRONIC DEVICE INCLUDING A LAYER OF DISCONTINUOUS STORAGE ELEMENTS AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE 有权
标题翻译：包括不连续存储元件层的电子设备和形成电子设备的方法
公开(公告)号：US20080182428A1
公开(公告)日：2008-07-31
申请号：US11627817
申请日：2007-01-26
申请人： Tushar P. Merchant , Chun-Li Liu , Ramachandran Muralidhar , Marius K. Orlowski , Rajesh A. Rao , Matthew Stoker
发明人： Tushar P. Merchant , Chun-Li Liu , Ramachandran Muralidhar , Marius K. Orlowski , Rajesh A. Rao , Matthew Stoker
IPC分类号： H01L21/31
CPC分类号： H01L21/28273 , B82Y10/00 , H01L27/11524 , H01L29/7887 , Y10S977/932 , Y10S977/943
摘要： An electronic device can include a layer of discontinuous storage elements. A dielectric layer overlying the discontinuous storage elements can be substantially hydrogen-free. A process of forming the electronic device can include forming a layer including silicon over the discontinuous storage elements. In one embodiment, the process includes oxidizing at least substantially all of the layer. In another embodiment, the process includes forming the layer using a substantially hydrogen-free silicon precursor material and oxidizing at least substantially all of the layer.
摘要翻译：电子设备可以包括不连续的存储元件层。覆盖不连续存储元件的电介质层可以是基本上无氢的。形成电子器件的过程可以包括在不连续的存储元件上形成包括硅的层。在一个实施方案中，该方法包括至少基本上氧化所有该层。在另一个实施方案中，该方法包括使用基本上无氢的硅前体材料形成该层并至少基本上全部氧化。

6. 发明授权

US06808986B2 Method of forming nanocrystals in a memory device 有权
公开(公告)号：US06808986B2
公开(公告)日：2004-10-26
申请号：US10231556
申请日：2002-08-30
申请人： Rajesh A. Rao , Ramachandran Muralidhar , Tushar P. Merchant
发明人： Rajesh A. Rao , Ramachandran Muralidhar , Tushar P. Merchant
IPC分类号： H01L21336
CPC分类号： B82Y10/00 , C23C16/02 , C23C16/24 , H01L21/0237 , H01L21/02488 , H01L21/02532 , H01L21/0259 , H01L21/0262 , H01L21/28273 , H01L29/42332
摘要： Nanocrystals (22) are formed in a semiconductor, such as for example, in a memory having a floating gate. A dielectric (18) overlies a substrate (12) and is placed in a chemical vapor deposition chamber (34). A first precursor gas, such as disilane (36), is flowed into the chemical vapor deposition chamber during a first phase to nucleate the nanocrystals (22) on the dielectric with first predetermined processing conditions existing within the chemical vapor deposition chamber for a first time period. A second precursor gas, such as silane, is flowed into the chemical vapor deposition chamber during a second phase subsequent to the first phase to grow the nanocrystals under second predetermined processing conditions existing within the chemical vapor deposition chamber for a second time period.

7. 发明授权

US07704830B2 Split gate memory cell using sidewall spacers 有权
标题翻译：使用侧壁间隔件的分离栅极存储单元
公开(公告)号：US07704830B2
公开(公告)日：2010-04-27
申请号：US11759518
申请日：2007-06-07
申请人： Rajesh A. Rao , Tushar P. Merchant , Ramachandran Muralidhar , Lakshmanna Vishnubhotla
发明人： Rajesh A. Rao , Tushar P. Merchant , Ramachandran Muralidhar , Lakshmanna Vishnubhotla
IPC分类号： H01L21/336
CPC分类号： H01L29/42332 , B82Y10/00 , H01L21/28273 , H01L29/42328 , H01L29/7881
摘要： A self-aligned split gate bitcell includes first and second regions of charge storage material separated by a gap devoid of charge storage material. Spacers are formed along sidewalls of sacrificial layer extending above and on opposite sides of the bitcell stack, wherein the spacers are separated from one another by at least a gap length. Etching the bitcell stack, selective to the spacers, forms a gap that splits the bitcell stack into first and second gates which together form the split gate bitcell stack. A storage portion of bitcell stack is also etched, wherein etching extends the gap and separates the corresponding layer into first and second separate regions, the extended gap being devoid of charge storage material. Dielectric material is deposited over the gap and etched back to expose a top surface of the sacrificial layer, which is thereafter removed to expose sidewalls of the split gate bitcell stack.
摘要翻译：自对准分离栅极位单元包括由没有电荷存储材料的间隙分开的电荷存储材料的第一和第二区域。间隔物形成在牺牲层的侧壁上，该牺牲层在位单元堆叠的上方和相对侧上延伸，其中间隔物彼此间隔至少间隙长度。刻蚀对间隔物有选择性的位单元堆叠形成了将位单元堆叠分成第一和第二栅极的间隙，这些栅极组共同构成了分离栅极位单元堆叠。比特单元堆叠的存储部分也被蚀刻，其中蚀刻延伸间隙并将相应的层分离成第一和第二分离区域，扩展间隙没有电荷存储材料。电介质材料沉积在间隙上并被回蚀以暴露牺牲层的顶表面，此牺牲层此后被去除以暴露分裂栅极位晶胞堆叠的侧壁。

8. 发明申请

US20090085023A1 PHASE CHANGE MEMORY STRUCTURES 有权
标题翻译：相变记忆结构
公开(公告)号：US20090085023A1
公开(公告)日：2009-04-02
申请号：US11864257
申请日：2007-09-28
申请人： Ramachandran Muralidhar , Tushar P. Merchant , Rajesh A. Rao
发明人： Ramachandran Muralidhar , Tushar P. Merchant , Rajesh A. Rao
IPC分类号： H01L45/00
CPC分类号： H01L45/1675 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/1273 , H01L45/144 , H01L45/148
摘要： A phase change memory cell has a first electrode, a heater, a phase change material, and a second electrode. The heater is over the first electrode, and the heater comprises a pillar. The phase change material is around the heater. The second electrode is electrically coupled to the phase change material. In some embodiments, a method includes forming a electrode layer over a substrate, depositing a first layer, providing nanoclusters over the first layer, and etching the first layer. The first layer comprises one of a group consisting of a heater material and a phase change material. The first layer may be etched using the nanocluster defined pattern to form pillars from the first layer.
摘要翻译：相变存储单元具有第一电极，加热器，相变材料和第二电极。加热器在第一电极之上，并且加热器包括支柱。相变材料在加热器周围。第二电极电耦合到相变材料。在一些实施例中，一种方法包括在衬底上形成电极层，沉积第一层，在第一层上提供纳米团簇，以及蚀刻第一层。第一层包括由加热器材料和相变材料组成的组中的一个。可以使用纳米簇限定图案蚀刻第一层，以形成来自第一层的柱。

9. 发明申请

US20080242022A1 ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS WITHIN A DIELECTRIC LAYER AND PROCESS OF FORMING THE ELECTRONIC DEVICE 有权
标题翻译：在电介质层中包括不连续存储元件的电子器件和形成电子器件的工艺
公开(公告)号：US20080242022A1
公开(公告)日：2008-10-02
申请号：US11693829
申请日：2007-03-30
申请人： Rajesh A. Rao , Tushar P. Merchant , Ramachandran Muralidhar , Gowrishankar Chindalore , David Sing , Jane Yater
发明人： Rajesh A. Rao , Tushar P. Merchant , Ramachandran Muralidhar , Gowrishankar Chindalore , David Sing , Jane Yater
IPC分类号： H01L21/336
CPC分类号： H01L21/28282 , H01L21/28273 , H01L29/42328 , H01L29/42332 , H01L29/7881
摘要： An electronic device can include a nonvolatile memory cell having DSEs within a dielectric layer. In one aspect, a process of forming the electronic device can include implanting and nucleating a first charge-storage material to form DSEs. The process can also include implanting a second charge-storage material and growing the DSEs such that the DSEs include the first and second charge-storage material. In another aspect, a process of forming the electronic device can include forming a semiconductor layer over a dielectric layer, implanting a charge-storage material, and annealing the dielectric layer. After annealing, substantially none of the charge-storage material remains within a denuded zone within the dielectric layer. In a third aspect, within a dielectric layer, a first set of DSEs can be spaced apart from a second set of DSEs, wherein substantially no DSEs lie between the first set of DSEs and the second set of DSEs.
摘要翻译：电子设备可以包括在电介质层内具有DSE的非易失性存储单元。一方面，形成电子器件的方法可以包括将第一电荷存储材料植入和成核以形成DSE。该过程还可以包括植入第二电荷储存材料并生长DSE，使得DSE包括第一和第二电荷存储材料。在另一方面，形成电子器件的工艺可以包括在电介质层上形成半导体层，注入电荷存储材料，以及退火介电层。在退火之后，基本上没有一种电荷存储材料保留在电介质层内的裸露区域内。在第三方面，在介电层内，第一组DSE可以与第二组DSE间隔开，其中基本上没有DSE位于第一组DSE和第二组DSE之间。

10. 发明授权

US08563355B2 Method of making a phase change memory cell having a silicide heater in conjunction with a FinFET 有权
标题翻译：制造具有与FinFET结合的硅化物加热器的相变存储单元的方法
公开(公告)号：US08563355B2
公开(公告)日：2013-10-22
申请号：US12016739
申请日：2008-01-18
申请人： Leo Mathew , Tushar P. Merchant , Ramachandran Muralidhar , Rajesh A. Rao
发明人： Leo Mathew , Tushar P. Merchant , Ramachandran Muralidhar , Rajesh A. Rao
IPC分类号： H01L21/06
CPC分类号： H01L27/2436 , H01L29/785 , H01L45/06 , H01L45/1226 , H01L45/126 , H01L45/144 , H01L45/1675
摘要： A phase change memory (PCM) cell includes a transistor, a PCM structure, and a heater. The transistor has a first current electrode and a second current electrode in a structure, and a channel region having a first portion along a first sidewall of the structure and having a second portion along a second sidewall of the structure. The second sidewall is opposite the first sidewall. The transistor has a control electrode that has a first portion adjacent to the first sidewall and a second portion adjacent to the second sidewall. The PCM structure exhibits first and second resistive values when in first and second phase states, respectively. The heater is on the structure and produces heat when current flows through the heater for changing the phase state of the phase change structure.
摘要翻译：相变存储器（PCM）单元包括晶体管，PCM结构和加热器。晶体管具有结构中的第一电流电极和第二电流电极，以及具有沿着结构的第一侧壁的第一部分并且具有沿着结构的第二侧壁的第二部分的沟道区域。第二侧壁与第一侧壁相对。晶体管具有控制电极，该控制电极具有与第一侧壁相邻的第一部分和与第二侧壁相邻的第二部分。当分别处于第一和第二相位状态时，PCM结构呈现出第一和第二电阻值。当电流流过加热器以改变相变结构的相位状态时，加热器在结构上并产生热量。

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