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1. 发明申请

US20080199996A1 METHOD FOR FORMING A SPLIT GATE MEMORY DEVICE 有权
标题翻译：形成分离栅存储器件的方法
公开(公告)号：US20080199996A1
公开(公告)日：2008-08-21
申请号：US11676403
申请日：2007-02-19
申请人： Ramachandran Muralidhar , Rajesh A. Rao , Matthew T. Herrick , Narayanan C. Ramani , Robert F. Steimle
发明人： Ramachandran Muralidhar , Rajesh A. Rao , Matthew T. Herrick , Narayanan C. Ramani , Robert F. Steimle
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , B82Y10/00 , H01L27/115 , H01L27/11521
摘要： A method forms a split gate memory device. A layer of select gate material over a substrate is patterned to form a first sidewall. A sacrificial spacer is formed adjacent to the first sidewall. Nanoclusters are formed over the substrate including on the sacrificial spacer. The sacrificial spacer is removed after the forming the layer of nanoclusters, wherein nanoclusters formed on the sacrificial spacer are removed and other nanoclusters remain. A layer of control gate material is formed over the substrate after the sacrificial spacer is removed. A control gate of a split gate memory device is formed from the layer of control gate material, wherein the control gate is located over remaining nanoclusters.
摘要翻译：一种方法形成分离栅极存储器件。将衬底上的选择栅极材料层图案化以形成第一侧壁。邻近第一侧壁形成牺牲隔离物。纳米团簇形成在包括在牺牲间隔物上的衬底上。在形成纳米团簇层之后去除牺牲隔离物，其中在牺牲隔离物上形成的纳米团簇被去除并且其它纳米团簇保留。在除去牺牲间隔物之后，在衬底上形成一层控制栅极材料。分离栅极存储器件的控制栅极由控制栅极材料层形成，其中控制栅极位于剩余的纳米簇上。

2. 发明授权

US07416945B1 Method for forming a split gate memory device 有权
标题翻译：用于形成分离栅极存储器件的方法
公开(公告)号：US07416945B1
公开(公告)日：2008-08-26
申请号：US11676403
申请日：2007-02-19
申请人： Ramachandran Muralidhar , Rajesh A. Rao , Matthew T. Herrick , Narayanan C. Ramani , Robert F. Steimle
发明人： Ramachandran Muralidhar , Rajesh A. Rao , Matthew T. Herrick , Narayanan C. Ramani , Robert F. Steimle
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , B82Y10/00 , H01L27/115 , H01L27/11521
摘要： A method forms a split gate memory device. A layer of select gate material over a substrate is patterned to form a first sidewall. A sacrificial spacer is formed adjacent to the first sidewall. Nanoclusters are formed over the substrate including on the sacrificial spacer. The sacrificial spacer is removed after the forming the layer of nanoclusters, wherein nanoclusters formed on the sacrificial spacer are removed and other nanoclusters remain. A layer of control gate material is formed over the substrate after the sacrificial spacer is removed. A control gate of a split gate memory device is formed from the layer of control gate material, wherein the control gate is located over remaining nanoclusters.
摘要翻译：一种方法形成分离栅极存储器件。将衬底上的选择栅极材料层图案化以形成第一侧壁。邻近第一侧壁形成牺牲隔离物。纳米团簇形成在包括在牺牲间隔物上的衬底上。在形成纳米团簇层之后去除牺牲隔离物，其中除去在牺牲隔离物上形成的纳米团簇并保留其他纳米团簇。在除去牺牲间隔物之后，在衬底上形成一层控制栅极材料。分离栅极存储器件的控制栅极由控制栅极材料层形成，其中控制栅极位于剩余的纳米簇上。

3. 发明授权

US07432158B1 Method for retaining nanocluster size and electrical characteristics during processing 有权
标题翻译：在加工过程中保留纳米簇粒径和电气特性的方法
公开(公告)号：US07432158B1
公开(公告)日：2008-10-07
申请号：US11459843
申请日：2006-07-25
申请人： Rajesh A. Rao , Tien Ying Luo , Ramachandran Muralidhar , Robert F. Steimle , Sherry G. Straub
发明人： Rajesh A. Rao , Tien Ying Luo , Ramachandran Muralidhar , Robert F. Steimle , Sherry G. Straub
IPC分类号： H01L21/336 , H01L21/4763 , H01L21/8238 , H01L21/36
CPC分类号： H01L21/28273 , B82Y10/00 , H01L27/1052 , H01L27/11526 , H01L27/11531 , H01L29/42332 , H01L29/7881 , Y10S977/774 , Y10S977/779 , Y10S977/78 , Y10S977/943
摘要： A method of making a semiconductor device includes a substrate having a semiconductor layer having a first portion for non-volatile memory and a second portion exclusive of the first portion. A first dielectric layer is formed over the semiconductor layer. A first plurality of nanoclusters is formed over the first portion and a second plurality of nanoclusters is formed over the second portion. A layer of nitrided oxide is formed around each nanocluster of the first plurality and the second plurality of nanoclusters. Remote plasma nitridation is performed on the layers of nitrided oxide of the first plurality of nanoclusters. The nanoclusters are removed from the second portion. A second dielectric layer is formed over the semiconductor layer. A conductive layer is formed over the second dielectric layer.
摘要翻译：制造半导体器件的方法包括具有半导体层的衬底，该半导体层具有用于非易失性存储器的第一部分和不包括第一部分的第二部分。第一介电层形成在半导体层上。在第一部分上形成第一多个纳米团簇，并且在第二部分上形成第二多个纳米团簇。在第一多个和第二多个纳米团簇的每个纳米簇周围形成氮化氧化物层。在第一多个纳米团簇的氮化氧化物层上进行远程等离子体氮化。从第二部分去除纳米团簇。在半导体层上方形成第二电介质层。在第二电介质层上形成导电层。

4. 发明申请

US20080026526A1 METHOD FOR REMOVING NANOCLUSTERS FROM SELECTED REGIONS 有权
标题翻译：从选择地区移除纳米技术的方法
公开(公告)号：US20080026526A1
公开(公告)日：2008-01-31
申请号：US11459837
申请日：2006-07-25
申请人： Rajesh A. Rao , Tien Ying Luo , Ramachandran Muralidhar , Robert F. Steimle , Sherry G. Straub
发明人： Rajesh A. Rao , Tien Ying Luo , Ramachandran Muralidhar , Robert F. Steimle , Sherry G. Straub
IPC分类号： H01L21/336 , H01L21/3205
CPC分类号： H01L21/28273 , H01L21/28282 , H01L21/32134 , H01L27/11526 , H01L27/11531 , H01L27/11573 , Y10S977/774 , Y10S977/779 , Y10S977/78 , Y10S977/943
摘要： A method of making a semiconductor device includes a substrate having a semiconductor layer having a first portion for non-volatile memory and a second portion exclusive of the first portion. A first dielectric layer is formed on the semiconductor layer. A plasma nitridation is performed on the first dielectric layer. A first plurality of nanoclusters is formed over the first portion and a second plurality of nanoclusters over the second portion. The second plurality of nanoclusters is removed. A second dielectric layer is formed over the semiconductor layer. A conductive layer is formed over the second dielectric layer.
摘要翻译：制造半导体器件的方法包括具有半导体层的衬底，该半导体层具有用于非易失性存储器的第一部分和不包括第一部分的第二部分。在半导体层上形成第一电介质层。在第一电介质层上进行等离子体氮化。在第一部分上形成第一多个纳米团簇，并在第二部分上形成第二多个纳米团簇。第二组纳米团簇被去除。在半导体层上方形成第二电介质层。在第二电介质层上形成导电层。

5. 发明授权

US07160775B2 Method of discharging a semiconductor device 有权
标题翻译：放电半导体器件的方法
公开(公告)号：US07160775B2
公开(公告)日：2007-01-09
申请号：US10912825
申请日：2004-08-06
申请人： Erwin J. Prinz , Ramachandran Muralidhar , Rajesh A. Rao , Michael A. Sadd , Robert F. Steimle , Craig T. Swift , Bruce E. White
发明人： Erwin J. Prinz , Ramachandran Muralidhar , Rajesh A. Rao , Michael A. Sadd , Robert F. Steimle , Craig T. Swift , Bruce E. White
IPC分类号： H01L21/336
CPC分类号： B82Y10/00 , G11C16/0475 , G11C16/14 , G11C2216/06 , H01L21/28273 , H01L21/28282 , H01L29/42332
摘要： In one embodiment, a method for discharging a semiconductor device includes providing a semiconductor substrate, forming a hole blocking dielectric layer over the semiconductor substrate, forming nanoclusters over the hole blocking dielectric layer, forming a charge trapping layer over the nanoclusters, and applying an electric field to the nanoclusters to discharge the semiconductor device. Applying the electric field may occur while applying ultraviolet (UV) light. In one embodiment, the hole blocking dielectric layer comprises forming the hole blocking dielectric layer having a thickness greater than approximately 50 Angstroms.
摘要翻译：在一个实施例中，一种用于放电半导体器件的方法包括提供半导体衬底，在半导体衬底上形成空穴阻挡电介质层，在空穴阻挡介电层上形成纳米团簇，在纳米团簇上形成电荷俘获层，并施加电场到纳米团簇放电半导体器件。施加紫外线（UV）光时可能会发生电场。在一个实施例中，空穴阻挡介电层包括形成厚度大于约50埃的空穴阻挡介电层。

6. 发明授权

US06958265B2 Semiconductor device with nanoclusters 有权
标题翻译：具有纳米团簇的半导体器件
公开(公告)号：US06958265B2
公开(公告)日：2005-10-25
申请号：US10663621
申请日：2003-09-16
申请人： Robert F. Steimle , Ramachandran Muralidhar , Wayne M. Paulson , Rajesh A. Rao , Bruce E. White, Jr. , Erwin J. Prinz
发明人： Robert F. Steimle , Ramachandran Muralidhar , Wayne M. Paulson , Rajesh A. Rao , Bruce E. White, Jr. , Erwin J. Prinz
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8238 , H01L27/115 , H01L29/423
CPC分类号： B82Y10/00 , H01L21/28273 , H01L27/115 , H01L29/42332
摘要： A process of forming a device with nanoclusters. The process includes forming nanoclusters (e.g. silicon nanocrystals) and forming an oxidation barrier layer over the nanoclusters to inhibit oxidizing agents from oxidizing the nanoclusters during a subsequent formation of a dielectric of the device. At least a portion of the oxidation barrier layer is removed after the formation of the dielectric. In one example, the device is a memory wherein the nanoclusters are utilized as charge storage locations for charge storage transistors of the memory. In this example, the oxidation barrier layer protects the nanoclusters from oxidizing agents due to the formation of gate dielectric for high voltage transistors of the memory.
摘要翻译：用纳米团簇形成装置的方法。该方法包括形成纳米团簇（例如硅纳米晶体）并在纳米簇上形成氧化阻挡层，以在随后形成器件的电介质期间抑制氧化剂氧化纳米团簇。在形成电介质后，去除至少一部分氧化阻挡层。在一个示例中，该器件是其中纳米团簇用作存储器的电荷存储晶体管的电荷存储位置的存储器。在该实施例中，氧化阻挡层由于形成用于存储器的高压晶体管的栅极电介质而保护纳米团簇免受氧化剂的影响。

7. 发明授权

US07186616B2 Method of removing nanoclusters in a semiconductor device 有权
标题翻译：在半导体器件中去除纳米团簇的方法
公开(公告)号：US07186616B2
公开(公告)日：2007-03-06
申请号：US11082094
申请日：2005-03-16
申请人： Rajesh A. Rao , Ramachandran Muralidhar , Robert F. Steimle
发明人： Rajesh A. Rao , Ramachandran Muralidhar , Robert F. Steimle
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , H01L21/30604 , H01L21/3065 , H01L29/42332 , H01L29/66825
摘要： A method for removing nanoclusters from a semiconductor device includes etching a selected portion of an insulating layer, flowing a reducing gas over the semiconductor device at a temperature in a range of 400–900 degrees Celsius, and flowing a gas comprising halogen over the semiconductor device at a temperature in a range of 400–900 degrees Celsius. In another form, a method for removing the nanoclusters includes implanting germanium or nitrogen into the nanociusters, etching a selected portion of the insulating layer using a dry etch process, and removing the layer of nanoclusters using a wet etch process that is selective to an insulating layer.
摘要翻译：一种用于从半导体器件中去除纳米团簇的方法包括：在400-900摄氏度的温度范围内蚀刻绝缘层的选定部分，使还原气体在半导体器件上流动，并使包含卤素的气体流过半导体器件在400-900摄氏度的温度范围内。在另一种形式中，用于去除纳米团簇的方法包括将锗或氮注入到纳米过滤器中，使用干蚀刻工艺蚀刻绝缘层的选定部分，以及使用对绝缘选择性的湿蚀刻工艺去除纳米团簇层层。

8. 发明授权

US07091130B1 Method of forming a nanocluster charge storage device 有权
标题翻译：形成纳米团簇电荷存储装置的方法
公开(公告)号：US07091130B1
公开(公告)日：2006-08-15
申请号：US10876820
申请日：2004-06-25
申请人： Rajesh A. Rao , Ramachandran Muralidhar , Robert F. Steimle , Gowrishankar L. Chindalore
发明人： Rajesh A. Rao , Ramachandran Muralidhar , Robert F. Steimle , Gowrishankar L. Chindalore
IPC分类号： H01I21/302
CPC分类号： H01L27/11546 , B82Y10/00 , H01L21/28273 , H01L21/28282 , H01L27/105 , H01L27/11526 , H01L27/11568 , H01L27/11573 , H01L29/42332
摘要： A plurality of memory cell devices is formed by using an intermediate dual polysilicon-nitride control electrode stack overlying nanoclusters. The stack includes a first-formed polysilicon-nitride layer and a second-formed polysilicon-containing layer. The second-formed polysilicon-containing layer is removed from areas containing the plurality of memory cells. In one form the second-formed polysilicon-containing layer also contains a nitride portion which is also removed, thereby leaving the first-formed polysilicon-nitride layer for the memory cell devices. In another form the second-formed ploysilicon-containing layer does not contain nitride and a nitride portion of the first-formed polysilicon-nitride layer is also removed. In the latter form a subsequent nitride layer is formed over the remaining polysilicon layer. In both forms a top portion of the device is protected from oxidation, thereby preserving size and quality of underlying nanoclusters. Gate electrodes of devices peripheral to the memory cell devices also use the second-formed polysilicon-containing layer.
摘要翻译：通过使用覆盖纳米团簇的中间双重多晶氮化物控制电极堆叠形成多个存储单元器件。堆叠包括第一形成的多晶氮化物层和第二形成的含多晶硅的层。第二形成的含多晶硅的层从包含多个存储单元的区域中去除。在一种形式中，第二形成的含多晶硅的层还包含也被去除的氮化物部分，从而留下用于存储单元器件的第一形成的多晶氮化物层。在另一种形式中，第二形成的含硅层不含有氮化物，并且还去除了第一形成的多晶氮化物层的氮化物部分。在后一种形式中，在剩余的多晶硅层上形成随后的氮化物层。在这两种形式中，器件的顶部部分被保护免受氧化，从而保持下面的纳米簇的尺寸和质量。存储单元器件外围的器件的栅电极也使用第二形成的含多晶硅的层。

9. 发明授权

US07445984B2 Method for removing nanoclusters from selected regions 有权
标题翻译：从选定区域去除纳米团簇的方法
公开(公告)号：US07445984B2
公开(公告)日：2008-11-04
申请号：US11459837
申请日：2006-07-25
申请人： Rajesh A. Rao , Tien Ying Luo , Ramachandran Muralidhar , Robert F. Steimle , Sherry G. Straub
发明人： Rajesh A. Rao , Tien Ying Luo , Ramachandran Muralidhar , Robert F. Steimle , Sherry G. Straub
IPC分类号： H01L21/336 , H01L21/4763 , H01L21/8238 , H01L21/36
CPC分类号： H01L21/28273 , H01L21/28282 , H01L21/32134 , H01L27/11526 , H01L27/11531 , H01L27/11573 , Y10S977/774 , Y10S977/779 , Y10S977/78 , Y10S977/943
摘要： A method of making a semiconductor device includes a substrate having a semiconductor layer having a first portion for non-volatile memory and a second portion exclusive of the first portion. A first dielectric layer is formed on the semiconductor layer. A plasma nitridation is performed on the first dielectric layer. A first plurality of nanoclusters is formed over the first portion and a second plurality of nanoclusters over the second portion. The second plurality of nanoclusters is removed. A second dielectric layer is formed over the semiconductor layer. A conductive layer is formed over the second dielectric layer.
摘要翻译：制造半导体器件的方法包括具有半导体层的衬底，该半导体层具有用于非易失性存储器的第一部分和不包括第一部分的第二部分。在半导体层上形成第一电介质层。在第一电介质层上进行等离子体氮化。在第一部分上形成第一多个纳米团簇，并在第二部分上形成第二多个纳米团簇。第二组纳米团簇被去除。在半导体层上方形成第二电介质层。在第二电介质层上形成导电层。

10. 发明授权

US06903967B2 Memory with charge storage locations and adjacent gate structures 有权
标题翻译：具有电荷存储位置和相邻门结构的存储器
公开(公告)号：US06903967B2
公开(公告)日：2005-06-07
申请号：US10443908
申请日：2003-05-22
申请人： Leo Mathew , Robert F. Steimle , Ramachandran Muralidhar
发明人： Leo Mathew , Robert F. Steimle , Ramachandran Muralidhar
IPC分类号： G11C11/34 , G11C16/04 , H01L21/28 , H01L21/336 , H01L29/788 , H01L29/792
CPC分类号： B82Y10/00 , G11C16/0458 , G11C16/0475 , G11C2216/06 , H01L21/28273 , H01L29/66818 , H01L29/66825 , H01L29/785 , H01L29/7855 , H01L29/7887 , H01L29/7923
摘要： A memory having gate structures adjacent opposing sidewalls of a semiconductor structure including a channel region and a plurality of charge storage locations between the gate structures and the opposing sidewalls. The channel region is located between two current terminal regions, which in one example serve as the source/drain regions. A memory cell can be implemented in an array of memory cells wherein one gate structure is coupled to one word line and the other gate structure is coupled to another word line. In one example, each cell includes four charge storage locations, each for storing one bit of data.
摘要翻译：一种存储器，其具有邻近半导体结构的相对侧壁的栅极结构，该半导体结构包括沟道区和栅极结构与相对侧壁之间的多个电荷存储位置。沟道区域位于两个电流端子区域之间，在一个示例中，该区域用作源极/漏极区域。存储器单元可以在存储单元的阵列中实现，其中一个栅极结构耦合到一个字线，而另一个栅极结构耦合到另一个字线。在一个示例中，每个单元包括四个电荷存储位置，每个用于存储一位数据。

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