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1. 发明申请

US20060211206A1 Electronic devices including non-volatile memory and processes for forming the same 有权
标题翻译：包括非易失性存储器的电子设备及其形成工艺
公开(公告)号：US20060211206A1
公开(公告)日：2006-09-21
申请号：US11084283
申请日：2005-03-18
申请人： Rajesh Rao , Ramachandran Muralidhar
发明人： Rajesh Rao , Ramachandran Muralidhar
IPC分类号： H01L21/8234 , H01L21/76
CPC分类号： H01L27/11526 , B82Y10/00 , H01L27/105 , H01L27/11546
摘要： A process for forming an electronic device can be performed, such that as little as one gate electric layer may be formed within each region of the electronic device. In one embodiment, the electronic device can include an NVM array and other regions that have different gate dielectric layers. By protecting the field isolation regions within the NVM array and other regions while gate dielectric layer are formed, the field isolation regions may be exposed to as little as one oxide etch between the time any of the gate dielectric layers are formed the time such gate dielectric layers are covered by gate electrode layers. The process helps to reduce field isolation erosion and reduce problems associated therewith.
摘要翻译：可以执行用于形成电子器件的工艺，使得可以在电子器件的每个区域内形成少至一个栅极电层。在一个实施例中，电子设备可以包括NVM阵列和具有不同栅介电层的其它区域。通过在形成栅介质层的同时保护NVM阵列和其它区域内的场隔离区域，在形成任何栅极电介质层的时间之间，场隔离区可能暴露于少至一个氧化物蚀刻，层被栅极电极层覆盖。该过程有助于减少场隔离侵蚀并减少与之相关的问题。

2. 发明申请

US20060211199A1 Method of removing nanoclusters in a semiconductor device 有权
标题翻译：在半导体器件中去除纳米团簇的方法
公开(公告)号：US20060211199A1
公开(公告)日：2006-09-21
申请号：US11082094
申请日：2005-03-16
申请人： Rajesh Rao , Ramachandran Muralidhar , Robert Steimle
发明人： Rajesh Rao , Ramachandran Muralidhar , Robert Steimle
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , H01L21/30604 , H01L21/3065 , H01L29/42332 , H01L29/66825
摘要： A method for removing nanoclusters from a semiconductor device includes etching a selected portion of an insulating layer, flowing a reducing gas over the semiconductor device at a temperature in a range of 400-900 degrees Celsius, and flowing a gas comprising halogen over the semiconductor device a temperature in a range of 400-900 degrees Celsius. In another form, a method for removing the nanoclusters includes implanting germanium or nitrogen into the nanoclusters, etching a selected portion of the insulating layer using a dry etch process, and removing the layer of nanoclusters using a wet etch process that is selective to an insulating layer.
摘要翻译：一种用于从半导体器件中去除纳米团簇的方法包括：在400-900摄氏度的温度范围内蚀刻绝缘层的选定部分，使还原气体在半导体器件上流动，并使包含卤素的气体流过半导体器件温度在400-900摄氏度的范围内。在另一种形式中，用于去除纳米团簇的方法包括将锗或氮注入到纳米团簇中，使用干蚀刻工艺蚀刻绝缘层的选定部分，以及使用对绝缘选择性的湿蚀刻工艺去除纳米团簇层层。

3. 发明申请

US20060194438A1 METHOD OF FORMING A NANOCLUSTER CHARGE STORAGE DEVICE 有权
标题翻译：形成纳米碳管充电储存装置的方法
公开(公告)号：US20060194438A1
公开(公告)日：2006-08-31
申请号：US10876820
申请日：2004-06-25
申请人： Rajesh Rao , Ramachandran Muralidhar , Robert Steimle , Gowrishankar Chindalore
发明人： Rajesh Rao , Ramachandran Muralidhar , Robert Steimle , Gowrishankar Chindalore
IPC分类号： H01L21/302 , H01L31/112 , H01L21/36
CPC分类号： H01L27/11546 , B82Y10/00 , H01L21/28273 , H01L21/28282 , H01L27/105 , H01L27/11526 , H01L27/11568 , H01L27/11573 , H01L29/42332
摘要： A plurality of memory cell devices is formed by using an intermediate dual polysilicon-nitride control electrode stack overlying nanoclusters. The stack includes a first-formed polysilicon-nitride layer and a second-formed polysilicon-containing layer. The second-formed polysilicon-containing layer is removed from areas containing the plurality of memory cells. In one form the second-formed polysilicon-containing layer also contains a nitride portion which is also removed, thereby leaving the first-formed polysilicon-nitride layer for the memory cell devices. In another form the second-formed ploysilicon-containing layer does not contain nitride and a nitride portion of the first-formed polysilicon-nitride layer is also removed. In the latter form a subsequent nitride layer is formed over the remaining polysilicon layer. In both forms a top portion of the device is protected from oxidation, thereby preserving size and quality of underlying nanoclusters. Gate electrodes of devices peripheral to the memory cell devices also use the second-formed polysilicon-containing layer.
摘要翻译：通过使用覆盖纳米团簇的中间双重多晶氮化物控制电极堆叠形成多个存储单元器件。堆叠包括第一形成的多晶氮化物层和第二形成的含多晶硅的层。第二形成的含多晶硅的层从包含多个存储单元的区域中去除。在一种形式中，第二形成的含多晶硅的层还包含也被去除的氮化物部分，从而留下用于存储单元器件的第一形成的多晶氮化物层。在另一种形式中，第二形成的含硅层不含有氮化物，并且还去除了第一形成的多晶氮化物层的氮化物部分。在后一种形式中，在剩余的多晶硅层上形成随后的氮化物层。在这两种形式中，器件的顶部部分被保护免受氧化，从而保持下面的纳米簇的尺寸和质量。存储单元器件外围的器件的栅电极也使用第二形成的含多晶硅的层。

4. 发明申请

US20060189079A1 Method of forming nanoclusters 审中-公开
标题翻译：形成纳米团簇的方法
公开(公告)号：US20060189079A1
公开(公告)日：2006-08-24
申请号：US11065519
申请日：2005-02-24
申请人： Tushar Merchant , Ramachandran Muralidhar , Rajesh Rao , Matthew Stoker , Sherry Straub
发明人： Tushar Merchant , Ramachandran Muralidhar , Rajesh Rao , Matthew Stoker , Sherry Straub
IPC分类号： H01L21/336
CPC分类号： H01L29/42332 , B82Y10/00 , H01L29/40114 , H01L29/66825
摘要： A method for forming nanoclusters includes providing a semiconductor substrate; forming a dielectric layer over the semiconductor substrate, exposing the semiconductor substrate to a first flux of atoms to form first nuclei on the dielectric layer, exposing the first nuclei to a first inert atmosphere after exposing the semiconductor substrate to the first flux, and exposing the semiconductor substrate to a second flux of atoms to form second nuclei after exposing the first nuclei to an inert atmosphere.
摘要翻译：一种形成纳米团簇的方法包括提供半导体衬底; 在所述半导体衬底上形成电介质层，将所述半导体衬底暴露于所述第一原子通量，以在所述电介质层上形成第一核，在将所述半导体衬底暴露于所述第一焊剂之后，将所述第一核暴露于第一惰性气氛，半导体衬底到第二个原子通量，以在将第一核暴露于惰性气氛之后形成第二核。

5. 发明申请

US20060166452A1 Non-volatile nanocrystal memory and method therefor 有权
标题翻译：非挥发性纳米晶体记忆及其方法
公开(公告)号：US20060166452A1
公开(公告)日：2006-07-27
申请号：US11043826
申请日：2005-01-26
申请人： Rajesh Rao , Ramachandran Muralidhar , Bruce White
发明人： Rajesh Rao , Ramachandran Muralidhar , Bruce White
IPC分类号： H01L21/331
CPC分类号： H01L29/42348 , B82Y10/00 , H01L21/28273 , H01L29/42332 , H01L29/513 , H01L29/518
摘要： A nanocrystal non-volatile memory (NVM) has a dielectric between the control gate and the nanocrystals that has a nitrogen content sufficient to reduce the locations in the dielectric where electrons can be trapped. This is achieved by grading the nitrogen concentration. The concentration of nitrogen is highest near the nanocrystals where the concentration of electron/hole traps tend to be the highest and is reduced toward the control gate where the concentration of electron/hole traps is lower. This has been found to have the beneficial effect of reducing the number of locations where charge can be trapped.
摘要翻译：纳米晶体非易失性存储器（NVM）在控制栅极和纳米晶体之间具有电介质，其具有足够的氮含量以减少电介质中的电子被俘获的位置。这是通过对氮浓度进行分级而实现的。靠近纳米晶体的氮浓度最高，其中电子/空穴阱的浓度趋于最高，并且朝向电子/空穴陷阱的浓度较低的对照栅极减小。已经发现这具有减少电荷被捕获的位置数量的有益效果。

6. 发明授权

US07479429B2 Split game memory cell method 有权
标题翻译：分割游戏记忆单元法
公开(公告)号：US07479429B2
公开(公告)日：2009-01-20
申请号：US11669307
申请日：2007-01-31
申请人： Rajesh Rao , Ramachandran Muralidhar , Leo Mathew
发明人： Rajesh Rao , Ramachandran Muralidhar , Leo Mathew
IPC分类号： H01L21/336
CPC分类号： H01L29/7923 , B82Y10/00 , H01L21/28273 , H01L21/28282 , H01L29/42328 , H01L29/42344 , H01L29/7887
摘要： A multi-bit split-gate memory device is formed over a substrate. A storage layer is formed over the substrate. A first conductive layer is formed over the storage layer. A thickness of a portion of the conductive layer is removed to leave a pillar of the conductive layer and an area of reduced thickness of the conductive layer. A first sidewall spacer is formed adjacent to the pillar to cover a first portion and a second portion of the area of reduced thickness of the conductive layer. The pillar is replaced with a select gate. The area of reduced thickness is selectively removed to leave the first and second portions as control gates.
摘要翻译：在衬底上形成多位分离栅极存储器件。在衬底上形成存储层。在存储层上形成第一导电层。去除导电层的一部分的厚度以留下导电层的柱和导电层的厚度减小的面积。形成邻近柱的第一侧壁间隔物以覆盖导电层厚度减小区域的第一部分和第二部分。柱子被一个选择门取代。选择性地去除厚度减小的区域以留下第一和第二部分作为控制门。

7. 发明申请

US20060199335A1 Electronic devices including non-volatile memory structures and processes for forming the same 审中-公开
标题翻译：包括非易失性存储器结构的电子设备及其形成工艺
公开(公告)号：US20060199335A1
公开(公告)日：2006-09-07
申请号：US11071977
申请日：2005-03-04
申请人： Rajesh Rao , Ramachandran Muralidhar
发明人： Rajesh Rao , Ramachandran Muralidhar
IPC分类号： H01L21/336 , H01L21/8238
CPC分类号： H01L27/11568 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L29/66772
摘要： An electronic device can include an NVM structure and a gate electrode outside an NVM array. In one embodiment, a first gate dielectric layer and a first gate electrode layer are formed before forming NVM cells within an NVM array. The first gate electrode layer helps to protect the first gate dielectric layer from becoming thinner or thicker during subsequent processing used to form NVM cells. In another embodiment, NVM structures and transistor structures can be formed where the NVM structures have one more spacer adjacent to the NVM structures as compared to the transistor structures.
摘要翻译：电子设备可以包括NVM结构和NVM阵列外部的栅电极。在一个实施例中，在形成NVM阵列内的NVM单元之前形成第一栅极介电层和第一栅极电极层。第一栅极电极层有助于在用于形成NVM电池的后续处理期间保护第一栅极介电层变得更薄或更厚。在另一个实施例中，可以形成NVM结构和晶体管结构，其中与晶体管结构相比，NVM结构具有与NVM结构相邻的更多间隔区。

8. 发明申请

US20060030105A1 Method of discharging a semiconductor device 有权
标题翻译：放电半导体器件的方法
公开(公告)号：US20060030105A1
公开(公告)日：2006-02-09
申请号：US10912825
申请日：2004-08-06
申请人： Erwin Prinz , Ramachandran Muralidhar , Rajesh Rao , Michael Sadd , Robert Steimle , Craig Swift , Bruce White
发明人： Erwin Prinz , Ramachandran Muralidhar , Rajesh Rao , Michael Sadd , Robert Steimle , Craig Swift , Bruce White
IPC分类号： H01L21/336
CPC分类号： B82Y10/00 , G11C16/0475 , G11C16/14 , G11C2216/06 , H01L21/28273 , H01L21/28282 , H01L29/42332
摘要： In one embodiment, a method for discharging a semiconductor device includes providing a semiconductor substrate, forming a hole blocking dielectric layer over the semiconductor substrate, forming nanoclusters over the hole blocking dielectric layer, forming a charge trapping layer over the nanoclusters, and applying an electric field to the nanoclusters to discharge the semiconductor device. Applying the electric field may occur while applying ultraviolet (UV) light. In one embodiment, the hole blocking dielectric layer comprises forming the hole blocking dielectric layer having a thickness greater than approximately 50 Angstroms.
摘要翻译：在一个实施例中，一种用于放电半导体器件的方法包括提供半导体衬底，在半导体衬底上形成空穴阻挡电介质层，在空穴阻挡介电层上形成纳米团簇，在纳米团簇上形成电荷俘获层，并施加电场到纳米团簇放电半导体器件。施加紫外线（UV）光时可能会发生电场。在一个实施例中，空穴阻挡介电层包括形成厚度大于约50埃的空穴阻挡介电层。

9. 发明授权

US07557008B2 Method of making a non-volatile memory device 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US07557008B2
公开(公告)日：2009-07-07
申请号：US11625882
申请日：2007-01-23
申请人： Rajesh Rao , Ramachandran Muralidhar
发明人： Rajesh Rao , Ramachandran Muralidhar
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , B82Y10/00 , H01L29/42328 , H01L29/42332 , H01L29/66545 , H01L29/66825 , H01L29/7881
摘要： A method forms a nonvolatile memory device using a semiconductor substrate. A charge storage layer is formed overlying the semiconductor substrate and a layer of gate material is formed overlying the charge storage layer to form a control gate electrode. A protective layer overlies the layer of gate material. Dopants are implanted into the semiconductor substrate and are self-aligned to the control gate electrode on at least one side of the control gate electrode to form a source and a drain in the semiconductor substrate on opposing sides of the control gate electrode. The protective layer prevents the dopants from penetrating into the control gate electrode. The protective layer that overlies the layer of gate material is removed. Electrical contact is made to the control gate electrode, the source and the drain. In one form a select gate is also provided in the memory device.
摘要翻译：一种方法形成使用半导体衬底的非易失性存储器件。形成覆盖在半导体衬底上的电荷存储层，并且形成覆盖电荷存储层的栅极材料层以形成控制栅电极。保护层覆盖栅极材料层。将掺杂剂注入到半导体衬底中，并且在控制栅电极的至少一侧上与控制栅电极自对准，以在控制栅电极的相对侧上的半导体衬底中形成源极和漏极。保护层防止掺杂剂渗入控制栅电极。覆盖栅极材料层的保护层被去除。与控制栅电极，源极和漏极电接触。在一种形式中，选择栅极也被提供在存储器件中。

10. 发明申请

US20080176371A1 METHOD OF MAKING A NON-VOLATILE MEMORY DEVICE 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US20080176371A1
公开(公告)日：2008-07-24
申请号：US11625882
申请日：2007-01-23
申请人： Rajesh Rao , Ramachandran Muralidhar
发明人： Rajesh Rao , Ramachandran Muralidhar
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , B82Y10/00 , H01L29/42328 , H01L29/42332 , H01L29/66545 , H01L29/66825 , H01L29/7881
摘要： A method forms a nonvolatile memory device using a semiconductor substrate. A charge storage layer is formed overlying the semiconductor substrate and a layer of gate material is formed overlying the charge storage layer to form a control gate electrode. A protective layer overlies the layer of gate material. Dopants are implanted into the semiconductor substrate and are self-aligned to the control gate electrode on at least one side of the control gate electrode to form a source and a drain in the semiconductor substrate on opposing sides of the control gate electrode. The protective layer prevents the dopants from penetrating into the control gate electrode. The protective layer that overlies the layer of gate material is removed. Electrical contact is made to the control gate electrode, the source and the drain. In one form a select gate is also provided in the memory device.
摘要翻译：一种方法形成使用半导体衬底的非易失性存储器件。形成覆盖在半导体衬底上的电荷存储层，并且形成覆盖电荷存储层的栅极材料层以形成控制栅电极。保护层覆盖栅极材料层。将掺杂剂注入到半导体衬底中，并且在控制栅电极的至少一侧上与控制栅电极自对准，以在控制栅电极的相对侧上的半导体衬底中形成源极和漏极。保护层防止掺杂剂渗入控制栅电极。覆盖栅极材料层的保护层被去除。与控制栅电极，源极和漏极电接触。在一种形式中，选择栅极也被提供在存储器件中。

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