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1. 发明授权

US07403075B2 Ultra wide band signal generator 有权
标题翻译：超宽带信号发生器
公开(公告)号：US07403075B2
公开(公告)日：2008-07-22
申请号：US11345716
申请日：2006-02-02
申请人： Rajarshi Mukhopadhyay , Sebastien Nuttinck , Yun-Seo Park , Sang-Woong Yoon , Sang-Hyun Woo , Hyun-Il Kang , Chang-Ho Lee , Joy Laskar
发明人： Rajarshi Mukhopadhyay , Sebastien Nuttinck , Yun-Seo Park , Sang-Woong Yoon , Sang-Hyun Woo , Hyun-Il Kang , Chang-Ho Lee , Joy Laskar
IPC分类号： H03B1/00
CPC分类号： H03B5/1231 , H03B5/1203 , H03B5/124 , H03B5/1256 , H03B2200/007
摘要： Disclosed is an ultra wide band signal generator. The ultra wide band signal generator generates a signal of a required frequency using a harmonic signal having a frequency range of a ultra wide band (UWB). The ultra wide band signal generator includes an active inductor for generating harmonic signals having power strengths substantially equal to each other within a non-linear operation range, the tunable active inductor capable of tuning a value thereof, an oscillator for amplifying and outputting the harmonic signals generated from the active inductor by frequency-transiting the harmonic signals into high frequency bands, and a filter for selectively outputting one of the harmonic signals output from the oscillator.
摘要翻译：公开了一种超宽带信号发生器。超宽带信号发生器使用具有超宽带（UWB）的频率范围的谐波信号产生所需频率的信号。超宽带信号发生器包括有源电感器，用于产生具有在非线性运行范围内彼此基本相等的功率强度的谐波信号，该可调谐有源电感器能调谐其值，用于放大和输出谐波信号的振荡器通过将谐波信号频率转换成高频带从有源电感器产生的滤波器以及用于选择性地输出从振荡器输出的谐波信号之一的滤波器。

2. 发明申请

US20060197617A1 Ultra wide band signal generator 有权
标题翻译：超宽带信号发生器
公开(公告)号：US20060197617A1
公开(公告)日：2006-09-07
申请号：US11345716
申请日：2006-02-02
申请人： Rajarshi Mukhopadhy , Sebastien Nuttinck , Yun-Seo Park , Sang-Woong Yoon , Sang-Hyun Woo , Hyun-Il Kang , Chang-Ho Lee , Joy Laskar
发明人： Rajarshi Mukhopadhy , Sebastien Nuttinck , Yun-Seo Park , Sang-Woong Yoon , Sang-Hyun Woo , Hyun-Il Kang , Chang-Ho Lee , Joy Laskar
IPC分类号： H03B1/00
CPC分类号： H03B5/1231 , H03B5/1203 , H03B5/124 , H03B5/1256 , H03B2200/007
摘要： Disclosed is an ultra wide band signal generator. The ultra wide band signal generator generates a signal of a required frequency using a harmonic signal having a frequency range of a ultra wide band (UWB). The ultra wide band signal generator includes an active inductor for generating harmonic signals having power strengths substantially equal to each other within a non-linear operation range, the tunable active inductor capable of tuning a value thereof, an oscillator for amplifying and outputting the harmonic signals generated from the active inductor by frequency-transiting the harmonic signals into high frequency bands, and a filter for selectively outputting one of the harmonic signals output from the oscillator.
摘要翻译：公开了一种超宽带信号发生器。超宽带信号发生器使用具有超宽带（UWB）的频率范围的谐波信号产生所需频率的信号。超宽带信号发生器包括有源电感器，用于产生具有在非线性运行范围内彼此基本相等的功率强度的谐波信号，该可调谐有源电感器能调谐其值，用于放大和输出谐波信号的振荡器通过将谐波信号频率转换成高频带从有源电感器产生的滤波器以及用于选择性地输出从振荡器输出的谐波信号之一的滤波器。

3. 发明申请

US20060170523A1 Tunable active inductor 有权
标题翻译：可调谐有源电感
公开(公告)号：US20060170523A1
公开(公告)日：2006-08-03
申请号：US11141123
申请日：2005-05-31
申请人： Rajarshi Mukhopadhy , Sebastien Nuttinck , Sang-Hyun Woo , Jong-Han Kim , Seong-Soo Lee , Chang-Ho Lee , Joy Laskar
发明人： Rajarshi Mukhopadhy , Sebastien Nuttinck , Sang-Hyun Woo , Jong-Han Kim , Seong-Soo Lee , Chang-Ho Lee , Joy Laskar
IPC分类号： H03H11/00
CPC分类号： H03H11/50 , H03H11/48
摘要： An active inductor capable of tuning a self-resonant frequency, an inductance, a Q factor, and a peak Q frequency by applying a tunable feedback resistor to a cascode-grounded active inductor is disclosed. The tunable active inductor includes a first transistor having a source connected to a power supply voltage and a gate connected to first bias voltage; a second transistor having a drain connected to a drain of the first transistor and a gate connected to a second bias voltage; a third transistor having a drain connected to a source of the second transistor and a source connected to a ground voltage; a fourth transistor having a drain connected to a gate of the third transistor, a source connected to the ground voltage and a gate connected to a third bias voltage; a fifth transistor having a source connected to the drain of the fourth transistor and a drain connected to the power supply voltage.
摘要翻译：公开了一种通过将可调谐反馈电阻器施加到共源共栅接地有源电感器来调谐自谐振频率，电感，Q因子和峰值Q频率的有源电感器。可调谐有源电感器包括具有连接到电源电压的源极和连接到第一偏置电压的栅极的第一晶体管; 第二晶体管，具有连接到所述第一晶体管的漏极的漏极和连接到第二偏置电压的栅极; 具有连接到所述第二晶体管的源极的漏极和连接到接地电压的源极的第三晶体管; 具有连接到第三晶体管的栅极的漏极的第四晶体管，连接到接地电压的源极和连接到第三偏置电压的栅极; 第五晶体管，其源极连接到第四晶体管的漏极，漏极连接到电源电压。

4. 发明授权

US07253707B2 Tunable active inductor 有权
标题翻译：可调谐有源电感
公开(公告)号：US07253707B2
公开(公告)日：2007-08-07
申请号：US11141123
申请日：2005-05-31
申请人： Rajarshi Mukhopadhy , Sebastien Nuttinck , Sang-Hyun Woo , Jong-Han Kim , Seong-Soo Lee , Chang-Ho Lee , Joy Laskar
发明人： Rajarshi Mukhopadhy , Sebastien Nuttinck , Sang-Hyun Woo , Jong-Han Kim , Seong-Soo Lee , Chang-Ho Lee , Joy Laskar
IPC分类号： H03H11/00 , H03H11/04
CPC分类号： H03H11/50 , H03H11/48
摘要： An active inductor capable of tuning a self-resonant frequency, an inductance, a Q factor, and a peak Q frequency by applying a tunable feedback resistor to a cascode-grounded active inductor is disclosed. The tunable active inductor includes a first transistor having a source connected to a power supply voltage and a gate connected to first bias voltage; a second transistor having a drain connected to a drain of the first transistor and a gate connected to a second bias voltage; a third transistor having a drain connected to a source of the second transistor and a source connected to a ground voltage; a fourth transistor having a drain connected to a gate of the third transistor, a source connected to the ground voltage and a gate connected to a third bias voltage; a fifth transistor having a source connected to the drain of the fourth transistor and a drain connected to the power supply voltage.
摘要翻译：公开了一种通过将可调谐反馈电阻器施加到共源共栅接地有源电感器来调谐自谐振频率，电感，Q因子和峰值Q频率的有源电感器。可调谐有源电感器包括具有连接到电源电压的源极和连接到第一偏置电压的栅极的第一晶体管; 第二晶体管，具有连接到所述第一晶体管的漏极的漏极和连接到第二偏置电压的栅极; 具有连接到所述第二晶体管的源极的漏极和连接到接地电压的源极的第三晶体管; 具有连接到第三晶体管的栅极的漏极的第四晶体管，连接到接地电压的源极和连接到第三偏置电压的栅极; 第五晶体管，其源极连接到第四晶体管的漏极，漏极连接到电源电压。

5. 发明授权

US08093659B2 Three-dimensional stacked-fin-MOS device with multiple gate regions 有权
标题翻译：具有多个栅极区域的三维堆叠鳍式MOS器件
公开(公告)号：US08093659B2
公开(公告)日：2012-01-10
申请号：US12161709
申请日：2007-01-22
申请人： Sebastien Nuttinck
发明人： Sebastien Nuttinck
IPC分类号： H01L21/762 , H01L27/12
CPC分类号： H01L29/7856 , B82Y10/00 , B82Y40/00 , H01L21/845 , H01L27/1211 , H01L29/0673 , H01L29/66439 , H01L29/66795 , H01L29/775
摘要： The invention provides a three-dimensional stacked fin metal oxide semiconductor (SF-MOS) device (10,30) comprising a protrusion or fin structure with a plurality of stacked semiconductor regions (3,5,12), in which a second semiconductor region (5,12) is separated from a first semiconductor region (3,5) by an isolation region (4,11). A gate isolation layer (8) extends at least over the sidewalls of the protrusion (7) and a gate electrode extends over the gate isolation layer (8). The gate electrode comprises a plurality of gate regions (13,14,15) wherein each gate region (13,14,15) extends over another semiconductor region (3,5,12). In this way each gate region (13,14,15) influences the conduction channel of another semiconductor region (3,5,12) and hence adds another degree of freedom with which the performance of the SF-MOS device (10,30) can be optimized. The invention further provides a method of manufacturing the SF-MOS device (10,30) according to the invention.
摘要翻译：本发明提供了一种三维堆叠鳍状金属氧化物半导体（SF-MOS）器件（10,30），其包括具有多个堆叠半导体区域（3,5,12）的突起或鳍状结构，其中第二半导体区域（5,12）通过隔离区域（4,11）与第一半导体区域（3,5）分离。栅极隔离层（8）至少在突起（7）的侧壁上延伸，并且栅电极在栅极隔离层（8）上延伸。栅极电极包括多个栅极区域（13,14,15），其中每个栅极区域（13,14,15）在另一个半导体区域（3,5,12）上延伸。以这种方式，每个栅极区域（13,14,15）影响另一个半导体区域（3,5,12）的导电沟道，因此增加了SF-MOS器件（10,30）的性能的另一自由度，可以优化。本发明还提供一种制造根据本发明的SF-MOS器件（10,30）的方法。

6. 发明申请

US20100022056A1 METHOD OF MANUFACTURING A BIPOLAR TRANSISTOR 有权
标题翻译：制造双极晶体管的方法
公开(公告)号：US20100022056A1
公开(公告)日：2010-01-28
申请号：US12439363
申请日：2007-08-29
申请人： Johannes J. T. M. Donkers , Sebastien Nuttinck , Guillaume L. R. Boccardi , Francois Neuilly
发明人： Johannes J. T. M. Donkers , Sebastien Nuttinck , Guillaume L. R. Boccardi , Francois Neuilly
IPC分类号： H01L21/331
CPC分类号： H01L29/7378 , H01L29/407 , H01L29/66242
摘要： The invention provides for an alternative and less complex method of manufacturing a bipolar transistor comprising a field plate (17) in a trench (7) adjacent to a collector region (21), which field plate (17) employs a reduced surface field (Resurf) effect. The Resurf effect reshapes the electric field distribution in the collector region (21) such that for the same collector-base breakdown voltage the doping concentration of the collector region (21) can effectively be increased resulting in a reduced collector resistance and hence an increased bipolar transistor speed. The method comprises a step of forming a base window (6) in a first base layer (4) thereby exposing a top surface of the collector region (21) and a part of an isolation region (3). The trench (7) is formed by removing the exposed part of the isolation region (3), after which isolation layers (9,10) are formed on the surface of the trench (7). A second base layer (13) is formed on the isolation layer (10), thereby forming the field plate (17), on the top surface of the collector region (21), thereby forming a base region (31), and on a sidewall of the first base layer (4), thereby forming an electrical connection between the first base layer (4), the base region (31) and the field plate (17). An emitter region (41) is formed on a top part of the base region (31), thereby forming the Resurf bipolar transistor.
摘要翻译：本发明提供了制造双极晶体管的替代和较不复杂的方法，其包括在与集电极区域（21）相邻的沟槽（7）中的场板（17），该场板（17）采用减小的表面场（Resurf ）效果。 Resurf效应重塑了集电极区域（21）中的电场分布，使得对于相同的集电极 - 基极击穿电压，可以有效地增加集电极区域（21）的掺杂浓度，从而降低集电极电阻，从而增加双极性晶体管速度。该方法包括在第一基层（4）中形成基窗（6）从而暴露集电区（21）的顶表面和隔离区（3）的一部分的步骤。通过去除隔离区域（3）的露出部分形成沟槽（7），之后隔离层（9,10）形成在沟槽（7）的表面上。在隔离层（10）上形成第二基层（13），从而在集电区域（21）的顶面上形成场板（17），从而形成基极区域（31）从而在第一基底层（4），基底区域（31）和场板（17）之间形成电连接。在基极区域（31）的顶部形成发射极区域（41），从而形成Resurf双极型晶体管。

7. 发明申请

US20090159938A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINED WITH SUCH A METHOD 有权
标题翻译：制造半导体器件的方法和采用这种方法获得的半导体器件
公开(公告)号：US20090159938A1
公开(公告)日：2009-06-25
申请号：US12160210
申请日：2007-01-04
申请人： Sebastien Nuttinck , Gilberto Curatola , Erwin Hijzen , Philippe Meunier-Beillard
发明人： Sebastien Nuttinck , Gilberto Curatola , Erwin Hijzen , Philippe Meunier-Beillard
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/0653 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L29/66545 , H01L29/66628 , H01L29/66636 , H01L29/7834
摘要： The invention relates to a method of manufacturing a semiconductor device (10) comprising a field effect transistor, in which method a semiconductor body of silicon (12) with a substrate (11) is provided at a surface thereof with a source region (1) and a drain region (2) of a first conductivity type which are situated above a buried isolation region (3,4) and with a channel region (5), between the source and drain regions (1,2), of a second conductivity type, opposite to the first conductivity type, and with a gate region (6) separated from the surface of the semiconductor body (12) by a gate dielectric (7) and situated above the channel region (5), and wherein a mesa (M) is formed in the semiconductor body (12) in which the channel region (5) is formed and wherein the source and drain regions (1,2) are formed on both sides of the mesa (M) in a semiconductor region (8) that is formed using epitaxial growth, the source and drain regions (1,2) thereby contacting the channel region (5). According to the invention the semiconductor region (8) is formed contacting the mesa (M) over substantially the whole thickness of the semiconductor region (8) and is formed below the level of the gate dielectric (7). This method is more versatile and the device (10) obtained thus has an improved high-frequency behavior.
摘要翻译：本发明涉及一种制造半导体器件（10）的方法，该半导体器件（10）包括场效应晶体管，其中在其表面上设置有源极区（1）的具有衬底（11）的硅（12）的半导体本体，和位于源极和漏极区域（1,2）之间的第一导电类型的漏极区域（2），其位于掩埋隔离区域（3,4）和沟道区域（5）之上，具有第二导电性类型，与第一导电类型相反，并且具有通过栅极电介质（7）与半导体本体（12）的表面分离并位于沟道区（5）上方的栅极区（6），并且其中台面 M）形成在其中形成沟道区（5）的半导体本体（12）中，并且在半导体区域（8）中在栅极（M）的两侧形成源区和漏区（1,2）），源极和漏极区域（1,2）由此与沟道区域（5）接触。根据本发明，半导体区域（8）形成在半导体区域（8）的基本上整个厚度上与台面（M）接触并形成在栅极电介质（7）的下方。该方法更通用，因此所获得的装置（10）具有改进的高频行为。

8. 发明授权

US08026146B2 Method of manufacturing a bipolar transistor 有权
标题翻译：制造双极晶体管的方法
公开(公告)号：US08026146B2
公开(公告)日：2011-09-27
申请号：US12439363
申请日：2007-08-29
申请人： Johannes J. T. M. Donkers , Sebastien Nuttinck , Guillaume L. R. Boccardi , Francois Neuilly
发明人： Johannes J. T. M. Donkers , Sebastien Nuttinck , Guillaume L. R. Boccardi , Francois Neuilly
IPC分类号： H01L21/8222
CPC分类号： H01L29/7378 , H01L29/407 , H01L29/66242
摘要： The invention provides for an alternative and less complex method of manufacturing a bipolar transistor comprising a field plate (17) in a trench (7) adjacent to a collector region (21), which field plate (17) employs a reduced surface field (Resurf) effect. The Resurf effect reshapes the electric field distribution in the collector region (21) such that for the same collector-base breakdown voltage the doping concentration of the collector region (21) can effectively be increased resulting in a reduced collector resistance and hence an increased bipolar transistor speed. The method comprises a step of forming a base window (6) in a first base layer (4) thereby exposing a top surface of the collector region (21) and a part of an isolation region (3). The trench (7) is formed by removing the exposed part of the isolation region (3), after which isolation layers (9,10) are formed on the surface of the trench (7). A second base layer (13) is formed on the isolation layer (10), thereby forming the field plate (17), on the top surface of the collector region (21), thereby forming a base region (31), and on a sidewall of the first base layer (4), thereby forming an electrical connection between the first base layer (4), the base region (31) and the field plate (17). An emitter region (41) is formed on a top part of the base region (31), thereby forming the Resurf bipolar transistor.
摘要翻译：本发明提供了制造双极晶体管的替代和较不复杂的方法，其包括在与集电极区域（21）相邻的沟槽（7）中的场板（17），该场板（17）采用减小的表面场（Resurf ）效果。 Resurf效应重塑了集电极区域（21）中的电场分布，使得对于相同的集电极 - 基极击穿电压，可以有效地增加集电极区域（21）的掺杂浓度，从而降低集电极电阻，从而增加双极性晶体管速度。该方法包括在第一基层（4）中形成基窗（6）从而暴露集电区（21）的顶表面和隔离区（3）的一部分的步骤。通过去除隔离区域（3）的露出部分形成沟槽（7），之后隔离层（9,10）形成在沟槽（7）的表面上。在隔离层（10）上形成第二基层（13），从而在集电区域（21）的顶面上形成场板（17），从而形成基极区域（31）从而在第一基底层（4），基底区域（31）和场板（17）之间形成电连接。在基极区域（31）的顶部形成发射极区域（41），从而形成Resurf双极型晶体管。

9. 发明授权

US07939416B2 Method of making bipolar transistor 有权
标题翻译：制造双极晶体管的方法
公开(公告)号：US07939416B2
公开(公告)日：2011-05-10
申请号：US12935924
申请日：2009-03-30
申请人： Sebastien Nuttinck , Erwin Hijzen , Johannes J. T. M. Donkers , Guillaume L. R. Boccardi
发明人： Sebastien Nuttinck , Erwin Hijzen , Johannes J. T. M. Donkers , Guillaume L. R. Boccardi
IPC分类号： H01L21/8222
CPC分类号： H01L29/66242 , H01L21/8249 , H01L29/0634 , H01L29/0692 , H01L29/66287 , H01L29/66795 , H01L29/732 , H01L29/7371
摘要： A method of manufacturing a bipolar transistor is compatible with FinFET processing. A collector region (18) is formed and patterned, base contact regions (26) formed on either side, and a gap formed between the base contact region. A base (28), spacers (30) and an emitter (32) are formed in the gap.
摘要翻译：制造双极晶体管的方法与FinFET处理兼容。形成集电极区域（18）并构图，形成在两侧的基极接触区域（26）和形成在基极接触区域之间的间隙。在间隙中形成基座（28），间隔件（30）和发射极（32）。

10. 发明授权

US07867864B2 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method 有权
标题翻译：利用这种方法制造半导体器件和半导体器件的制造方法
公开(公告)号：US07867864B2
公开(公告)日：2011-01-11
申请号：US12160210
申请日：2007-01-04
申请人： Sebastien Nuttinck , Giberto Curatola , Erwin Hijzen , Philippe Meunier-Beillard
发明人： Sebastien Nuttinck , Giberto Curatola , Erwin Hijzen , Philippe Meunier-Beillard
IPC分类号： H01L21/336
CPC分类号： H01L29/0653 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L29/66545 , H01L29/66628 , H01L29/66636 , H01L29/7834
摘要： The invention relates to a method of manufacturing a semiconductor device comprising a field effect transistor, in which method a semiconductor body of silicon with a substrate is provided at a surface thereof with a source region and a drain region of a first conductivity type which are situated above a buried isolation region and with a channel region, between the source and drain regions, of a second conductivity type, opposite to the first conductivity type, and with a gate region separated from the surface of the semiconductor body by a gate dielectric and situated above the channel region, wherein a mesa is formed in the semiconductor body in which the channel region is formed and wherein the source and drain regions are formed on both sides of the mesa in a semiconductor region that is formed using epitaxial growth, the source and drain regions thereby contacting the channel region.
摘要翻译：本发明涉及一种制造半导体器件的方法，该半导体器件包括场效应晶体管，其中在其表面上提供具有衬底的硅半导体本体，其具有位于第一导电类型的源区和漏区位于源极和漏极区之间的与第一导电类型相反的第二导电类型的沟道区，以及通过栅极电介质与半导体本体的表面分离的栅极区，位于在沟道区域的上方，其中在形成沟道区的半导体本体中形成台面，并且其中源极和漏极区域形成在使用外延生长形成的半导体区域中的台面的两侧，源极和漏极区域漏区，从而接触沟道区。

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