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1. 发明授权

US07856706B2 Methods of manufacturing printed circuit boards with stacked micro vias 有权
标题翻译：制造具有堆叠微通孔的印刷电路板的方法
公开(公告)号：US07856706B2
公开(公告)日：2010-12-28
申请号：US12381925
申请日：2009-03-17
申请人： Raj Kumar , Monte Dreyer , Michael J. Taylor
发明人： Raj Kumar , Monte Dreyer , Michael J. Taylor
IPC分类号： H05K3/36
CPC分类号： H05K3/4623 , H05K3/205 , H05K3/386 , H05K3/4069 , H05K3/423 , H05K3/4614 , H05K3/4617 , H05K3/462 , H05K2201/0355 , H05K2201/0394 , H05K2201/09309 , H05K2201/096 , H05K2203/0191 , H05K2203/0271 , H05K2203/0502 , H05K2203/061 , H05K2203/0733 , H05K2203/107 , H05K2203/1461 , H05K2203/1536 , H05K2203/304 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： A method of manufacturing at least a portion of a printed circuit board. The method includes: applying a lamination adhesive on a first plural-layer substrate that includes a plurality of circuit layers with at least one first metal pad on a first side of the first plural-layer substrate; applying a protective film on the lamination adhesive; forming at least one via into the lamination adhesive to expose the at least one metal pad on the first side of the first plural-layer substrate; filling at least one conductive paste into the at least one via formed in the lamination adhesive; removing the protective film to expose the lamination adhesive on the first plural-layer substrate; and attaching the first plural-layer substrate with a second plural-layer substrate that includes a plurality of circuit layers with at least one second metal pad on a second side of the second plural-layer substrate.
摘要翻译：一种制造印刷电路板的至少一部分的方法。该方法包括：在第一多层基板上施加层压粘合剂，该第一多层基板包括多个电路层，在第一多层基板的第一侧具有至少一个第一金属焊盘; 在层压粘合剂上涂上保护膜; 将至少一个通孔形成到所述层压粘合剂中以暴露所述第一多层基板的第一侧上的所述至少一个金属焊盘; 将至少一个导电浆料填充到在层压粘合剂中形成的至少一个通孔中; 去除所述保护膜以将所述层叠粘合剂暴露在所述第一多层基板上; 以及在所述第二多层基板的第二面上，将具有包含多个电路层的第二多层基板与至少一个第二金属焊盘连接的第一多层基板。

2. 发明授权

US08950063B2 Methods of manufacturing printed circuit boards with stacked micro vias 有权
标题翻译：制造具有堆叠微通孔的印刷电路板的方法
公开(公告)号：US08950063B2
公开(公告)日：2015-02-10
申请号：US12938265
申请日：2010-11-02
申请人： Raj Kumar , Monte Dreyer , Michael J. Taylor
发明人： Raj Kumar , Monte Dreyer , Michael J. Taylor
IPC分类号： H05K3/36 , H05K3/46 , H05K3/40 , H05K3/20 , H05K3/38 , H05K3/42
CPC分类号： H05K3/4623 , H05K3/205 , H05K3/386 , H05K3/4069 , H05K3/423 , H05K3/4614 , H05K3/4617 , H05K3/462 , H05K2201/0355 , H05K2201/0394 , H05K2201/09309 , H05K2201/096 , H05K2203/0191 , H05K2203/0271 , H05K2203/0502 , H05K2203/061 , H05K2203/0733 , H05K2203/107 , H05K2203/1461 , H05K2203/1536 , H05K2203/304 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： A method of manufacturing at least a portion of a printed circuit board. The method includes: applying a lamination adhesive on a first plural-layer substrate that includes a plurality of circuit layers with at least one first metal pad on a first side of the first plural-layer substrate; applying a protective film on the lamination adhesive; forming at least one via into the lamination adhesive to expose the at least one metal pad on the first side of the first plural-layer substrate; filling at least one conductive paste into the at least one via formed in the lamination adhesive; removing the protective film to expose the lamination adhesive on the first plural-layer substrate; and attaching the first plural-layer substrate with a second plural-layer substrate that includes a plurality of circuit layers with at least one second metal pad on a second side of the second plural-layer substrate.
摘要翻译：一种制造印刷电路板的至少一部分的方法。该方法包括：在第一多层基板上施加层压粘合剂，该第一多层基板包括多个电路层，在第一多层基板的第一侧具有至少一个第一金属焊盘; 在层压粘合剂上涂上保护膜; 将至少一个通孔形成到所述层压粘合剂中以暴露所述第一多层基板的第一侧上的所述至少一个金属焊盘; 将至少一个导电浆料填充到在层压粘合剂中形成的至少一个通孔中; 去除所述保护膜以将所述层叠粘合剂暴露在所述第一多层基板上; 以及在所述第二多层基板的第二面上，将具有包含多个电路层的第二多层基板与至少一个第二金属焊盘连接的第一多层基板。

3. 发明申请

US20100038125A1 ADDITIONAL FUNCTIONALITY SINGLE LAMINATION STACKED VIA WITH PLATED THROUGH HOLES FOR MULTILAYER PRINTED CIRCUIT BOARDS 有权
标题翻译：附加功能性单层叠层通过多层印刷电路板通过镀层堆叠
公开(公告)号：US20100038125A1
公开(公告)日：2010-02-18
申请号：US12539172
申请日：2009-08-11
申请人： Raj Kumar , Monte Dreyer , Michael J. Taylor , Ruben Zepeda
发明人： Raj Kumar , Monte Dreyer , Michael J. Taylor , Ruben Zepeda
IPC分类号： H05K1/11 , H05K3/46
CPC分类号： H05K3/4614 , H05K3/386 , H05K3/4069 , H05K3/427 , H05K3/429 , H05K3/462 , H05K3/4623 , H05K2201/0195 , H05K2201/0352 , H05K2201/09454 , H05K2201/09563 , H05K2201/096 , H05K2201/09736 , H05K2201/09845 , H05K2203/0191 , H05K2203/0554 , H05K2203/061 , H05K2203/1152 , Y10T29/49128 , Y10T29/49156 , Y10T29/49165
摘要： Methods of manufacturing at least a portion of a printed circuit board. The circuit board is formed to include a plurality of sub-assemblies, each of the sub-assemblies including a plurality of circuit layers and having at least one countersink and at least one hole, the countersink having a first diameter and a first depth from a first side of at least one of the sub-assemblies and into the at least one sub-assembly, the hole having a second diameter smaller than the first diameter and a second depth longer than the first depth from the first side of the at least one sub-assembly and into the at least one sub-assembly at the countersink; a metal metalized within the hole and the countersink; a lamination adhesive interposed between one and a corresponding one of the sub-assemblies and having at least one via formed therethrough; and a counter paste filled within the via.
摘要翻译：制造印刷电路板的至少一部分的方法。电路板形成为包括多个子组件，每个子组件包括多个电路层并且具有至少一个埋头孔和至少一个孔，该埋头孔具有第一直径和从第一深度至少一个子组件的第一侧并且进入至少一个子组件，该孔具有小于第一直径的第二直径和比从至少一个子组件的第一侧的第一深度更长的第二深度子组件并进入至少一个子组件在锪孔处; 孔内金属化和埋头孔; 插入在一个和相应的一个子组件之间并且具有通过其形成的至少一个通孔的层压粘合剂; 以及填充在通孔内的计数器糊状物。

4. 发明申请

US20110041330A1 METHODS OF MANUFACTURING PRINTED CIRCUIT BOARDS WITH STACKED MICRO VIAS 有权
标题翻译：用微型VIAS制造印刷电路板的方法
公开(公告)号：US20110041330A1
公开(公告)日：2011-02-24
申请号：US12938265
申请日：2010-11-02
申请人： Raj Kumar , Monte Dreyer , Michael J. Taylor
发明人： Raj Kumar , Monte Dreyer , Michael J. Taylor
IPC分类号： H05K3/36
CPC分类号： H05K3/4623 , H05K3/205 , H05K3/386 , H05K3/4069 , H05K3/423 , H05K3/4614 , H05K3/4617 , H05K3/462 , H05K2201/0355 , H05K2201/0394 , H05K2201/09309 , H05K2201/096 , H05K2203/0191 , H05K2203/0271 , H05K2203/0502 , H05K2203/061 , H05K2203/0733 , H05K2203/107 , H05K2203/1461 , H05K2203/1536 , H05K2203/304 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： A method of manufacturing at least a portion of a printed circuit board. The method includes: applying a lamination adhesive on a first plural-layer substrate that includes a plurality of circuit layers with at least one first metal pad on a first side of the first plural-layer substrate; applying a protective film on the lamination adhesive; forming at least one via into the lamination adhesive to expose the at least one metal pad on the first side of the first plural-layer substrate; filling at least one conductive paste into the at least one via formed in the lamination adhesive; removing the protective film to expose the lamination adhesive on the first plural-layer substrate; and attaching the first plural-layer substrate with a second plural-layer substrate that includes a plurality of circuit layers with at least one second metal pad on a second side of the second plural-layer substrate.
摘要翻译：一种制造印刷电路板的至少一部分的方法。该方法包括：在第一多层基板上施加层压粘合剂，该第一多层基板包括多个电路层，在第一多层基板的第一侧具有至少一个第一金属焊盘; 在层压粘合剂上涂上保护膜; 将至少一个通孔形成到所述层压粘合剂中以暴露所述第一多层基板的第一侧上的所述至少一个金属焊盘; 将至少一个导电浆料填充到在层压粘合剂中形成的至少一个通孔中; 去除所述保护膜以将所述层叠粘合剂暴露在所述第一多层基板上; 以及在所述第二多层基板的第二面上，将具有包含多个电路层的第二多层基板与至少一个第二金属焊盘连接的第一多层基板。

5. 发明授权

US07523545B2 Methods of manufacturing printed circuit boards with stacked micro vias 有权
公开(公告)号：US07523545B2
公开(公告)日：2009-04-28
申请号：US11706473
申请日：2007-02-14
申请人： Raj Kumar , Monte Dreyer , Michael J. Taylor
发明人： Raj Kumar , Monte Dreyer , Michael J. Taylor
IPC分类号： H05K3/36
CPC分类号： H05K3/4623 , H05K3/205 , H05K3/386 , H05K3/4069 , H05K3/423 , H05K3/4614 , H05K3/4617 , H05K3/462 , H05K2201/0355 , H05K2201/0394 , H05K2201/09309 , H05K2201/096 , H05K2203/0191 , H05K2203/0271 , H05K2203/0502 , H05K2203/061 , H05K2203/0733 , H05K2203/107 , H05K2203/1461 , H05K2203/1536 , H05K2203/304 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： Methods of manufacturing printed circuit boards having circuit layers laminated with stacked (or staggered) micro via(s). Aspects of embodiments of the present invention are directed to a method of manufacturing a printed circuit board with Z-axis interconnect(s) or micro via(s) that can eliminate a need for plating micro vias and/or eliminate a need for planarizing plated bumps of a surface, that can be fabricated with one or two lamination cycles, and/or that can have carrier-to-carrier (or substrate-to-substrate) attachments with conductive vias, each filled with a conductive material (e.g., with a conductive paste) in the Z-axis. In one embodiment, a printed circuit board having a plurality of circuit layers with at least one z-axis interconnect can be fabricated using a single lamination cycle.

6. 发明申请

US20070246254A1 Printed circuit boards with stacked micro vias 有权
标题翻译：具有堆叠微通孔的印刷电路板
公开(公告)号：US20070246254A1
公开(公告)日：2007-10-25
申请号：US11706473
申请日：2007-02-14
申请人： Raj Kumar , Monte Dreyer , Michael J. Taylor
发明人： Raj Kumar , Monte Dreyer , Michael J. Taylor
IPC分类号： H05K1/11
CPC分类号： H05K3/4623 , H05K3/205 , H05K3/386 , H05K3/4069 , H05K3/423 , H05K3/4614 , H05K3/4617 , H05K3/462 , H05K2201/0355 , H05K2201/0394 , H05K2201/09309 , H05K2201/096 , H05K2203/0191 , H05K2203/0271 , H05K2203/0502 , H05K2203/061 , H05K2203/0733 , H05K2203/107 , H05K2203/1461 , H05K2203/1536 , H05K2203/304 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： Printed circuit boards having circuit layers laminated with stacked (or staggered) micro via(s) and methods of manufacturing the same. Aspects of embodiments of the present invention are directed to a printed circuit board with Z-axis interconnect(s) or micro via(s) that can eliminate a need for plating micro vias and/or eliminate a need for planarizing plated bumps of a surface, that can be fabricated with one or two lamination cycles, and/or that can have carrier-to-carrier (or substrate-to-substrate) attachments with conductive vias, each filled with a conductive material (e.g., with a conductive paste) in the Z-axis. In one embodiment, a printed circuit board having a plurality of circuit layers with at least one z-axis interconnect can be fabricated using a single lamination cycle.
摘要翻译：具有层叠有（或交错）微通道的电路层的印刷电路板及其制造方法。本发明的实施例的方面涉及具有Z轴互连或微通道的印刷电路板，其可以消除对电镀微通孔的需要和/或消除对平面化电镀凸块的需要，可以用一个或两个层压循环制造，和/或可以具有导电通孔的载流子到载体（或基底对基底）附件，每个填充有导电材料（例如，使用导电浆料）在Z轴上。在一个实施例中，可以使用单个层压循环来制造具有具有至少一个z轴互连的多个电路层的印刷电路板。

7. 发明授权

US08453322B2 Manufacturing methods of multilayer printed circuit board having stacked via 有权
标题翻译：具有堆叠通孔的多层印刷电路板的制造方法
公开(公告)号：US08453322B2
公开(公告)日：2013-06-04
申请号：US12539172
申请日：2009-08-11
申请人： Raj Kumar , Monte Dreyer , Michael J. Taylor , Ruben Zepeda
发明人： Raj Kumar , Monte Dreyer , Michael J. Taylor , Ruben Zepeda
IPC分类号： H01K3/10
CPC分类号： H05K3/4614 , H05K3/386 , H05K3/4069 , H05K3/427 , H05K3/429 , H05K3/462 , H05K3/4623 , H05K2201/0195 , H05K2201/0352 , H05K2201/09454 , H05K2201/09563 , H05K2201/096 , H05K2201/09736 , H05K2201/09845 , H05K2203/0191 , H05K2203/0554 , H05K2203/061 , H05K2203/1152 , Y10T29/49128 , Y10T29/49156 , Y10T29/49165
摘要： Methods of manufacturing at least a portion of a printed circuit board. The circuit board is formed to include a plurality of sub-assemblies, each of the sub-assemblies including a plurality of circuit layers and having at least one countersink and at least one hole, the countersink having a first diameter and a first depth from a first side of at least one of the sub-assemblies and into the at least one sub-assembly, the hole having a second diameter smaller than the first diameter and a second depth longer than the first depth from the first side of the at least one sub-assembly and into the at least one sub-assembly at the countersink; a metal metalized within the hole and the countersink; a lamination adhesive interposed between one and a corresponding one of the sub-assemblies and having at least one via formed therethrough; and a counter paste filled within the via.
摘要翻译：制造印刷电路板的至少一部分的方法。电路板形成为包括多个子组件，每个子组件包括多个电路层并且具有至少一个埋头孔和至少一个孔，该埋头孔具有第一直径和从第一深度至少一个子组件的第一侧并且进入至少一个子组件，该孔具有小于第一直径的第二直径和比该至少一个子组件的第一侧的第一深度长的第二深度子组件并进入至少一个子组件在锪孔处; 孔内金属化和埋头孔; 插入在一个和相应的一个子组件之间并且具有通过其形成的至少一个通孔的层压粘合剂; 以及填充在通孔内的计数器糊状物。

8. 发明授权

US08567053B2 Methods of manufacturing printed circuit boards 有权
标题翻译：制造印刷电路板的方法
公开(公告)号：US08567053B2
公开(公告)日：2013-10-29
申请号：US13153254
申请日：2011-06-03
申请人： Rajesh Kumar , Monte P. Dreyer , Michael J. Taylor
发明人： Rajesh Kumar , Monte P. Dreyer , Michael J. Taylor
IPC分类号： H01K3/10
CPC分类号： H05K3/4623 , H05K3/4069 , H05K3/4614 , H05K2201/0195 , H05K2201/096 , H05K2203/061 , Y10T29/49124 , Y10T29/49126 , Y10T29/49146 , Y10T29/49165 , Y10T29/532
摘要： Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies. An embodiment of the invention provides a method of manufacturing a printed circuit including attaching a plurality of metal layer carriers to form a first subassembly including at least one copper foil pad on a first surface, applying an encapsulation material onto the first surface of the first subassembly, curing the encapsulation material and the first subassembly; applying a lamination adhesive to a surface of the cured encapsulation material, forming at least one via in the lamination adhesive and the cured encapsulation material to expose the at least one copper foil pad, attaching a plurality of metal layer carriers to form a second subassembly, and attaching the first subassembly and the second subassembly.
摘要翻译：使用盲孔和内部微通孔来制造印刷电路板来耦合子组件的系统和方法。本发明的一个实施例提供一种制造印刷电路的方法，包括附接多个金属层载体以形成第一子组件，该第一子组件包括在第一表面上的至少一个铜箔焊盘，将封装材料施加到第一子组件的第一表面上固化封装材料和第一子组件; 在所述固化的包封材料的表面上施加层压粘合剂，在所述层压粘合剂和所述固化的封装材料中形成至少一个通孔，以暴露所述至少一个铜箔垫，附接多个金属层载体以形成第二子组件，以及附接第一子组件和第二子组件。

9. 发明申请

US20130006900A1 Event Prediction Using Hierarchical Event Features 有权
标题翻译：使用分层事件特征的事件预测
公开(公告)号：US20130006900A1
公开(公告)日：2013-01-03
申请号：US13608714
申请日：2012-09-10
申请人： Michael J. Taylor , Vishwa Vinay , Yauhen Shnitko
发明人： Michael J. Taylor , Vishwa Vinay , Yauhen Shnitko
IPC分类号： G06F15/18
CPC分类号： G06F17/30958 , G06F17/30867
摘要： Event prediction using hierarchical event features is described. In an embodiment a search engine monitors search results presented to users and whether users click on those search results. For example, features describing the search result events are universal resource locator prefix levels which are inherently hierarchically related. In an embodiment a graphical data structure is created and stored and used to represent the hierarchical relationships between features. An online training process is used in examples which enables knowledge to be propagated through the graphical data structure according to the hierarchical relations between features. In an example, the graphical data structure is used to predict whether a user will click on a search result and those predictions are used by the search engine to rank search results for future searches. In another example the events are advertisement impressions and the predictions are used by an online advertisement system.
摘要翻译：描述使用分层事件特征的事件预测。在一个实施例中，搜索引擎监视呈现给用户的搜索结果以及用户是否点击这些搜索结果。例如，描述搜索结果事件的特征是通常的资源定位符前缀级别，其本质上是分层相关的。在一个实施例中，创建和存储图形数据结构并用于表示特征之间的分层关系。在实例中使用在线训练过程，使知识能够通过图形数据结构根据特征之间的层次关系进行传播。在一个示例中，图形数据结构用于预测用户是否将点击搜索结果，并且搜索引擎使用这些预测来对未来搜索的搜索结果进行排序。在另一个例子中，事件是广告印象，并且预测被在线广告系统使用。

10. 发明授权

US08252589B2 Method for isolating cellular products by cryopreservation 有权
标题翻译：通过冷冻保存分离细胞产物的方法
公开(公告)号：US08252589B2
公开(公告)日：2012-08-28
申请号：US12654147
申请日：2009-12-11
申请人： Michael J. Taylor , David E. Pegg
发明人： Michael J. Taylor , David E. Pegg
IPC分类号： C12N5/02
CPC分类号： C12N5/0677 , A01N1/0221
摘要： Methods of isolating cellular products, such as pancreatic islets, may be used in diabetes research and therapeutic transplantation. The methods may involve providing a tissue having desired cells that are less prone to destructive freezing and undesired cells that are more prone to destructive freezing, or pre-treating a tissue to have such characteristics. The methods may involve freezing the tissue, disrupting the tissue, warming the tissue, and separating the desired cells from undesired cellular material to obtain the cellular product. The methods may thereby provide an enzyme-free or reduced-enzyme method of isolating a cellular product that is more consistent, reliable and less toxic than conventional methods. The methods may also yield an optimum quantity of cellular product that retain sufficient functional integrity to be useful as a transplantation resource.
摘要翻译：分离细胞产物（如胰岛）的方法可用于糖尿病研究和治疗性移植。所述方法可以包括提供具有不太易于破坏性冷冻的期望细胞的组织和更易于破坏性冷冻的不想要的细胞或预处理组织以具有这些特征的组织。所述方法可以包括冷冻组织，破坏组织，加热组织，以及将期望的细胞与不期望的细胞材料分离以获得细胞产物。因此，该方法可以提供与常规方法更一致，可靠和毒性更低的细胞产物的无酶或还原酶方法。所述方法还可以产生保持足够的功能完整性作为移植资源有用的最佳量的细胞产物。

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