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1. 发明申请

US20070006048A1 Method and apparatus for predicting memory failure in a memory system 审中-公开
标题翻译：用于预测存储器系统中的存储器故障的方法和装置
公开(公告)号：US20070006048A1
公开(公告)日：2007-01-04
申请号：US11169408
申请日：2005-06-29
申请人： Vincent Zimmer , Gundrala Goud , Rahul Khanna , Mallik Bulusu , Satish Rai , Michael Rothman
发明人： Vincent Zimmer , Gundrala Goud , Rahul Khanna , Mallik Bulusu , Satish Rai , Michael Rothman
IPC分类号： G06F11/00
CPC分类号： G06F11/008
摘要： A method for managing a memory system includes comparing one or more conditions of a memory with historical memory data that predicts a future state of the memory. According to one embodiment, updating the historical memory data includes accumulating operation data on the memory during its operation, generating updated historical memory data with the operation data, and updating the historical memory data with the updated historical memory data. Other embodiments are described and claimed.
摘要翻译：用于管理存储器系统的方法包括将存储器的一个或多个条件与预测存储器的未来状态的历史存储器数据进行比较。根据一个实施例，更新历史存储器数据包括在其操作期间在存储器上累积操作数据，用操作数据生成更新的历史存储器数据，以及用更新的历史存储器数据更新历史存储器数据。描述和要求保护其他实施例。

2. 发明申请

US20060168590A1 Methods and apparatus to provide dual-mode drivers in processor systems 有权
标题翻译：在处理器系统中提供双模驱动的方法和装置
公开(公告)号：US20060168590A1
公开(公告)日：2006-07-27
申请号：US11027520
申请日：2004-12-30
申请人： Rahul Khanna , Mallik Bulusu , Vincent Zimmer , Michael Rothman
发明人： Rahul Khanna , Mallik Bulusu , Vincent Zimmer , Michael Rothman
IPC分类号： G06F9/46
CPC分类号： G06F9/4403
摘要： Methods and apparatus to provide dual-mode drivers in a processor system are disclosed. An example method disclosed herein comprises including operating system (OS) agnostic mode services that are available during an OS agnostic mode to allow a single set of drivers to be used during boot mode and the OS agnostic mode. The example method further comprises including a dual-mode library that is capable of determining the current operating mode of the processor system and binding the drivers to available services accordingly.
摘要翻译：公开了在处理器系统中提供双模驱动器的方法和装置。本文公开的示例性方法包括在OS不可知模式期间可用的操作系统（OS）不可知模式服务，以允许在引导模式和OS不可知模式期间使用单组驱动器。该示例方法还包括包括能够确定处理器系统的当前操作模式并且相应地将驱动程序绑定到可用服务的双模式库。

3. 发明授权

US07366891B2 Methods and apparatus to provide dual-mode drivers in processor systems 有权
标题翻译：在处理器系统中提供双模驱动的方法和装置
公开(公告)号：US07366891B2
公开(公告)日：2008-04-29
申请号：US11027520
申请日：2004-12-30
申请人： Rahul Khanna , Mallik Bulusu , Vincent Zimmer , Michael A. Rothman
发明人： Rahul Khanna , Mallik Bulusu , Vincent Zimmer , Michael A. Rothman
IPC分类号： G06F15/177
CPC分类号： G06F9/4403
摘要： Methods and apparatus to provide dual-mode drivers in a processor system are disclosed. An example method disclosed herein comprises including operating system (OS) agnostic mode services that are available during an OS agnostic mode to allow a single set of drivers to be used during boot mode and the OS agnostic mode. The example method further comprises including a dual-mode library that is capable of determining the current operating mode of the processor system and binding the drivers to available services accordingly.
摘要翻译：公开了在处理器系统中提供双模驱动器的方法和装置。本文公开的示例性方法包括在OS不可知模式期间可用的操作系统（OS）不可知模式服务，以允许在引导模式和OS不可知模式期间使用单组驱动器。该示例方法还包括包括能够确定处理器系统的当前操作模式并且相应地将驱动程序绑定到可用服务的双模式库。

4. 发明申请

US20060129795A1 Interleaved boot block to support multiple processor architectures and method of use 有权
标题翻译：交叉引导块支持多种处理器架构和使用方法
公开(公告)号：US20060129795A1
公开(公告)日：2006-06-15
申请号：US11010167
申请日：2004-12-10
申请人： Mallik Bulusu , Vincent Zimmer , Rahul Khanna
发明人： Mallik Bulusu , Vincent Zimmer , Rahul Khanna
IPC分类号： G06F15/177
CPC分类号： G06F9/4401
摘要： A flash memory has an interleaved boot block compatible with multiple processor architectures. The interleaved boot block may include one boot block compatible with a first CPU architecture and another boot block compatible with a second CPU architecture. These two boot blocks may be combined in an interleaved manner in the flash memory so that during a boot process only one of the two boot blocks executes, although both are stored in the flash memory. By interleaving different boot blocks, a common socket computer system capable of supporting multiple processor architectures may be achieved without fully replacing an incompatible basic input/output system (BIOS). Further, the flash memory may contain an updatable portion in which any BIOS segments incompatible with a processor architecture may be updated via a recovery, or update, process.
摘要翻译：闪存具有与多种处理器架构兼容的交错引导块。交错的引导块可以包括与第一CPU架构兼容的一个引导块和与第二CPU架构兼容的另一启动块。这两个引导块可以以交错方式组合在闪速存储器中，使得在引导过程中，两个引导块中只有一个执行，尽管两者都存储在闪存中。通过交织不同的引导块，可以在不完全替换不兼容的基本输入/输出系统（BIOS）的情况下实现能够支持多处理器体系结构的公共套接字计算机系统。此外，闪存可以包含可更新部分，其中可以经由恢复或更新过程来更新与处理器架构不兼容的任何BIOS段。

5. 发明申请

US20050240669A1 BIOS framework for accommodating multiple service processors on a single server to facilitate distributed/scalable server management 审中-公开
标题翻译：用于在单个服务器上容纳多个服务处理器以便于分布式/可扩展服务器管理的BIOS框架
公开(公告)号：US20050240669A1
公开(公告)日：2005-10-27
申请号：US10811755
申请日：2004-03-29
申请人： Rahul Khanna , Mallik Bulusu , Vincent Zimmer
发明人： Rahul Khanna , Mallik Bulusu , Vincent Zimmer
IPC分类号： G06F9/50 , G06F15/173
CPC分类号： G06F15/177 , G06F9/4405 , G06F9/4413 , G06F9/5055 , G06F11/3447 , G06F11/3495
摘要： BIOS framework for accommodating multiple service processors on a single server to facilitate distributed/scalable server management. During a pre-boot phase for a server, information is collected pertaining to service capabilities supported by each of a plurality of service processors used to service server management requests for a server, wherein the services supported by each service processor are performed via execution of service code associated with that service processor. The service capabilities are aggregated across all of the service processors, and a corresponding unified presentation of service capabilities is provided to a service consumer. End-users are enabled to provide preferences that define a usage order for like services hosted by different service processors within the same system. The BIOS framework can detect the addition or removal of hot-swap cards hosting one or more service processors and associated service code, and update the unified presentation of service capabilities to reflect new added service capabilities or remove previously existing service capabilities.
摘要翻译：用于在单个服务器上容纳多个服务处理器以便于分布式/可扩展服务器管理的BIOS框架。在服务器的预引导阶段期间，收集关于用于服务服务器的服务器管理请求的多个服务处理器中的每一个所支持的服务能力的信息，其中由每个服务处理器支持的服务通过服务执行与该服务处理器相关联的代码。服务能力在所有服务处理器之间进行聚合，并向服务使用者提供相应的服务能力统一呈现。最终用户能够提供定义同一系统内由不同服务处理器托管的类似服务的使用顺序的首选项。 BIOS框架可以检测托管一个或多个服务处理器和相关服务代码的热插拔卡的添加或删除，并更新服务功能的统一呈现以反映新的附加服务功能或删除先前存在的服务功能。

6. 发明授权

US07587750B2 Method and system to support network port authentication from out-of-band firmware 失效
标题翻译：从带外固件支持网络端口认证的方法和系统
公开(公告)号：US07587750B2
公开(公告)日：2009-09-08
申请号：US10607678
申请日：2003-06-26
申请人： Vincent J. Zimmer , Rahul Khanna , Mallik Bulusu
发明人： Vincent J. Zimmer , Rahul Khanna , Mallik Bulusu
IPC分类号： H04L9/32 , G06F15/16
CPC分类号： H04L63/08 , G06F21/575 , G06F2221/2103 , H04L63/10
摘要： Methods and systems for performing network port authentication without requiring any operating system (OS) complicity are disclosed. Under one method, port authentication instructions are loaded into a protected memory space during a pre-boot of a supplicant system. In response to a port authentication request, the supplicant system's processor is switched to a hidden execution mode and executes the port authentication instructions to authenticate a network port hosted by an authenticator system to which the supplicant system is linked. One authentication process employs an authentication server that authenticates the supplicant via one of various authentication schemes, including an access challenge. Port authentication may also be performed via an out-of-band base management controller that operates independently from an operating system running on the supplicant.
摘要翻译：公开了用于执行网络端口认证而不需要任何操作系统（OS）并发的方法和系统。在一种方法下，在请求者系统的预引导期间，端口认证指令被加载到受保护的存储器空间中。响应于端口认证请求，请求者系统的处理器被切换到隐藏的执行模式，并且执行端口认证指令以验证由请求方系统链接到的认证器系统托管的网络端口。一个认证过程采用认证服务器，其通过各种认证方案之一来验证请求者，包括接入质询。端口认证还可以通过独立于在请求方上运行的操作系统操作的带外基本管理控制器来执行。

7. 发明授权

US07305544B2 Interleaved boot block to support multiple processor architectures and method of use 有权
标题翻译：交叉引导块支持多种处理器架构和使用方法
公开(公告)号：US07305544B2
公开(公告)日：2007-12-04
申请号：US11010167
申请日：2004-12-10
申请人： Mallik Bulusu , Vincent J. Zimmer , Rahul Khanna
发明人： Mallik Bulusu , Vincent J. Zimmer , Rahul Khanna
IPC分类号： G06F15/177 , G06F9/24
CPC分类号： G06F9/4401
摘要： A flash memory has an interleaved boot block compatible with multiple processor architectures. The interleaved boot block may include one boot block compatible with a first CPU architecture and another boot block compatible with a second CPU architecture. These two boot blocks may be combined in an interleaved manner in the flash memory so that during a boot process only one of the two boot blocks executes, although both are stored in the flash memory. By interleaving different boot blocks, a common socket computer system capable of supporting multiple processor architectures may be achieved without fully replacing an incompatible basic input/output system (BIOS). Further, the flash memory may contain an updatable portion in which any BIOS segments incompatible with a processor architecture may be updated via a recovery, or update, process.
摘要翻译：闪存具有与多种处理器架构兼容的交错引导块。交错的引导块可以包括与第一CPU架构兼容的一个引导块和与第二CPU架构兼容的另一启动块。这两个引导块可以以交错方式组合在闪速存储器中，使得在引导过程中，两个引导块中只有一个执行，尽管两者都存储在闪速存储器中。通过交织不同的引导块，可以在不完全替换不兼容的基本输入/输出系统（BIOS）的情况下实现能够支持多处理器体系结构的公共套接字计算机系统。此外，闪存可以包含可更新部分，其中可以经由恢复或更新过程来更新与处理器架构不兼容的任何BIOS段。

8. 发明授权

US08977871B2 System and method for power management using a basic input output system 有权
标题翻译：使用基本输入输出系统进行电源管理的系统和方法
公开(公告)号：US08977871B2
公开(公告)日：2015-03-10
申请号：US13107133
申请日：2011-05-13
申请人： Di Tang , Vincent Zimmer , James Edwards , Rahul Khanna , Yufu Li , Abdul Bailey
发明人： Di Tang , Vincent Zimmer , James Edwards , Rahul Khanna , Yufu Li , Abdul Bailey
IPC分类号： G06F1/00 , G06F1/32
CPC分类号： G06F1/3203 , G06F1/3228 , G06F1/3243 , G06F9/4401 , G06F9/4418 , Y02D10/152 , Y02D10/44 , Y02D50/20
摘要： A system comprises a plurality of processor cores. The processor cores may comprise one or more application processor (AP) cores and a boot strap processor (BSP) core. A basic input/output system (BIOS) comprises an I/O device module to call a stall function in response to an I/O operation, a power management module that couples to the I/O device and a timer module that couples to the power management module. The power management module is to adjust a timer period of the timer module based on a stall delay of the stall function. The power management module may hook the stall function and compare the stall delay with a predetermined threshold and set the timer period to the stall delay in response to determining that the stall delay is longer. The power management module may put the BSP in a sleep mode during the timer period to save power.
摘要翻译：一种系统包括多个处理器核。处理器核心可以包括一个或多个应用处理器（AP）核心和引导带处理器（BSP）核心。基本输入/输出系统（BIOS）包括响应于I / O操作来调用失速功能的I / O设备模块，耦合到I / O设备的电源管理模块和耦合到I / O设备的定时器模块电源管理模块电源管理模块是根据失速功能的停止延迟来调整定时器模块的定时器周期。功率管理模块可以挂起失速功能并将失速延迟与预定阈值进行比较，并响应于确定失速延迟更长而将定时器周期设置为失速延迟。电源管理模块可以在定时器周期内将BSP置于睡眠模式，以节省电力。

9. 发明申请

US20120159204A1 SYSTEM AND METHOD FOR POWER MANAGEMENT 有权
标题翻译：电力管理系统与方法
公开(公告)号：US20120159204A1
公开(公告)日：2012-06-21
申请号：US13107133
申请日：2011-05-13
申请人： Di Tang , Vincent Zimmer , James Edwards , Rahul Khanna , Yufu Li , Abdul Bailey
发明人： Di Tang , Vincent Zimmer , James Edwards , Rahul Khanna , Yufu Li , Abdul Bailey
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/3228 , G06F1/3243 , G06F9/4401 , G06F9/4418 , Y02D10/152 , Y02D10/44 , Y02D50/20
摘要： A system comprises a plurality of processor cores. The processor cores may comprise one or more application processor (AP) cores and a boot strap processor (BSP) core. A basic input/output system (BIOS) comprises an I/O device module to call a stall function in response to an I/O operation, a power management module that couples to the I/O device and a timer module that couples to the power management module. The power management module is to adjust a timer period of the timer module based on a stall delay of the stall function. The power management module may hook the stall function and compare the stall delay with a predetermined threshold and set the timer period to the stall delay in response to determining that the stall delay is longer. The power management module may put the BSP in a sleep mode during the timer period to save power.
摘要翻译：一种系统包括多个处理器核。处理器核心可以包括一个或多个应用处理器（AP）核心和引导带处理器（BSP）核心。基本输入/输出系统（BIOS）包括响应于I / O操作来调用失速功能的I / O设备模块，耦合到I / O设备的电源管理模块和耦合到I / 电源管理模块电源管理模块是根据失速功能的停止延迟来调整定时器模块的定时器周期。功率管理模块可以挂起失速功能并将失速延迟与预定阈值进行比较，并响应于确定失速延迟更长而将定时器周期设置为失速延迟。电源管理模块可以在定时器周期内将BSP置于睡眠模式，以节省电力。

10. 发明申请

US20050071677A1 Method to authenticate clients and hosts to provide secure network boot 失效
标题翻译：验证客户端和主机以提供安全网络启动的方法
公开(公告)号：US20050071677A1
公开(公告)日：2005-03-31
申请号：US10675381
申请日：2003-09-30
申请人： Rahul Khanna , Vincent Zimmer
发明人： Rahul Khanna , Vincent Zimmer
IPC分类号： G06F21/00 , H04L9/08 , H04L9/32 , H04L29/06 , H04L29/08 , H04L9/00
CPC分类号： G06F21/575 , H04L9/0838 , H04L9/0863 , H04L9/3226 , H04L9/3236 , H04L9/3271 , H04L63/0428 , H04L63/083 , H04L63/162 , H04L67/34 , H04L2209/127 , H04L2209/76 , H04L2463/062
摘要： A method for authenticating clients and boot server hosts to provide a secure network boot environment. Messages are exchanged between a client and a boot server or authentication server proxy for the boot server during pre-boot operations of the client to authentic the boot server and the client. In one embodiment, authentication is performed by comparing shared secrets stored on each of the client and the boot server or authentication proxy. The shared secret comprises authentication credentials that may be provisioned by an administrator, user, or by the client itself via a trusted platform module. Authentication provisioning schemes include an Extensible Authentication Protocol (EAP) exchange. In one embodiment, authentication is performed during the pre-boot via an authenticated Dynamic Host Configuration Protocol (DHCP) process. The scheme provides a faster and more simplified authentication mechanism, without requiring extensive set-up for IT administrators or significantly changing the login and OS boot user experience.
摘要翻译：一种验证客户端和引导服务器主机以提供安全网络引导环境的方法。在客户机的预引导操作期间，在客户机和引导服务器或引导服务器的认证服务器代理之间交换消息，以认证引导服务器和客户端。在一个实施例中，通过比较存储在每个客户端和引导服务器或认证代理之间的共享秘密来执行认证。共享秘密包括可由管理员，用户或由客户端本身通过可信平台模块来供应的认证凭证。认证提供方案包括可扩展认证协议（EAP）交换。在一个实施例中，通过经认证的动态主机配置协议（DHCP）过程在预引导期间执行认证。该方案提供了一种更快速和更简化的身份验证机制，无需大量设置IT管理员或显着更改登录和操作系统启动用户体验。

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