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1. 发明授权

US07897877B2 Capacitive substrate 失效
标题翻译：电容衬底
公开(公告)号：US07897877B2
公开(公告)日：2011-03-01
申请号：US11438424
申请日：2006-05-23
申请人： Rabindra N. Das , Frank D. Egitto , John M. Lauffer , How T. Lin , Voya R. Markovich
发明人： Rabindra N. Das , Frank D. Egitto , John M. Lauffer , How T. Lin , Voya R. Markovich
IPC分类号： H05K1/16
CPC分类号： H05K1/162 , H01L27/12 , H01L28/40 , H05K1/0306 , H05K3/125 , H05K3/4667 , H05K2201/0187 , H05K2201/09509 , H05K2203/013
摘要： A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.
摘要翻译：电容性基板及其制造方法，其中使用第一和第二玻璃层。第一导体形成在第一玻璃层上，并且电容电介质材料位于导体上方。然后将第二导体定位在电容电介质上，并且第二玻璃层位于第二导体上。形成导电通孔以分别耦合到第一和第二导体，使得当电容基板工作时，导体和电容电介质材料形成电容器。

2. 发明申请

US20070275525A1 Capacitive substrate and method of making same 失效
标题翻译：电容衬底及其制作方法
公开(公告)号：US20070275525A1
公开(公告)日：2007-11-29
申请号：US11438424
申请日：2006-05-23
申请人： Rabindra N. Das , Frank D. Egitto , John M. Lauffer , How T. Lin , Voya R. Markovich
发明人： Rabindra N. Das , Frank D. Egitto , John M. Lauffer , How T. Lin , Voya R. Markovich
IPC分类号： H01L21/8242
CPC分类号： H05K1/162 , H01L27/12 , H01L28/40 , H05K1/0306 , H05K3/125 , H05K3/4667 , H05K2201/0187 , H05K2201/09509 , H05K2203/013
摘要： A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.
摘要翻译：电容性基板及其制造方法，其中使用第一和第二玻璃层。第一导体形成在第一玻璃层上，并且电容电介质材料位于导体上方。然后将第二导体定位在电容电介质上，并且第二玻璃层位于第二导体上。形成导电通孔以分别耦合到第一和第二导体，使得当电容基板工作时，导体和电容电介质材料形成电容器。

3. 发明授权

US07803688B2 Capacitive substrate and method of making same 失效
标题翻译：电容衬底及其制作方法
公开(公告)号：US07803688B2
公开(公告)日：2010-09-28
申请号：US12380616
申请日：2009-03-02
申请人： Rabindra N. Das , Frank D. Egitto , John M. Lauffer , How T. Lin , Voya R. Markovich
发明人： Rabindra N. Das , Frank D. Egitto , John M. Lauffer , How T. Lin , Voya R. Markovich
IPC分类号： H01L21/20
CPC分类号： H05K1/162 , H01L27/12 , H01L28/40 , H05K1/0306 , H05K3/125 , H05K3/4667 , H05K2201/0187 , H05K2201/09509 , H05K2203/013
摘要： A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.
摘要翻译：电容性基板及其制造方法，其中使用第一和第二玻璃层。第一导体形成在第一玻璃层上，并且电容电介质材料位于导体上方。然后将第二导体定位在电容电介质上，并且第二玻璃层位于第二导体上。形成导电通孔以分别耦合到第一和第二导体，使得当电容基板工作时，导体和电容电介质材料形成电容器。

4. 发明申请

US20090206051A1 Capacitive substrate and method of making same 失效
标题翻译：电容衬底及其制作方法
公开(公告)号：US20090206051A1
公开(公告)日：2009-08-20
申请号：US12380616
申请日：2009-03-02
申请人： Rabindra N. Das , Frank D. Egitto , John M. Lauffer , How T. Lin , Voya R. Markovich
发明人： Rabindra N. Das , Frank D. Egitto , John M. Lauffer , How T. Lin , Voya R. Markovich
IPC分类号： H01G13/00 , B05D5/12 , C23C14/34 , C23C14/30 , B05D3/00
CPC分类号： H05K1/162 , H01L27/12 , H01L28/40 , H05K1/0306 , H05K3/125 , H05K3/4667 , H05K2201/0187 , H05K2201/09509 , H05K2203/013
摘要： A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.
摘要翻译：电容性基板及其制造方法，其中使用第一和第二玻璃层。第一导体形成在第一玻璃层上，并且电容电介质材料位于导体上方。然后将第二导体定位在电容电介质上，并且第二玻璃层位于第二导体上。形成导电通孔以分别耦合到第一和第二导体，使得当电容基板工作时，导体和电容电介质材料形成电容器。

5. 发明授权

US08501575B2 Method of forming multilayer capacitors in a printed circuit substrate 有权
标题翻译：在印刷电路基板中形成多层电容器的方法
公开(公告)号：US08501575B2
公开(公告)日：2013-08-06
申请号：US12909983
申请日：2010-10-22
申请人： Rabindra N. Das , Frank D. Egitto , How T. Lin , John M. Lauffer , Voya R. Markovich
发明人： Rabindra N. Das , Frank D. Egitto , How T. Lin , John M. Lauffer , Voya R. Markovich
IPC分类号： H01G4/00
CPC分类号： H01G4/206 , H01G4/232 , H01G4/33 , H05K1/162 , H05K3/06 , H05K3/125 , H05K3/18 , H05K2201/0187 , H05K2201/0209 , H05K2201/0257 , H05K2201/09309 , Y10T156/10
摘要： Methods of forming embedded, multilayer capacitors in printed circuit boards wherein copper or other electrically conductive channels are formed on a dielectric substrate. The channels may be preformed using etching or deposition techniques. A photoimageable dielectric is an upper surface of the laminate. Exposing and etching the photoimageable dielectric exposes the space between the copper traces. These spaces are then filled with a capacitor material. Finally, copper is either laminated or deposited atop the structure. This upper copper layer is then etched to provide electrical interconnections to the capacitor elements. Traces may be formed to a height to meet a plane defining the upper surface of the dielectric substrate or thin traces may be formed on the remaining dielectric surface and a secondary copper plating process is utilized to raise the height of the traces.
摘要翻译：在印刷电路板中形成嵌入式多层电容器的方法，其中在电介质基板上形成铜或其它导电通道。通道可以使用蚀刻或沉积技术进行。可光成像的电介质是层叠体的上表面。曝光和蚀刻可光成像电介质暴露铜迹线之间的空间。然后用电容器材料填充这些空间。最后，铜层压或沉积在结构的顶部。然后对该上铜层进行蚀刻，以提供与电容器元件的电互连。迹线可以形成为高度以满足限定电介质基板的上表面的平面，或者可以在剩余的电介质表面上形成薄迹线，并且使用二次镀铜工艺来提高迹线的高度。

6. 发明申请

US20120223047A1 METHOD OF FORMING MULTILAYER CAPACITORS IN A PRINTED CIRCUIT SUBSTRATE 有权
标题翻译：在印刷电路基板中形成多层电容器的方法
公开(公告)号：US20120223047A1
公开(公告)日：2012-09-06
申请号：US12909983
申请日：2010-10-22
申请人： Rabindra N. Das , Frank D. Egitto , How T. Lin , John M. Lauffer , Voya R. Markovich
发明人： Rabindra N. Das , Frank D. Egitto , How T. Lin , John M. Lauffer , Voya R. Markovich
IPC分类号： H01G4/002 , G03F7/30 , G03F7/20
CPC分类号： H01G4/206 , H01G4/232 , H01G4/33 , H05K1/162 , H05K3/06 , H05K3/125 , H05K3/18 , H05K2201/0187 , H05K2201/0209 , H05K2201/0257 , H05K2201/09309 , Y10T156/10
摘要： Methods of forming embedded, multilayer capacitors in printed circuit boards wherein copper or other electrically conductive channels are formed on a dielectric substrate. The channels may be preformed using etching or deposition techniques. A photoimageable dielectric is an upper surface of the laminate. Exposing and etching the photoimageable dielectric exposes the space between the copper traces. These spaces are then filled with a capacitor material. Finally, copper is either laminated or deposited atop the structure. This upper copper layer is then etched to provide electrical interconnections to the capacitor elements. Traces may be formed to a height to meet a plane defining the upper surface of the dielectric substrate or thin traces may be formed on the remaining dielectric surface and a secondary copper plating process is utilized to raise the height of the traces.
摘要翻译：在印刷电路板中形成嵌入式多层电容器的方法，其中在电介质基板上形成铜或其它导电通道。通道可以使用蚀刻或沉积技术进行。可光成像的电介质是层叠体的上表面。曝光和蚀刻可光成像电介质暴露铜迹线之间的空间。然后用电容器材料填充这些空间。最后，铜层压或沉积在结构的顶部。然后对该上铜层进行蚀刻，以提供与电容器元件的电互连。迹线可以形成为高度以满足限定电介质基板的上表面的平面，或者可以在剩余的电介质表面上形成薄迹线，并且使用二次镀铜工艺来提高迹线的高度。

7. 发明申请

US20080248596A1 Method of making a circuitized substrate having at least one capacitor therein 审中-公开
标题翻译：制造其中具有至少一个电容器的电路化基板的方法
公开(公告)号：US20080248596A1
公开(公告)日：2008-10-09
申请号：US11878673
申请日：2007-07-26
申请人： Rabindra N. Das , Frank D. Egitto , How T. Lin , John M. Lauffer , Voya R. Markovich
发明人： Rabindra N. Das , Frank D. Egitto , How T. Lin , John M. Lauffer , Voya R. Markovich
IPC分类号： H01L21/77
CPC分类号： H01G4/206 , H01G4/232 , H01G4/33 , H05K1/162 , H05K3/0032 , H05K3/107 , H05K2201/0209 , H05K2201/0257 , H05K2201/09236 , H05K2201/09309 , H05K2201/09881 , H05K2203/0108 , H05K2203/066
摘要： A method of making a circuitized substrate which includes at least one and possibly several capacitors as part thereof. In one embodiment, the substrate is produced by forming a layer of capacitive dielectric material on a dielectric layer and thereafter forming channels with the capacitive material, e.g., using a laser. The channels are then filled with conductive material, e.g., copper, using selected deposition techniques, e.g., sputtering, electro-less plating and electroplating. A second dielectric layer is then formed atop the capacitor and a capacitor “core” results. This “core” may then be combined with other dielectric and conductive layers to form a larger, multilayered PCB or chip carrier. In an alternative approach, the capacitive dielectric material may be photo-imageable, with the channels being formed using conventional exposure and development processing known in the art. In still another embodiment, at least two spaced-apart conductors may be formed within a metal layer deposited on a dielectric layer, these conductors defining a channel there-between. The capacitive dielectric material may then be deposited (e.g., using lamination) within the channels.
摘要翻译：一种制造电路化衬底的方法，其包括至少一个可能的几个电容器作为其一部分。在一个实施例中，通过在电介质层上形成电容电介质材料层，然后用电容材料形成通道，例如使用激光来制造衬底。然后使用所选择的沉积技术，例如溅射，无电镀和电镀，用导电材料（例如铜）填充通道。然后在电容器顶部形成第二电介质层，并产生电容器“芯”。然后，该“芯”可以与其它电介质层和导电层组合以形成较大的多层PCB或芯片载体。在替代方法中，电容介电材料可以是可光成像的，其中通道是使用本领域已知的常规曝光和显影处理形成的。在另一个实施例中，可以在沉积在电介质层上的金属层内形成至少两个间隔开的导体，这些导体在其间限定通道。然后可以在通道内沉积（例如，使用层压）的电容电介质材料。

8. 发明申请

US20120015532A1 HIGH DENSITY DECAL AND METHOD FOR ATTACHING SAME 有权
标题翻译：高密度分层及其连接方法
公开(公告)号：US20120015532A1
公开(公告)日：2012-01-19
申请号：US12837640
申请日：2010-07-16
申请人： Voya R. Markovich , Ronald V. Smith , How T. Lin , Frank D. Egitto , Rabindra N. Das , William E. Wilson , Rajinder S. Rai
发明人： Voya R. Markovich , Ronald V. Smith , How T. Lin , Frank D. Egitto , Rabindra N. Das , William E. Wilson , Rajinder S. Rai
IPC分类号： H01R12/00 , H01L21/66
CPC分类号： H05K3/3436 , H05K1/111 , H05K2201/10378 , Y02P70/613 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49147 , Y10T29/4919
摘要： A flexible, high density decal and the use thereof methods of forming detachable electrical interconnections between a flexible chip carrier and a printed wiring board. The flexible decal has fine-pitch pads on a first surface and pads of a pitch wider than the fine pitch on a second surface, the fine-pitch pads on the first surface designed to electrically connect to a semiconductor device, and the wider-pitch pads on the second surface designed to electrically connect to a printed wiring board or the like. The pads on the first surface are conductively wired to the pads on the second surface through one or more insulating levels in the flexible decal.
摘要翻译：柔性，高密度贴花及其在柔性芯片载体和印刷线路板之间形成可拆卸电互连的方法。柔性贴花在第一表面上具有细间距焊盘，并且在第二表面上具有比微细间距更宽的间距的焊盘，设计成电连接到半导体器件的第一表面上的细间距焊盘和较宽间距第二表面上的焊盘被设计成电连接到印刷线路板等。第一表面上的焊盘通过柔性贴花中的一个或多个绝缘水平导电地连接到第二表面上的焊盘。

9. 发明授权

US08240031B2 Method of joining a semiconductor device/chip to a printed wiring board 有权
标题翻译：将半导体器件/芯片接合到印刷线路板的方法
公开(公告)号：US08240031B2
公开(公告)日：2012-08-14
申请号：US12837640
申请日：2010-07-16
申请人： Voya R. Markovich , Ronald V. Smith , How T. Lin , Frank D. Egitto , Rabindra N. Das , William E. Wilson , Rajinder S. Rai
发明人： Voya R. Markovich , Ronald V. Smith , How T. Lin , Frank D. Egitto , Rabindra N. Das , William E. Wilson , Rajinder S. Rai
IPC分类号： H05K3/30
CPC分类号： H05K3/3436 , H05K1/111 , H05K2201/10378 , Y02P70/613 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49147 , Y10T29/4919
摘要： A flexible, high density decal and the use thereof methods of forming detachable electrical interconnections between a flexible chip carrier and a printed wiring board. The flexible decal has fine-pitch pads on a first surface and pads of a pitch wider than the fine pitch on a second surface, the fine-pitch pads on the first surface designed to electrically connect to a semiconductor device, and the wider-pitch pads on the second surface designed to electrically connect to a printed wiring board or the like. The pads on the first surface are conductively wired to the pads on the second surface through one or more insulating levels in the flexible decal.
摘要翻译：柔性，高密度贴花及其在柔性芯片载体和印刷线路板之间形成可拆卸电互连的方法。柔性贴花在第一表面上具有细间距焊盘，并且在第二表面上具有比微细间距更宽的间距的焊盘，设计成电连接到半导体器件的第一表面上的细间距焊盘和较宽间距第二表面上的焊盘被设计成电连接到印刷线路板等。第一表面上的焊盘通过柔性贴花中的一个或多个绝缘水平导电地连接到第二表面上的焊盘。

10. 发明授权

US08607445B1 Substrate having internal capacitor and method of making same 有权
标题翻译：具有内部电容器的基板及其制造方法
公开(公告)号：US08607445B1
公开(公告)日：2013-12-17
申请号：US13517776
申请日：2012-06-14
申请人： Rabindra N. Das , Frank D. Egitto , John M. Lauffer , How T. Lin
发明人： Rabindra N. Das , Frank D. Egitto , John M. Lauffer , How T. Lin
IPC分类号： H05K3/30
CPC分类号： H01G4/206 , H01G4/232 , H01G4/33 , H05K1/162 , H05K3/0032 , H05K3/107 , H05K2201/0209 , H05K2201/0257 , H05K2201/09236 , H05K2201/09309 , H05K2201/09881 , H05K2203/0108 , H05K2203/066
摘要： A method of making a circuitized substrate which includes at least one and possibly several capacitors as part thereof. In one embodiment, the substrate is produced by forming a layer of capacitive dielectric material on a dielectric layer and thereafter forming channels with the capacitive material, e.g., using a laser. The channels are then filled with conductive material, e.g., copper, using selected deposition techniques, e.g., sputtering, electro-less plating and electroplating. A second dielectric layer is then formed atop the capacitor and a capacitor “core” results. This “core” may then be combined with other dielectric and conductive layers to form a larger, multilayered PCB or chip carrier. In an alternative approach, the capacitive dielectric material may be photo-imageable, with the channels being formed using conventional exposure and development processing known in the art.
摘要翻译：一种制造电路化衬底的方法，其包括至少一个可能的几个电容器作为其一部分。在一个实施例中，通过在电介质层上形成电容电介质材料层，然后用电容材料形成通道，例如使用激光来制造衬底。然后使用所选择的沉积技术，例如溅射，无电镀和电镀，用导电材料（例如铜）填充通道。然后在电容器顶部形成第二电介质层，并产生电容器“芯”。然后，该“芯”可以与其它电介质层和导电层组合以形成较大的多层PCB或芯片载体。在替代方法中，电容介电材料可以是可光成像的，其中通道是使用本领域已知的常规曝光和显影处理形成的。

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